void adf_exit_arb(struct adf_accel_dev *accel_dev)
{
struct adf_hw_device_data *hw_data = accel_dev->hw_device;
void __iomem *csr;
unsigned int i;
if (!accel_dev->transport)
return;
csr = accel_dev->transport->banks[0].csr_addr;
/* Reset arbiter configuration */
for (i = 0; i < ADF_ARB_NUM; i++)
WRITE_CSR_ARB_SARCONFIG(csr, i, 0);
/* Shutdown work queue */
for (i = 0; i < hw_data->num_engines; i++)
WRITE_CSR_ARB_WQCFG(csr, i, 0);
/* Unmap worker threads to service arbiters */
for (i = 0; i < hw_data->num_engines; i++)
WRITE_CSR_ARB_WRK_2_SER_MAP(csr, i, 0);
/* Disable arbitration on all rings */
for (i = 0; i < GET_MAX_BANKS(accel_dev); i++)
WRITE_CSR_ARB_RINGSRVARBEN(csr, i, 0);
}
/*
* adf_cfgAddInternalValues
* Add internal config values to general section of the given accel dev
*/
CpaStatus
adf_cfgAddInternalValues(icp_accel_dev_t *accel_dev)
{
CpaStatus status = CPA_STATUS_FAIL;
adf_cfg_device_data_t *cfg = NULL;
adf_cfg_section_t *section_general = NULL;
Cpa32U *qatMask = NULL;
Cpa32U i = 0;
Cpa64U val = 0;
char keyStr[ADF_CFG_MAX_KEY_LEN_IN_BYTES] = {0};
char valStr[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = {0};
Cpa32S enabled = 0;
Cpa32U rev_id = accel_dev->pciAccelDev.revisionId;
char maj_step = 'A';
int min_step = 0;
adf_hw_device_data_t *hw_data = NULL;
Cpa32U maxNumAccelerators = 0;
ICP_CHECK_FOR_NULL_PARAM(accel_dev);
ICP_CHECK_FOR_NULL_PARAM(accel_dev->pHwDeviceData);
status = adf_cfgDeviceFind(accel_dev->accelId, &cfg);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to find cfg device\n");
return status;
}
status = icp_adf_cfgGetParamValue(accel_dev,
GENERAL_SEC,
ADF_PROC_DEBUG,
(char*)valStr);
if (CPA_STATUS_SUCCESS == status)
{
enabled = ICP_STRTOUL((char*)valStr, NULL, ADF_CFG_BASE_DEC);
}
if (enabled)
{
status = adf_debug_create_cfg(accel_dev, cfg);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to create cfg debug file\n");
return status;
}
}
if (BIT_IS_SET(accel_dev->adfSubsystemStatus,
ADF_STATUS_SYSTEM_RESTARTING))
{
/*
* If we are in reset triggered from error handling
* all the values are already there.
*/
return CPA_STATUS_SUCCESS;
}
section_general = adf_cfgSectionFind(cfg->config_section,
GENERAL_SEC);
if (NULL == section_general)
{
ADF_ERROR("Could not find section %s\n", GENERAL_SEC);
return CPA_STATUS_FAIL;
}
/* Add device node id */
val = accel_dev->pkg_id;
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_NODE_ID, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add device device node id\n");
return status;
}
/* Add device pkg id */
val = accel_dev->accelId;
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_PKG_ID, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add device pkg id\n");
return status;
}
/* Add device bus address */
val = icp_adf_get_busAddress((Cpa16U)(accel_dev->accelId));
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_BUS_ADDRESS, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add device bus address\n");
return status;
}
hw_data = accel_dev->pHwDeviceData;
/* Add number of Acceleration Engines */
val = hw_data->getNumAccelEngines(hw_data, accel_dev->aeMask);
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_NUM_AE, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add number of Acceleration Engines\n");
return status;
}
/* Add number of Accelerators */
val = hw_data->getNumAccelerators(hw_data, accel_dev->accelMask);
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_NUM_ACCEL, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add number of Accelerators\n");
return status;
}
val = hw_data->maxNumAccelEngines;
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_MAX_AE, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add maximum of Acceleration Engines\n");
return status;
}
maxNumAccelerators = GET_MAX_ACCEL(accel_dev);
val = maxNumAccelerators;
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_MAX_ACCEL, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add maximum of Acceleration Engines\n");
return status;
}
val = GET_MAX_BANKS(accel_dev);
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_MAX_BANKS, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add maximum Number of Banks\n");
return status;
}
val = GET_NUM_RINGS_PER_BANK(accel_dev);
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_MAX_RINGS_PER_BANK, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add maximum Rings Per Bank\n");
return status;
}
val = hw_data->userEtringCsrSize;
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_USER_RING_CSR_SIZE, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add User Space Ring Csr Size\n");
return status;
}
val = accel_dev->accelCapabilitiesMask;
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_CAPABILITIES_MASK, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add capabilities mask\n");
return status;
}
val = accel_dev->accelMask;
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_ACCEL_MASK, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add accel mask\n");
return status;
}
val = accel_dev->aeMask;
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_AE_MASK, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add AE mask\n");
return status;
}
val = accel_dev->sku;
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
ADF_DEV_SKU, (void*)&val,
ADF_DEC);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add AE mask\n");
return status;
}
/*
* Calculate the accelengines associated with each
* accelerator and add each mask to the config table
*/
qatMask = ICP_MALLOC_GEN_NUMA(sizeof (*qatMask) * maxNumAccelerators,
accel_dev->pkg_id);
if (NULL == qatMask)
{
ADF_ERROR("Failed to allocate memory\n");
return CPA_STATUS_FAIL;
}
hw_data->getAccelMaskList(hw_data,
accel_dev->accelMask, accel_dev->aeMask, qatMask);
for(i=0; i < maxNumAccelerators; i++)
{
ICP_MEMSET(keyStr, 0, ADF_CFG_MAX_KEY_LEN_IN_BYTES);
ICP_MEMSET(valStr, 0, ADF_CFG_MAX_VAL_LEN_IN_BYTES);
snprintf(keyStr, ADF_CFG_MAX_KEY_LEN_IN_BYTES,
ADF_DEV_ACCELAE_MASK_FMT, i);
snprintf(valStr, ADF_CFG_MAX_VAL_LEN_IN_BYTES,
"0x%X", qatMask[i]);
status = adf_cfgAddKeyValueParam(accel_dev, section_general,
keyStr, (void *)valStr, ADF_STR);
if (CPA_STATUS_SUCCESS != status)
{
ADF_ERROR("Failed to add Accel/AE Mask %d\n", i);
ICP_FREE_NUMA(qatMask);
return status;
}
}
ICP_FREE_NUMA(qatMask);
ICP_MEMSET(keyStr, 0, ADF_CFG_MAX_KEY_LEN_IN_BYTES);
if(DEV_C2XXX == hw_data->dev_class->type)
{
maj_step += ((rev_id & C2XXX_MAJOR_STEPPING_MASK)
>> C2XXX_MAJOR_STEPPING_SHIFT);
min_step += (rev_id & C2XXX_MINOR_STEPPING_MASK);
}
static int adf_dev_configure(struct adf_accel_dev *accel_dev)
{
int cpus = num_online_cpus();
int banks = GET_MAX_BANKS(accel_dev);
int instances = min(cpus, banks);
char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
int i;
unsigned long val;
if (adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC))
goto err;
if (adf_cfg_section_add(accel_dev, "Accelerator0"))
goto err;
for (i = 0; i < instances; i++) {
val = i;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_BANK_NUM, i);
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY,
i);
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_SIZE, i);
val = 128;
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
val = 512;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_SIZE, i);
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
val = 0;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_TX, i);
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
val = 2;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_TX, i);
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
val = 4;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_RND_TX, i);
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
val = 8;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_RX, i);
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
val = 10;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_RX, i);
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
val = 12;
snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_RND_RX, i);
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
key, (void *)&val, ADF_DEC))
goto err;
val = ADF_COALESCING_DEF_TIME;
snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
if (adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
key, (void *)&val, ADF_DEC))
goto err;
}
val = i;
if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
ADF_NUM_CY, (void *)&val, ADF_DEC))
goto err;
set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status);
return 0;
err:
dev_err(&GET_DEV(accel_dev), "Failed to start QAT accel dev\n");
return -EINVAL;
}
