static void
fetch_regs (struct regcache *regcache)
{
int ret, regno, tid;
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to fetch general registers."));
return;
}
for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
if (arm_apcs_32)
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) ®s[ARM_CPSR_GREGNUM]);
else
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) ®s[ARM_PC_REGNUM]);
regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
(get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
regcache_raw_supply (regcache, ARM_PC_REGNUM,
(char *) ®s[ARM_PC_REGNUM]);
}
static void
fetch_fpregs (struct regcache *regcache)
{
int ret, regno, tid;
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
/* Read the floating point state. */
ret = ptrace (PT_GETFPREGS, tid, 0, fp);
if (ret < 0)
{
warning (_("Unable to fetch the floating point registers."));
return;
}
/* Fetch fpsr. */
regcache_raw_supply (regcache, ARM_FPS_REGNUM,
fp + NWFPE_FPSR_OFFSET);
/* Fetch the floating point registers. */
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
supply_nwfpe_register (regcache, regno, fp);
}
static void
store_fpregs (const struct regcache *regcache)
{
int ret, regno, tid;
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
/* Read the floating point state. */
ret = ptrace (PT_GETFPREGS, tid, 0, fp);
if (ret < 0)
{
warning (_("Unable to fetch the floating point registers."));
return;
}
/* Store fpsr. */
if (regcache_valid_p (regcache, ARM_FPS_REGNUM))
regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
/* Store the floating point registers. */
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
if (regcache_valid_p (regcache, regno))
collect_nwfpe_register (regcache, regno, fp);
ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
if (ret < 0)
{
warning (_("Unable to store floating point registers."));
return;
}
}
static void
store_vfp_regs (const struct regcache *regcache)
{
char regbuf[VFP_REGS_SIZE];
int ret, regno, tid;
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
if (ret < 0)
{
warning (_("Unable to fetch VFP registers (for update)."));
return;
}
for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
(char *) regbuf + regno * 8);
regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
(char *) regbuf + 32 * 8);
ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
if (ret < 0)
{
warning (_("Unable to store VFP registers."));
return;
}
}
static void
fetch_wmmx_regs (struct regcache *regcache)
{
char regbuf[IWMMXT_REGS_SIZE];
int ret, regno, tid;
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
{
warning (_("Unable to fetch WMMX registers."));
return;
}
for (regno = 0; regno < 16; regno++)
regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
®buf[regno * 8]);
for (regno = 0; regno < 2; regno++)
regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
®buf[16 * 8 + regno * 4]);
for (regno = 0; regno < 4; regno++)
regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
®buf[16 * 8 + 2 * 4 + regno * 4]);
}
static void
store_regs (const struct regcache *regcache)
{
int ret, regno, tid;
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
/* Fetch the general registers. */
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to fetch general registers."));
return;
}
for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
{
if (REG_VALID == regcache_register_status (regcache, regno))
regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
}
if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
regcache_raw_collect (regcache, ARM_PS_REGNUM,
(char *) ®s[ARM_CPSR_GREGNUM]);
ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to store general registers."));
return;
}
}
//internal version
template <class T> T broadcast_internal(T in,int rank_from,MPI_Datatype type)
{
T out;
GET_THREAD_ID();
if(IS_MASTER_THREAD) MPI_Bcast(&in,1,type,rank_from,MPI_COMM_WORLD);
THREAD_BROADCAST(out,in);
return out;
}
static const struct target_desc *
arm_linux_read_description (struct target_ops *ops)
{
CORE_ADDR arm_hwcap = 0;
if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
{
elf_gregset_t gpregs;
struct iovec iov;
int tid = GET_THREAD_ID (inferior_ptid);
iov.iov_base = &gpregs;
iov.iov_len = sizeof (gpregs);
/* Check if PTRACE_GETREGSET works. */
if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
have_ptrace_getregset = TRIBOOL_FALSE;
else
have_ptrace_getregset = TRIBOOL_TRUE;
}
if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
{
return ops->beneath->to_read_description (ops->beneath);
}
if (arm_hwcap & HWCAP_IWMMXT)
return tdesc_arm_with_iwmmxt;
if (arm_hwcap & HWCAP_VFP)
{
int pid;
char *buf;
const struct target_desc * result = NULL;
/* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
Neon with VFPv3-D32. */
if (arm_hwcap & HWCAP_NEON)
result = tdesc_arm_with_neon;
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
result = tdesc_arm_with_vfpv3;
else
result = tdesc_arm_with_vfpv2;
/* Now make sure that the kernel supports reading these
registers. Support was added in 2.6.30. */
pid = ptid_get_lwp (inferior_ptid);
errno = 0;
buf = alloca (VFP_REGS_SIZE);
if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
&& errno == EIO)
result = NULL;
return result;
}
return ops->beneath->to_read_description (ops->beneath);
}
static void
store_register (const struct regcache *regcache, int regno)
{
int ret, tid;
elf_gregset_t regs;
if (REG_VALID != regcache_register_status (regcache, regno))
return;
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
/* Get the general registers from the process. */
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = ®s;
iov.iov_len = sizeof (regs);
ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
}
else
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to fetch general registers."));
return;
}
if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
regcache_raw_collect (regcache, regno,
(char *) ®s[ARM_CPSR_GREGNUM]);
else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
regcache_raw_collect (regcache, ARM_PC_REGNUM,
(char *) ®s[ARM_PC_REGNUM]);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = ®s;
iov.iov_len = sizeof (regs);
ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
}
else
ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to store general register."));
return;
}
}
static void
store_fpregs (const struct regcache *regcache)
{
int ret, regno, tid;
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
/* Read the floating point state. */
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
elf_fpregset_t fpregs;
struct iovec iov;
iov.iov_base = &fpregs;
iov.iov_len = sizeof (fpregs);
ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
}
else
ret = ptrace (PT_GETFPREGS, tid, 0, fp);
if (ret < 0)
{
warning (_("Unable to fetch the floating point registers."));
return;
}
/* Store fpsr. */
if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
/* Store the floating point registers. */
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
if (REG_VALID == regcache_register_status (regcache, regno))
collect_nwfpe_register (regcache, regno, fp);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = &fp;
iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
}
else
ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
if (ret < 0)
{
warning (_("Unable to store floating point registers."));
return;
}
}
//delete the thread pool
void thread_pool_stop()
{
GET_THREAD_ID();
//check to be thread 0
if(thread_id!=0) crash("only thread 0 can stop the pool");
//pass a NULL order
start_threaded_function(NULL,"");
}
//abort
void ranks_abort(int err)
{
#ifdef USE_MPI
GET_THREAD_ID();
printf("thread %d on rank %d aborting\n",THREAD_ID,rank);
MPI_Abort(MPI_COMM_WORLD,0);
#else
exit(0);
#endif
}
//unlock the thread pool
void thread_pool_unlock()
{
THREAD_BARRIER_FORCE();
#ifdef THREAD_DEBUG
GET_THREAD_ID();
if(rank==0 && VERBOSITY_LV3) printf("thread %d unlocking the pool\n",thread_id);
#endif
thread_pool_locked=false;
cache_flush();
}
void ___rouent2(struct s1 *p) {
uint32_t tid;
uint64_t time;
/* -- if not yet initialized, initialize VampirTrace -- */
if (rou_init)
{
rou_init = 0;
vt_open();
}
/* -- if VampirTrace already finalized, return -- */
if ( !vt_is_alive ) return;
/* -- get calling thread id -- */
GET_THREAD_ID(tid);
VT_SUSPEND_MALLOC_TRACING(tid);
time = vt_pform_wtime();
if (!p->isseen)
{
char* rname = p->rout;
char* modpos;
/* fix opari output file names */
if ( (modpos = strstr(p->file, ".mod.")) != NULL )
{
strcpy(modpos, modpos+4);
}
#if (defined(VT_MT) || defined(VT_HYB))
VTTHRD_LOCK_IDS();
if (!p->isseen)
{
p->fid = vt_def_scl_file(tid, p->file);
p->rid = vt_def_region(tid, rname, p->fid, p->lineno,
VT_NO_LNO, NULL, VT_FUNCTION);
p->isseen = 1;
}
VTTHRD_UNLOCK_IDS();
#else /* VT_MT || VT_HYB */
p->fid = vt_def_scl_file(tid, p->file);
p->rid = vt_def_region(tid, rname, p->fid, p->lineno,
VT_NO_LNO, NULL, VT_FUNCTION);
p->isseen = 1;
#endif /* VT_MT || VT_HYB */
}
/* write enter trace record */
vt_enter(tid, &time, p->rid);
VT_RESUME_MALLOC_TRACING(tid);
}
THREADABLE_FUNCTION_6ARG(fft4d, complex*,out, complex*,in, int*,ext_dirs, int,ncpp, double,sign, int,normalize)
{
GET_THREAD_ID();
//first of all put in to out
if(out!=in) vector_copy(out,in);
//list all dirs
int dirs[NDIM],ndirs=0;
for(int mu=0;mu<NDIM;mu++) if(ext_dirs[mu]) dirs[ndirs++]=mu;
verbosity_lv2_master_printf("Going to FFT: %d dimensions in total\n",ndirs);
if(ndirs)
{
//allocate buffer
complex *buf=nissa_malloc("buf",max_locd_size*ncpp,complex);
//allocate plans
fftw_plan *plans=nissa_malloc("plans",ndirs,fftw_plan);
if(IS_MASTER_THREAD)
for(int idir=0;idir<ndirs;idir++)
plans[idir]=fftw_plan_many_dft(1,glb_size+dirs[idir],ncpp,buf,NULL,ncpp,1,buf,NULL,ncpp,1,sign,FFTW_ESTIMATE);
THREAD_BARRIER();
//transpose each dir in turn and take fft
for(int idir=0;idir<ndirs;idir++)
{
int mu=dirs[idir];
verbosity_lv2_master_printf("FFT-ing dimension %d/%d=%d\n",idir+1,ndirs,mu);
remap_lx_vector_to_locd(buf,out,ncpp*sizeof(complex),mu);
//makes all the fourier transform
NISSA_PARALLEL_LOOP(ioff,0,locd_perp_size_per_dir[mu])
fftw_execute_dft(plans[idir],buf+ioff*glb_size[mu]*ncpp,buf+ioff*glb_size[mu]*ncpp);
THREAD_BARRIER();
remap_locd_vector_to_lx(out,buf,ncpp*sizeof(complex),mu);
}
//destroy plans
if(IS_MASTER_THREAD) for(int idir=0;idir<ndirs;idir++) fftw_destroy_plan(plans[idir]);
//put normaliisation
if(normalize)
{
double norm=glb_size[dirs[0]];
for(int idir=1;idir<ndirs;idir++) norm*=glb_size[idir];
double_vector_prod_double((double*)out,(double*)out,1/norm,2*ncpp*loc_vol);
}
nissa_free(buf);
nissa_free(plans);
}
}
//evolve the momenta with force
THREADABLE_FUNCTION_3ARG(evolve_lx_momenta_with_force, quad_su3*,H, quad_su3*,F, double,dt)
{
GET_THREAD_ID();
NISSA_PARALLEL_LOOP(ivol,0,loc_vol)
for(int mu=0; mu<NDIM; mu++)
for(int ic1=0; ic1<NCOL; ic1++)
for(int ic2=0; ic2<NCOL; ic2++)
complex_subt_the_prod_idouble(H[ivol][mu][ic1][ic2],F[ivol][mu][ic1][ic2],dt);
THREAD_BARRIER();
}
//summ the eight contributions, divide by two and subtract from the diagonal squared mass term
THREADABLE_FUNCTION_3ARG(HOPPING_MATRIX_OE_OR_EO_EXPAND_TO_32_64_STAGGERED_D_SUBTRACT_FROM_MASS2_TIMES_IN, VIR_32_64_COLOR*,out, PREC_TYPE,mass2, VIR_32_64_COLOR*,in)
{
GET_THREAD_ID();
//result of split application
VIR_32_64_COLOR *bgq_hopping_matrix_output_data=(VIR_32_64_COLOR*)send_buf+bord_volh/2;
//define workload and point to the begin of each chunk
NISSA_CHUNK_WORKLOAD(start,chunk_load,end,0,loc_volh/2,thread_id,NACTIVE_THREADS);
void *temp_ptr=(VIR_32_64_COMPLEX*)(bgq_hopping_matrix_output_data+start*8)-1;
void *out_ptr=(VIR_32_64_COMPLEX*)(out+start)-1;
void *in_ptr=(VIR_32_64_COMPLEX*)(in+start)-1;
//regs
DECLARE_REG_VIR_COLOR(reg_in);
DECLARE_REG_VIR_COLOR(reg_out);
DECLARE_REG_VIR_COLOR(reg_temp);
//-0.5
DECLARE_REG_VIR_COMPLEX(reg_mone_half);
REG_SPLAT_VIR_COMPLEX(reg_mone_half,-0.5);
//reg_mass2
DECLARE_REG_VIR_COMPLEX(reg_mass2);
REG_SPLAT_VIR_COMPLEX(reg_mass2,mass2);
for(int i=start;i<end;i++)
{
//copy first term
REG_LOAD_VIR_32_64_COLOR_ADVANCING(reg_out,temp_ptr);
//other 7 terms
LOAD_AND_SUMM_NEXT_TERM(reg_out,reg_temp,temp_ptr);
LOAD_AND_SUMM_NEXT_TERM(reg_out,reg_temp,temp_ptr);
LOAD_AND_SUMM_NEXT_TERM(reg_out,reg_temp,temp_ptr);
LOAD_AND_SUBT_NEXT_TERM(reg_out,reg_temp,temp_ptr);
LOAD_AND_SUBT_NEXT_TERM(reg_out,reg_temp,temp_ptr);
LOAD_AND_SUBT_NEXT_TERM(reg_out,reg_temp,temp_ptr);
LOAD_AND_SUBT_NEXT_TERM(reg_out,reg_temp,temp_ptr);
//put final -0.5
REG_VIR_COLOR_PROD_4DOUBLE(reg_out,reg_out,reg_mone_half);
//load diagonal term, and summ it
REG_LOAD_VIR_32_64_COLOR_ADVANCING(reg_in,in_ptr);
REG_VIR_COLOR_SUMM_THE_PROD_4DOUBLE(reg_out,reg_out,reg_in,reg_mass2);
//store
STORE_REG_VIR_32_64_COLOR_ADVANCING(out_ptr,reg_out);
}
//final sync
set_borders_invalid(out);
}
//delay marked threads
void delay_marked_threads()
{
GET_THREAD_ID();
if(delayed_thread_barrier[THREAD_ID]==1)
{
if(rank==0 && VERBOSITY_LV3) printf("thread %d will delay its execution,stopped at %s,%d\n",
THREAD_ID,glb_barr_file,glb_barr_line);
thread_barrier_internal();
}
}
THREADABLE_FUNCTION_END
//similar for lx
THREADABLE_FUNCTION_1ARG(generate_hmc_momenta, quad_su3*,H)
{
GET_THREAD_ID();
NISSA_PARALLEL_LOOP(ivol,0,loc_vol)
for(int mu=0;mu<NDIM;mu++)
herm_put_to_gauss(H[ivol][mu],&(loc_rnd_gen[ivol]),1);
set_borders_invalid(H);
}
//Eq.(11) up to last piece
void inv_tmD_cg_eoprec_almost_reco_sol(spincolor *varphi,quad_su3 **conf_eos,spincolor *sol_odd,spincolor *source_evn)
{
GET_THREAD_ID();
tmn2Deo_eos(varphi,conf_eos,sol_odd);
NISSA_PARALLEL_LOOP(ivol,0,loc_volh)
for(int id=0;id<NDIRAC;id++)
for(int ic=0;ic<NCOL;ic++)
for(int ri=0;ri<2;ri++)
varphi[ivol][id][ic][ri]=source_evn[ivol][id][ic][ri]+varphi[ivol][id][ic][ri]*0.5;
set_borders_invalid(varphi);
}
static void
store_vfp_regs (const struct regcache *regcache)
{
char regbuf[VFP_REGS_SIZE];
int ret, regno, tid;
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = regbuf;
iov.iov_len = VFP_REGS_SIZE;
ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
}
else
ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
if (ret < 0)
{
warning (_("Unable to fetch VFP registers (for update)."));
return;
}
for (regno = 0; regno < tdep->vfp_register_count; regno++)
regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
(char *) regbuf + regno * 8);
regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
(char *) regbuf + 32 * 8);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = regbuf;
iov.iov_len = VFP_REGS_SIZE;
ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
}
else
ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
if (ret < 0)
{
warning (_("Unable to store VFP registers."));
return;
}
}
static void
fetch_register (struct regcache *regcache, int regno)
{
int ret, tid;
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = ®s;
iov.iov_len = sizeof (regs);
ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
}
else
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to fetch general register."));
return;
}
if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
if (ARM_PS_REGNUM == regno)
{
if (arm_apcs_32)
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) ®s[ARM_CPSR_GREGNUM]);
else
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) ®s[ARM_PC_REGNUM]);
}
if (ARM_PC_REGNUM == regno)
{
regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
(get_regcache_arch (regcache),
regs[ARM_PC_REGNUM]);
regcache_raw_supply (regcache, ARM_PC_REGNUM,
(char *) ®s[ARM_PC_REGNUM]);
}
}
//only master rank and thread print
int simul_t::master_fprintf(FILE *stream,const char *format,...)
{
GET_THREAD_ID();
int ret=0;
if(rank_id==0 && IS_MASTER_THREAD)
{
va_list ap;
va_start(ap,format);
ret=vfprintf(stream,format,ap);
va_end(ap);
}
return ret;
}
static void
fetch_xtregs (struct regcache *regcache, int regnum)
{
int tid = GET_THREAD_ID (inferior_ptid);
const xtensa_regtable_t *ptr;
char xtregs [XTENSA_ELF_XTREG_SIZE];
if (ptrace (PTRACE_GETXTREGS, tid, 0, (long)&xtregs) < 0)
perror_with_name (_("Couldn't get extended registers"));
for (ptr = xtensa_regmap_table; ptr->name; ptr++)
if (regnum == ptr->gdb_regnum || regnum == -1)
regcache_raw_supply (regcache, ptr->gdb_regnum,
xtregs + ptr->ptrace_offset);
}
static void
fetch_gregs (struct regcache *regcache, int regnum)
{
int tid = GET_THREAD_ID (inferior_ptid);
const gdb_gregset_t regs;
int areg;
if (ptrace (PTRACE_GETREGS, tid, 0, (long) ®s) < 0)
{
perror_with_name (_("Couldn't get registers"));
return;
}
supply_gregset_reg (regcache, ®s, regnum);
}
static void
store_regs (const struct regcache *regcache)
{
int ret, regno, tid;
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
/* Fetch the general registers. */
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = ®s;
iov.iov_len = sizeof (regs);
ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
}
else
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to fetch general registers."));
return;
}
aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = ®s;
iov.iov_len = sizeof (regs);
ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
}
else
ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to store general registers."));
return;
}
}
//print a message with line
void internal_shout(int line,const char *file,const char *templ,...)
{
//give time to master thread to crash, if possible
GET_THREAD_ID();
if(IS_MASTER_THREAD && IS_MASTER_RANK)
{
//expand message
char mess[1024];
va_list ap;
va_start(ap,templ);
vsprintf(mess,templ,ap);
va_end(ap);
printf("line %d of file \"%s\" said: \"%s\".\n",line,file,mess);
}
}
void ___rouret2(void) {
uint32_t tid;
uint64_t time;
/* -- if VampirTrace already finalized, return -- */
if ( !vt_is_alive ) return;
/* -- get calling thread id -- */
GET_THREAD_ID(tid);
VT_SUSPEND_MALLOC_TRACING(tid);
time = vt_pform_wtime();
vt_exit(tid, &time);
VT_RESUME_MALLOC_TRACING(tid);
}
static void
fetch_fpregister (int regno)
{
int ret, tid;
FPA11 fp;
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
/* Read the floating point state. */
ret = ptrace (PT_GETFPREGS, tid, 0, &fp);
if (ret < 0)
{
warning ("Unable to fetch floating point register.");
return;
}
/* Fetch fpsr. */
if (FPS_REGNUM == regno)
supply_register (FPS_REGNUM, (char *) &fp.fpsr);
/* Fetch the floating point register. */
if (regno >= F0_REGNUM && regno <= F7_REGNUM)
{
int fn = regno - F0_REGNUM;
switch (fp.fType[fn])
{
case typeSingle:
fetch_nwfpe_single (fn, &fp);
break;
case typeDouble:
fetch_nwfpe_double (fn, &fp);
break;
case typeExtended:
fetch_nwfpe_extended (fn, &fp);
break;
default:
fetch_nwfpe_none (fn);
}
}
}
static const struct target_desc *
arm_linux_read_description (struct target_ops *ops)
{
int ret;
char regbuf[IWMMXT_REGS_SIZE];
ret = ptrace (PTRACE_GETWMMXREGS, GET_THREAD_ID (inferior_ptid),
0, regbuf);
if (ret < 0)
arm_linux_has_wmmx_registers = 0;
else
arm_linux_has_wmmx_registers = 1;
if (arm_linux_has_wmmx_registers)
return tdesc_arm_with_iwmmxt;
else
return NULL;
}
