示例#1
0
static void print_arg( struct fragment_program *p,
		       GLuint arg )
{
   GLuint src = UREG_SRC0(arg);

   if (src == _ZERO) {
      emit(p, "0");
      return;
   }

   if (arg & (1<<UREG_CHANNEL_X_NEGATE_SHIFT))
      emit(p, "-");

   if (src == _ONE) {
      emit(p, "1");
      return;
   }

   if (GET_UREG_TYPE(arg) == UREG_TYPE_STATE_CONST &&
       p->Parameters->Parameters[GET_UREG_NR(arg)].Type == CONSTANT) {
      emit(p, "%g", p->Parameters->Parameters[GET_UREG_NR(arg)].Values[src]);
      return;
   }

   print_reg( p, arg );

   switch (src){
   case _X: emit(p, "[0]"); break;
   case _Y: emit(p, "[1]"); break;
   case _Z: emit(p, "[2]"); break;
   case _W: emit(p, "[3]"); break;
   }   
}
示例#2
0
GLuint
i915_emit_arith(struct i915_fragment_program * p,
                GLuint op,
                GLuint dest,
                GLuint mask,
                GLuint saturate, GLuint src0, GLuint src1, GLuint src2)
{
   GLuint c[3];
   GLuint nr_const = 0;

   assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
   dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest));
   assert(dest);

   if (GET_UREG_TYPE(src0) == REG_TYPE_CONST)
      c[nr_const++] = 0;
   if (GET_UREG_TYPE(src1) == REG_TYPE_CONST)
      c[nr_const++] = 1;
   if (GET_UREG_TYPE(src2) == REG_TYPE_CONST)
      c[nr_const++] = 2;

   /* Recursively call this function to MOV additional const values
    * into temporary registers.  Use utemp registers for this -
    * currently shouldn't be possible to run out, but keep an eye on
    * this.
    */
   if (nr_const > 1) {
      GLuint s[3], first, i, old_utemp_flag;

      s[0] = src0;
      s[1] = src1;
      s[2] = src2;
      old_utemp_flag = p->utemp_flag;

      first = GET_UREG_NR(s[c[0]]);
      for (i = 1; i < nr_const; i++) {
         if (GET_UREG_NR(s[c[i]]) != first) {
            GLuint tmp = i915_get_utemp(p);

            i915_emit_arith(p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0,
                            s[c[i]], 0, 0);
            s[c[i]] = tmp;
         }
      }

      src0 = s[0];
      src1 = s[1];
      src2 = s[2];
      p->utemp_flag = old_utemp_flag;   /* restore */
   }

   *(p->csr++) = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0));
   *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));
   *(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2));

   p->nr_alu_insn++;
   return dest;
}
示例#3
0
static void i915EmitTextureProgram( struct i915_context *i915 )
{
   GLcontext *ctx = &i915->intel.ctx;
   struct i915_fragment_program *p = &i915->tex_program;
   GLuint unit;

   if (0) fprintf(stderr, "%s\n", __FUNCTION__);

   i915_init_program( i915, p );

   if (ctx->Texture._EnabledUnits) {
      for (unit = 0 ; unit < ctx->Const.MaxTextureUnits ; unit++)
	 if (ctx->Texture.Unit[unit]._ReallyEnabled) {
	    p->last_tex_stage = unit;
	 }

      for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++)
	 if (ctx->Texture.Unit[unit]._ReallyEnabled) {
	    p->src_previous = emit_texenv( p, unit );
	    p->src_texture = UREG_BAD;
	    p->temp_flag = 0xffff000;
	    p->temp_flag |= 1 << GET_UREG_NR(p->src_previous);
	 }
   }

   emit_program_fini( p );

   i915_fini_program( p );
   i915_upload_program( i915, p );

   p->translated = 1;
}
示例#4
0
GLuint i915_emit_texld( struct i915_fragment_program *p,
			GLuint dest,
			GLuint destmask,
			GLuint sampler,
			GLuint coord,
			GLuint op )
{
   if (coord != UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord))) {
      /* No real way to work around this in the general case - need to
       * allocate and declare a new temporary register (a utemp won't
       * do).  Will fallback for now.
       */
      i915_program_error(p, "Can't (yet) swizzle TEX arguments");
      return 0;
   }

   /* Don't worry about saturate as we only support  
    */
   if (destmask != A0_DEST_CHANNEL_ALL) {
      GLuint tmp = i915_get_utemp(p);
      i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
      i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
      return dest;
   }
   else {
      assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
      assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));

      if (GET_UREG_TYPE(coord) != REG_TYPE_T) {
	 p->nr_tex_indirect++;
      }

      *(p->csr++) = (op | 
		     T0_DEST( dest ) |
		     T0_SAMPLER( sampler ));

      *(p->csr++) = T1_ADDRESS_REG( coord );
      *(p->csr++) = T2_MBZ;

      p->nr_tex_insn++;
      return dest;
   }
}
示例#5
0
static GLuint get_source( struct i915_fragment_program *p, 
			  GLenum src, GLuint unit )
{
   switch (src) {
   case GL_TEXTURE: 
      if (p->src_texture == UREG_BAD) {

	 /* TODO: Use D0_CHANNEL_XY where possible.
	  */
	 GLuint dim = translate_tex_src_bit( p, p->ctx->Texture.Unit[unit]._ReallyEnabled);
	 GLuint sampler = i915_emit_decl(p, REG_TYPE_S, unit, dim);
	 GLuint texcoord = i915_emit_decl(p, REG_TYPE_T, unit, D0_CHANNEL_ALL);
	 GLuint tmp = i915_get_temp( p );
	 GLuint op = T0_TEXLD;

	 if (p->VB->TexCoordPtr[unit]->size == 4)
	    op = T0_TEXLDP;

	 p->src_texture = i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, 
					  sampler, texcoord, op );
      }

      return p->src_texture;

      /* Crossbar: */
   case GL_TEXTURE0:
   case GL_TEXTURE1:
   case GL_TEXTURE2:
   case GL_TEXTURE3:
   case GL_TEXTURE4:
   case GL_TEXTURE5:
   case GL_TEXTURE6:
   case GL_TEXTURE7: {
      return UREG_BAD;
   }

   case GL_CONSTANT:
      return i915_emit_const4fv( p, p->ctx->Texture.Unit[unit].EnvColor );
   case GL_PRIMARY_COLOR:
      return i915_emit_decl(p, REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL);
   case GL_PREVIOUS:
   default: 
      i915_emit_decl(p, 
		GET_UREG_TYPE(p->src_previous),
		GET_UREG_NR(p->src_previous), D0_CHANNEL_ALL); 
      return p->src_previous;
   }
}
示例#6
0
static void print_reg( struct fragment_program *p,
		       GLuint arg )
{
   switch (GET_UREG_TYPE(arg)) {
   case UREG_TYPE_TEMP: emit(p, "temp"); break;
   case UREG_TYPE_INTERP: emit(p, "interp"); break;
   case UREG_TYPE_LOCAL_CONST: emit(p, "local_const"); break;
   case UREG_TYPE_ENV_CONST: emit(p, "env_const"); break;
   case UREG_TYPE_STATE_CONST: emit(p, "state_param"); break;
   case UREG_TYPE_PARAM: emit(p, "local_param"); break;
   };
   
   emit(p, "[%d]", GET_UREG_NR(arg));

   if (GET_UREG_TYPE(arg) == UREG_TYPE_STATE_CONST) {
      emit(p, ".Values");
   }
}
示例#7
0
BOOL copybox3d( GMABitMap_t *bm_dst, GMABitMap_t *bm_src,
               ULONG dst_x,ULONG dst_y,ULONG dst_width, ULONG dst_height,
               ULONG src_x,ULONG src_y,ULONG src_width, ULONG src_height )
{
    uint32_t dst_format;
    uint32_t src_format;

    if( !copybox3d_supported() ) 
    {
        return FALSE;
    }

    // buffers in gfx memory ?
    if( ! (bm_src->fbgfx && bm_src->fbgfx) )
    {
        return FALSE;
    }

    // Max texture size, src and dst must be differend (at least if overlaps)
    if( bm_src->pitch/4 > 2048 || bm_src->height > 2048 || bm_dst == bm_src )
    {
        return FALSE;
    }
    
    // src pitch must be long aligmented.
    if( bm_src->pitch & 0x3 )
    {
        bug("[IntelGMA] copybox3d: ERROR bm_src->pitch=%d/n",bm_src->pitch);
        return FALSE;
    }

    if(bm_src->bpp == 4)
    {
        src_format = MAPSURF_32BIT | MT_32BIT_ARGB8888;
    }
    else if(bm_src->bpp == 2)
    {
        src_format = MAPSURF_16BIT | MT_16BIT_RGB565;
    }
    else
    {
        bug("[IntelGMA] copybox3d: ERROR src_bpp=%d/n",bm_src->bpp);
        return FALSE;
    }

    if(bm_dst->bpp == 4)
    {
        dst_format = COLOR_BUF_ARGB8888;
    }
    else if(bm_dst->bpp == 2)
    {
        dst_format = COLOR_BUF_RGB565;
    }
    else
    {
        bug("[IntelGMA] copybox3d: ERROR dst_bpp=%d/n",bm_dst->bpp);
        return FALSE;
    }

    D(bug("[IntelGMA:HW] %s()\n", __func__));

    LOCK_HW
    START_RING(72);

    /* invariant state */
    OUT_RING( _3DSTATE_AA_CMD |
        AA_LINE_ECAAR_WIDTH_ENABLE |
        AA_LINE_ECAAR_WIDTH_1_0 |
        AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0 );

    OUT_RING( _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
        IAB_MODIFY_ENABLE |
        IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) |
        IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE <<
                     IAB_SRC_FACTOR_SHIFT) |
        IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO <<
                     IAB_DST_FACTOR_SHIFT) );

    OUT_RING( _3DSTATE_DFLT_DIFFUSE_CMD );
    OUT_RING( 0 );

    OUT_RING( _3DSTATE_DFLT_SPEC_CMD );
    OUT_RING( 0 );

    OUT_RING( _3DSTATE_DFLT_Z_CMD );
    OUT_RING( 0 );

    OUT_RING( _3DSTATE_COORD_SET_BINDINGS |
        CSB_TCB(0, 0) |
        CSB_TCB(1, 1) |
        CSB_TCB(2, 2) |
        CSB_TCB(3, 3) |
        CSB_TCB(4, 4) |
        CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7) );

    OUT_RING( _3DSTATE_RASTER_RULES_CMD |
        ENABLE_POINT_RASTER_RULE |
        OGL_POINT_RASTER_RULE |
        ENABLE_LINE_STRIP_PROVOKE_VRTX |
        ENABLE_TRI_FAN_PROVOKE_VRTX |
        LINE_STRIP_PROVOKE_VRTX(1) |
        TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D );

    OUT_RING( _3DSTATE_MODES_4_CMD |
        ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) |
        ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) |
        ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff) );

    OUT_RING( _3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2 );

    OUT_RING( 0x00000000 );    /* Disable texture coordinate wrap-shortest */

    OUT_RING( (1 << S4_POINT_WIDTH_SHIFT) |
        S4_LINE_WIDTH_ONE |
        S4_CULLMODE_NONE |
        S4_VFMT_XY );
    OUT_RING( 0x00000000 );    /* Stencil. */
    OUT_RING( _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT );
    OUT_RING( _3DSTATE_SCISSOR_RECT_0_CMD );
    OUT_RING( 0 );
    OUT_RING( 0 );
    OUT_RING( _3DSTATE_DEPTH_SUBRECT_DISABLE );
    OUT_RING( _3DSTATE_LOAD_INDIRECT | 0 );    /* disable indirect state */
    OUT_RING( 0 );
    OUT_RING( _3DSTATE_STIPPLE );
    OUT_RING( 0x00000000 );
    OUT_RING( _3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0 );

    /* samler state */
#define TEX_COUNT 1
    OUT_RING( _3DSTATE_MAP_STATE | (3 * TEX_COUNT) );
    OUT_RING( (1 << TEX_COUNT) - 1 );

    // Source buffer
    OUT_RING( bm_src->framebuffer );
    OUT_RING( src_format |
        (bm_src->height - 1) << MS3_HEIGHT_SHIFT |
        (bm_src->pitch/bm_src->bpp - 1)  << MS3_WIDTH_SHIFT );
    OUT_RING( (bm_src->pitch/4 -1) << MS4_PITCH_SHIFT );

    OUT_RING( _3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT) );
    OUT_RING( (1 << TEX_COUNT) - 1 );
    OUT_RING( MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT |
        FILTER_NEAREST << SS2_MAG_FILTER_SHIFT |
        FILTER_NEAREST << SS2_MIN_FILTER_SHIFT );
    OUT_RING( TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT |
        TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT |
        0 << SS3_TEXTUREMAP_INDEX_SHIFT );
    OUT_RING( 0x00000000 );

    /* render target state */
    
    // Destination buffer
    OUT_RING( _3DSTATE_BUF_INFO_CMD );
    OUT_RING( BUF_3D_ID_COLOR_BACK | bm_dst->pitch );
    OUT_RING( bm_dst->framebuffer );
    OUT_RING( _3DSTATE_DST_BUF_VARS_CMD );
    OUT_RING( dst_format |
        DSTORG_HORT_BIAS(0x8) |
        DSTORG_VERT_BIAS(0x8) );

    /* draw rect is unconditional */
    OUT_RING( _3DSTATE_DRAW_RECT_CMD );

    OUT_RING( 0x00000000 );
    OUT_RING( 0x00000000 );    // ymin, xmin 
    OUT_RING( DRAW_YMAX(dst_y + dst_height - 1) |
              DRAW_XMAX(dst_x + dst_width - 1) );

    /* yorig, xorig (relate to color buffer?) */
    OUT_RING( 0x00000000 );

    /* texfmt */
    OUT_RING( _3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | I1_LOAD_S(2) | I1_LOAD_S(6) | 2 );
    OUT_RING( (4 << S1_VERTEX_WIDTH_SHIFT) | (4 << S1_VERTEX_PITCH_SHIFT) );
    OUT_RING( ~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT) |
        S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) );
    OUT_RING( S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE |
        BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT |
        BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT |
        BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT );

    /* pixel shader */
    OUT_RING( _3DSTATE_PIXEL_SHADER_PROGRAM | (1 + 3*3 - 2) );
    /* decl FS_T0 */
    OUT_RING( D0_DCL |
        GET_UREG_TYPE(FS_T0) << D0_TYPE_SHIFT |
        GET_UREG_NR(FS_T0) << D0_NR_SHIFT |
        ((GET_UREG_TYPE(FS_T0) != GET_UREG_TYPE_S) ? D0_CHANNEL_ALL : 0) );
    OUT_RING( 0 );
    OUT_RING( 0 );
    /* decl FS_S0 */
    OUT_RING( D0_DCL |
        (GET_UREG_TYPE(FS_S0) << D0_TYPE_SHIFT) |
        (GET_UREG_NR(FS_S0) << D0_NR_SHIFT) |
        ((GET_UREG_TYPE(FS_S0) != GET_UREG_TYPE_S) ? D0_CHANNEL_ALL : 0) );
    OUT_RING( 0 );
    OUT_RING( 0 );
    /* texld(FS_OC, FS_S0, FS_T0 */
    OUT_RING( T0_TEXLD |
        (GET_UREG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) |
        (GET_UREG_NR(FS_OC) << T0_DEST_NR_SHIFT) |
        (GET_UREG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT) );
    OUT_RING( (GET_UREG_TYPE(FS_T0) << T1_ADDRESS_GET_UREG_TYPE_SHIFT) |
        (GET_UREG_NR(FS_T0) << T1_ADDRESS_GET_UREG_NR_SHIFT) );
    OUT_RING( 0 );
    
    // rectangle 
    // 3--x
    // |  |
    // 2--1
    OUT_RING( PRIM3D_RECTLIST | (3*4 - 1) );
    OUT_RING( pack_float( dst_x + dst_width) );
    OUT_RING( pack_float( dst_y + dst_height) );
    OUT_RING( pack_float(src_x + src_width) );
    OUT_RING( pack_float(src_y + src_height) );

    OUT_RING( pack_float( dst_x + 0 ) );
    OUT_RING( pack_float( dst_y +dst_height) );
    OUT_RING( pack_float(src_x + 0) );
    OUT_RING( pack_float(src_y + src_height) );

    OUT_RING( pack_float( dst_x + 0 ) );
    OUT_RING( pack_float( dst_y + 0 ) );
    OUT_RING( pack_float(src_x + 0) );
    OUT_RING( pack_float(src_y + 0) );

    ADVANCE_RING();
    DO_FLUSH();
    UNLOCK_HW

    return TRUE;
}
示例#8
0
GLuint i915_emit_texld( struct i915_fragment_program *p,
			GLuint live_regs,               
			GLuint dest,
			GLuint destmask,
			GLuint sampler,
			GLuint coord,
			GLuint op )
{
    if (coord != UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord))) {
        /* With the help of the "needed registers" table created earlier, pick
         * a register we can MOV the swizzled TC to (since TEX doesn't support
         * swizzled sources) */
        GLuint swizCoord = get_free_rreg(p, live_regs);
        if (swizCoord == UREG_BAD) 
            return 0;

        i915_emit_arith( p, A0_MOV, swizCoord, A0_DEST_CHANNEL_ALL, 0, coord, 0, 0 );
        coord = swizCoord;
    }

   /* Don't worry about saturate as we only support texture formats
    * that are always in the 0..1 range.
    */
   if (destmask != A0_DEST_CHANNEL_ALL) {
      GLuint tmp = i915_get_utemp(p);
      i915_emit_texld( p, 0, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
      i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
      return dest;
   }
   else {
      assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
      assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
      /* Can't use unsaved temps for coords, as the phase boundary would result
       * in the contents becoming undefined.
       */
      assert(GET_UREG_TYPE(coord) != REG_TYPE_U);

      if ((GET_UREG_TYPE(coord) != REG_TYPE_R) &&
          (GET_UREG_TYPE(coord) != REG_TYPE_OC) &&
          (GET_UREG_TYPE(coord) != REG_TYPE_OD) &&
          (GET_UREG_TYPE(coord) != REG_TYPE_T)) {
          GLuint  tmpCoord = get_free_rreg(p, live_regs);
          
          if (tmpCoord == UREG_BAD) 
              return 0;

          i915_emit_arith(p, A0_MOV, tmpCoord, A0_DEST_CHANNEL_ALL, 0, coord, 0, 0);
          coord = tmpCoord;
      }

      /* Output register being oC or oD defines a phase boundary */
      if (GET_UREG_TYPE(dest) == REG_TYPE_OC ||
	  GET_UREG_TYPE(dest) == REG_TYPE_OD)
	 p->nr_tex_indirect++;

      /* Reading from an r# register whose contents depend on output of the
       * current phase defines a phase boundary.
       */
      if (GET_UREG_TYPE(coord) == REG_TYPE_R &&
	  p->register_phases[GET_UREG_NR(coord)] == p->nr_tex_indirect)
	 p->nr_tex_indirect++;

      *(p->csr++) = (op | 
		     T0_DEST( dest ) |
		     T0_SAMPLER( sampler ));

      *(p->csr++) = T1_ADDRESS_REG( coord );
      *(p->csr++) = T2_MBZ;

      if (GET_UREG_TYPE(dest) == REG_TYPE_R)
	 p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect;

      p->nr_tex_insn++;
      return dest;
   }
}
示例#9
0
/**
 * Emit a texture load or texkill instruction.
 * \param dest  the dest i915 register
 * \param destmask  the dest register writemask
 * \param sampler  the i915 sampler register
 * \param coord  the i915 source texcoord operand
 * \param opcode  the instruction opcode
 */
uint i915_emit_texld( struct i915_fp_compile *p,
                      uint dest,
                      uint destmask,
                      uint sampler,
                      uint coord,
                      uint opcode,
                      uint num_coord )
{
   const uint k = UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord));

   int temp = -1;
   uint ignore = 0;

   /* Eliminate the useless texture coordinates. Otherwise we end up generating
    * a swizzle for no reason below. */
   switch(num_coord) {
      case 0:
         /* Ignore x */
         ignore |= (0xf << UREG_CHANNEL_X_SHIFT);
      case 1:
         /* Ignore y */
         ignore |= (0xf << UREG_CHANNEL_Y_SHIFT);
      case 2:
         /* Ignore z */
         ignore |= (0xf << UREG_CHANNEL_Z_SHIFT);
      case 3:
         /* Ignore w */
         ignore |= (0xf << UREG_CHANNEL_W_SHIFT);
   }

   if ( (coord &~ignore ) != (k & ~ignore) ) {
      /* texcoord is swizzled or negated.  Need to allocate a new temporary
       * register (a utemp / unpreserved temp) won't do.
       */
      uint tempReg;

      temp = i915_get_temp(p);           /* get temp reg index */
      tempReg = UREG(REG_TYPE_R, temp);  /* make i915 register */

      i915_emit_arith( p, A0_MOV,
                       tempReg, A0_DEST_CHANNEL_ALL, /* dest reg, writemask */
                       0,                            /* saturate */
                       coord, 0, 0 );                /* src0, src1, src2 */

      /* new src texcoord is tempReg */
      coord = tempReg;
   }

   /* Don't worry about saturate as we only support  
    */
   if (destmask != A0_DEST_CHANNEL_ALL) {
      /* if not writing to XYZW... */
      uint tmp = i915_get_utemp(p);
      i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, opcode, num_coord );
      i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
      /* XXX release utemp here? */
   }
   else {
      assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
      assert(dest == UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));

      /* Output register being oC or oD defines a phase boundary */
      if (GET_UREG_TYPE(dest) == REG_TYPE_OC ||
          GET_UREG_TYPE(dest) == REG_TYPE_OD)
         p->nr_tex_indirect++;

      /* Reading from an r# register whose contents depend on output of the
       * current phase defines a phase boundary.
       */
      if (GET_UREG_TYPE(coord) == REG_TYPE_R &&
          p->register_phases[GET_UREG_NR(coord)] == p->nr_tex_indirect)
         p->nr_tex_indirect++;

      if (p->csr< p->program + I915_PROGRAM_SIZE) {
         *(p->csr++) = (opcode |
                        T0_DEST( dest ) |
                        T0_SAMPLER( sampler ));

         *(p->csr++) = T1_ADDRESS_REG( coord );
         *(p->csr++) = T2_MBZ;
      }
      else
         i915_program_error(p, "Out of instructions");

      if (GET_UREG_TYPE(dest) == REG_TYPE_R)
         p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect;

      p->nr_tex_insn++;
   }

   if (temp >= 0)
      i915_release_temp(p, temp);

   return dest;
}