static inline void vrc4173_icu_init(int cascade_irq) { int i; if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15)) return; vrc4173_outw(0, VRC4173_MSYSINT1REG); vr41xx_set_irq_trigger(GIU_IRQ_TO_PIN(cascade_irq), TRIGGER_LEVEL, SIGNAL_THROUGH); vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) irq_desc[i].handler = &vrc4173_irq_type; }
static void ack_giuint_high_irq(unsigned int irq) { unsigned int pin; pin = GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET); clear_giuint(GIUINTENH, (uint16_t)1 << pin); write_giuint((uint16_t)1 << pin, GIUINTSTATH); }
static void ack_giuint_low_irq(unsigned int irq) { unsigned int pin; pin = GIU_IRQ_TO_PIN(irq); clear_giuint(GIUINTENL, (uint16_t)1 << pin); write_giuint((uint16_t)1 << pin, GIUINTSTATL); }
static unsigned int startup_giuint_low_irq(unsigned int irq) { unsigned int pin; pin = GIU_IRQ_TO_PIN(irq); write_giuint((uint16_t)1 << pin, GIUINTSTATL); set_giuint(GIUINTENL, (uint16_t)1 << pin); return 0; }
static unsigned int startup_giuint_high_irq(unsigned int irq) { unsigned int pin; pin = GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET); write_giuint((uint16_t)1 << pin, GIUINTSTATH); set_giuint(GIUINTENH, (uint16_t)1 << pin); return 0; }
int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)) { unsigned int pin; int retval; if (irq < GIU_IRQ(0) || irq > GIU_IRQ(31)) return -EINVAL; if(!get_irq_number) return -EINVAL; pin = GIU_IRQ_TO_PIN(irq); giuint_cascade[pin].flag = GIUINT_CASCADE; giuint_cascade[pin].get_irq_number = get_irq_number; retval = setup_irq(irq, &giu_cascade); if (retval != 0) { giuint_cascade[pin].flag = GIUINT_NO_CASCADE; giuint_cascade[pin].get_irq_number = no_irq_number; } return retval; }
static void end_giuint_high_irq(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) set_giuint(GIUINTENH, (uint16_t)1 << GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET)); }
static void enable_giuint_high_irq(unsigned int irq) { set_giuint(GIUINTENH, (uint16_t)1 << GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET)); }
static void shutdown_giuint_high_irq(unsigned int irq) { clear_giuint(GIUINTENH, (uint16_t)1 << GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET)); }
static void end_giuint_low_irq(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) set_giuint(GIUINTENL, (uint16_t)1 << GIU_IRQ_TO_PIN(irq)); }
static void enable_giuint_low_irq(unsigned int irq) { set_giuint(GIUINTENL, (uint16_t)1 << GIU_IRQ_TO_PIN(irq)); }
static void shutdown_giuint_low_irq(unsigned int irq) { clear_giuint(GIUINTENL, (uint16_t)1 << GIU_IRQ_TO_PIN(irq)); }