/*******************************************************************************
* gvlnSetPortUserPriLsb
*
* DESCRIPTION:
* This routine Set the user priority (VPT) LSB bit, to be added to the
* user priority on the egress.
*
* INPUTS:
* port - logical port number to set.
* userPriLsb - GT_TRUE for 1, GT_FALSE for 0.
*
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_BAD_PARAM - on bad parameters
*
* COMMENTS:
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gvlnSetPortUserPriLsb
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_BOOL userPriLsb
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* Data to be set into the */
/* register. */
GT_U8 phyPort; /* Physical port. */
DBG_INFO(("gvlnSetPortUserPriLsb Called.\n"));
/* Gigabit Switch does not support this status. */
if ((IS_IN_DEV_GROUP(dev,DEV_GIGABIT_SWITCH)) ||
(IS_IN_DEV_GROUP(dev,DEV_ENHANCED_FE_SWITCH)) ||
(IS_IN_DEV_GROUP(dev,DEV_FE_AVB_FAMILY)))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
phyPort = GT_LPORT_2_PORT(port);
BOOL_2_BIT(userPriLsb,data);
retVal = hwSetPortRegField(dev,phyPort,QD_REG_PVID,13,1,data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gstpSetPortState
*
* DESCRIPTION:
* This routine set the port state.
*
* INPUTS:
* port - the logical port number.
* state - the port state to set.
*
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
*
* COMMENTS:
*
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gstpSetPortState
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_PORT_STP_STATE state
)
{
GT_U8 phyPort; /* Physical port */
GT_U16 data; /* Data to write to register. */
GT_STATUS retVal; /* Functions return value. */
DBG_INFO(("gstpSetPortState Called.\n"));
phyPort = GT_LPORT_2_PORT(port);
data = state;
/* Set the port state bits. */
retVal= hwSetPortRegField(dev,phyPort, QD_REG_PORT_CONTROL,0,2,data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gstpGetPortState
*
* DESCRIPTION:
* This routine returns the port state.
*
* INPUTS:
* port - the logical port number.
*
* OUTPUTS:
* state - the current port state.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
*
* COMMENTS:
* None.
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gstpGetPortState
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_PORT_STP_STATE *state
)
{
GT_U8 phyPort; /* Physical port */
GT_U16 data; /* Data read from register. */
GT_STATUS retVal; /* Functions return value. */
DBG_INFO(("gstpGetPortState Called.\n"));
phyPort = GT_LPORT_2_PORT(port);
/* Get the port state bits. */
retVal = hwGetPortRegField(dev,phyPort, QD_REG_PORT_CONTROL,0,2,&data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
*state = data & 0x3;
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gpavSetIngressMonitor
*
* DESCRIPTION:
* This routine sets the Ingress Monitor bit in the PAV.
*
* INPUTS:
* port - the logical port number.
* mode - the ingress monitor bit in the PAV
* GT_FALSE: Ingress Monitor enabled
* GT_TRUE: Ingress Monitor disabled
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
*
* COMMENTS:
*
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gpavSetIngressMonitor
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_BOOL mode
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* Data to be set into the */
/* register. */
GT_U8 phyPort; /* Physical port. */
DBG_INFO(("gpavSetIngressMonitorCalled.\n"));
phyPort = GT_LPORT_2_PORT(port);
BOOL_2_BIT(mode,data);
/* check if device supports this feature */
if (!IS_IN_DEV_GROUP(dev,DEV_ENABLE_MONITORING))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
retVal = hwSetPortRegField(dev,phyPort,QD_REG_PORT_ASSOCIATION,15,1,data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gprtGetVlanTunnel
*
* DESCRIPTION:
* This routine get the vlan tunnel mode.
*
* INPUTS:
* port - the logical port number.
*
* OUTPUTS:
* mode - the vlan tunnel mode..
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_BAD_PARAM - on bad parameters
*
* COMMENTS:
*
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gprtGetVlanTunnel
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_BOOL *mode
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* The register's read data. */
GT_U8 phyPort; /* Physical port. */
DBG_INFO(("gprtGetVlanTunnel Called.\n"));
if(mode == NULL)
{
DBG_INFO(("Failed.\n"));
return GT_BAD_PARAM;
}
phyPort = GT_LPORT_2_PORT(port);
retVal = hwGetPortRegField(dev,phyPort,QD_REG_PORT_CONTROL,7,1,&data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
BIT_2_BOOL(data,*mode);
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gvlnSetPortVlanDBNum
*
* DESCRIPTION:
* This routine sets the port's default VLAN database number (DBNum or
* FID, Forwarding Information Database).
*
* INPUTS:
* port - logical port number to set.
* DBNum - database number for this port (or FID)
*
* OUTPUTS:
* None.
*
* RETURNS:IN GT_INGRESS_MODE mode
* GT_OK - on success
* GT_FAIL - on error
* GT_BAD_PARAM - on bad parameters
*
* COMMENTS:
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gvlnSetPortVlanDBNum
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_U32 DBNum
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U8 phyPort; /* Physical port. */
DBG_INFO(("gvlnSetPortVlanDBNum Called.\n"));
phyPort = GT_LPORT_2_PORT(port);
if(IS_IN_DEV_GROUP(dev,DEV_DBNUM_4096))
{
if(DBNum > 4095)
{
return GT_BAD_PARAM;
}
retVal = hwSetPortRegField(dev,phyPort,QD_REG_PORT_CONTROL1,0,8,(GT_U16)((DBNum & 0xFF0) >> 4));
retVal = hwSetPortRegField(dev,phyPort,QD_REG_PORT_VLAN_MAP,12,4,(GT_U16)(DBNum & 0x000F));
}
else if(IS_IN_DEV_GROUP(dev,DEV_DBNUM_256))
/*******************************************************************************
* gprtSetVlanTunnel
*
* DESCRIPTION:
* This routine sets the vlan tunnel mode.
*
* INPUTS:
* port - the logical port number.
* mode - the vlan tunnel mode.
*
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
*
* COMMENTS:
*
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gprtSetVlanTunnel
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_BOOL mode
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* Data to be set into the */
/* register. */
GT_U8 phyPort; /* Physical port. */
DBG_INFO(("gprtSetVlanTunnel Called.\n"));
phyPort = GT_LPORT_2_PORT(port);
BOOL_2_BIT(mode,data);
retVal = hwSetPortRegField(dev,phyPort,QD_REG_PORT_CONTROL,7,1,data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gstatsFlushPort
*
* DESCRIPTION:
* Flush All counters for a given port.
*
* INPUTS:
* port - the logical port number.
*
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
*
* COMMENTS:
* None
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gstatsFlushPort
(
IN GT_QD_DEV *dev,
IN GT_LPORT port
)
{
GT_STATUS retVal;
GT_U8 hwPort; /* physical port number */
DBG_INFO(("gstatsFlushPort Called.\n"));
/* translate logical port to physical port */
hwPort = GT_LPORT_2_PORT(port);
/* check if device supports this feature */
if((retVal = IS_VALID_API_CALL(dev,hwPort, DEV_RMON)) != GT_OK)
{
return retVal;
}
retVal = statsOperationPerform(dev,STATS_FLUSH_PORT,hwPort,0,NULL);
if(retVal != GT_OK)
{
DBG_INFO(("Failed (statsOperationPerform returned GT_FAIL).\n"));
return retVal;
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gvlnGetPortVid
*
* DESCRIPTION:
* This routine Get the port default vlan id.
*
* INPUTS:
* port - logical port number to set.
*
* OUTPUTS:
* vid - the port vlan id.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_BAD_PARAM - on bad parameters
*
* COMMENTS:
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gvlnGetPortVid
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_U16 *vid
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* The register's read data. */
GT_U8 phyPort; /* Physical port. */
DBG_INFO(("gvlnGetPortVid Called.\n"));
if(vid == NULL)
{
DBG_INFO(("Failed.\n"));
return GT_BAD_PARAM;
}
phyPort = GT_LPORT_2_PORT(port);
retVal = hwGetPortRegField(dev,phyPort,QD_REG_PVID,0,12, &data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
*vid = data;
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gprtGetPortCtr
*
* DESCRIPTION:
* This routine gets the port rx/tx counters.
*
* INPUTS:
* port - the logical port number.
*
* OUTPUTS:
* ctr - the counters value.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
*
* COMMENTS:
*
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gprtGetPortCtr
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_PORT_STAT *ctr
)
{
GT_U16 count; /* counters current value */
GT_U8 hwPort; /* physical port number */
DBG_INFO(("gprtGetPortCtr Called.\n"));
if (IS_IN_DEV_GROUP(dev,DEV_88E6093_FAMILY))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
if(ctr == NULL)
{
DBG_INFO(("Failed.\n"));
return GT_BAD_PARAM;
}
/* translate logical port to physical port */
hwPort = GT_LPORT_2_PORT(port);
/* get rx counter value */
if(hwReadPortReg(dev,hwPort, QD_REG_RX_COUNTER, &count) != GT_OK)
{
DBG_INFO(("Failed (Read Rx).\n"));
return GT_FAIL;
}
ctr->rxCtr = count;
/* get tx counter value */
if(hwReadPortReg(dev,hwPort, QD_REG_TX_COUNTER, &count) != GT_OK)
{
DBG_INFO(("Failed (Read Tx).\n"));
return GT_FAIL;
}
ctr->txCtr = count;
if (IS_IN_DEV_GROUP(dev,DEV_ENHANCED_FE_SWITCH))
{
/* get dropped counter value */
if(hwReadPortReg(dev,hwPort, QD_REG_DROPPED_COUNTER, &count) != GT_OK)
{
DBG_INFO(("Failed (Read Tx).\n"));
return GT_FAIL;
}
ctr->dropped = count;
}
else
ctr->dropped = 0;
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gprtSetEgressMode
*
* DESCRIPTION:
* This routine set the egress mode.
*
* INPUTS:
* port - the logical port number.
* mode - the egress mode.
*
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
*
* COMMENTS:
*
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gprtSetEgressMode
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_EGRESS_MODE mode
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* Data to be set into the */
/* register. */
GT_U8 phyPort; /* Physical port. */
DBG_INFO(("gprtSetEgressMode Called.\n"));
phyPort = GT_LPORT_2_PORT(port);
/* check if device supports this feature */
if((retVal = IS_VALID_API_CALL(dev,phyPort, DEV_TAGGING)) != GT_OK )
return retVal;
switch (mode)
{
case (GT_UNMODIFY_EGRESS):
data = 0;
break;
case (GT_TAGGED_EGRESS):
data = 2;
break;
case (GT_UNTAGGED_EGRESS):
data = 1;
break;
case (GT_ADD_TAG):
if(!IS_IN_DEV_GROUP(dev,DEV_EGRESS_DOUBLE_TAGGING))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
data = 3;
break;
default:
DBG_INFO(("Failed.\n"));
return GT_FAIL;
}
retVal = hwSetPortRegField(dev,phyPort,QD_REG_PORT_CONTROL,12,2,data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gvlnSetPortVlanPorts
*
* DESCRIPTION:
* This routine sets the port VLAN group port membership list.
*
* INPUTS:
* port - logical port number to set.
* memPorts - array of logical ports in the same vlan.
* memPortsLen - number of members in memPorts array
*
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_BAD_PARAM - on bad parameters
*
* COMMENTS:
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gvlnSetPortVlanPorts
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_LPORT memPorts[],
IN GT_U8 memPortsLen
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* Data to be set into the */
/* register. */
GT_U8 phyPort; /* Physical port. */
GT_U8 i;
DBG_INFO(("gvlnSetPortVlanPorts Called.\n"));
if(memPorts == NULL)
{
DBG_INFO(("Failed.\n"));
return GT_BAD_PARAM;
}
phyPort = GT_LPORT_2_PORT(port);
data = 0;
if(memPortsLen > dev->numOfPorts)
{
DBG_INFO(("Failed (PortsLen Too Big).\n"));
return GT_BAD_PARAM;
}
for(i = 0; i < memPortsLen; i++)
data |= (1 << GT_LPORT_2_PORT(memPorts[i]));
/* numOfPorts = 3 for fullsail, = 10 for octane, = 7 for others */
retVal = hwSetPortRegField(dev,phyPort,QD_REG_PORT_VLAN_MAP,0,dev->maxPorts,data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gpcsSetPCSAnEn
*
* DESCRIPTION:
* This routine sets Enable mode of PCS Inband Auto-Negotiation.
*
* INPUTS:
* port - the logical port number.
* mode - GT_TRUE to enable PCS AN mode or GT_FALSE otherwise
*
* OUTPUTS:
* None
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_NOT_SUPPORTED - if current device does not support this feature.
*
* COMMENTS:
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gpcsSetPCSAnEn
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_BOOL mode
)
{
GT_U16 data; /* Used to poll the SWReset bit */
GT_STATUS retVal; /* Functions return value. */
GT_U8 hwPort; /* the physical port number */
DBG_INFO(("gpcsSetPCSAnEn Called.\n"));
/* check if the given Switch supports this feature. */
if (!IS_IN_DEV_GROUP(dev,DEV_PCS))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
/* translate BOOL to binary */
BOOL_2_BIT(mode, data);
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(port);
/* check if the given port supports PCS */
if (!DOES_DEVPORT_SUPPORT_PCS(dev,hwPort))
{
if (!IS_IN_DEV_GROUP(dev, DEV_INTERNAL_GPHY))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
if ((hwPort < 4) || (hwPort > 7))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
}
/* Get the PCSAnEn bit. */
retVal = hwSetPortRegField(dev,hwPort, QD_REG_PCS_CONTROL,10,1,data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
}
else
{
DBG_INFO(("OK.\n"));
}
/* return */
return retVal;
}
/*******************************************************************************
* gprtGetSerdesMode
*
* DESCRIPTION:
* This routine reads Serdes Interface Mode.
*
* INPUTS:
* port - The physical SERDES device address(4/5)
*
* OUTPUTS:
* mode - Serdes Interface Mode
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
*
* COMMENTS:
* logical port number is supported only for the devices made production
* before 2009.
* (Serdes devices: 88E6131, 88E6122, 88E6108, 88E6161, 88E6165, 88E6352 and 88E320 family)
*
*******************************************************************************/
GT_STATUS gprtGetSerdesMode
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_SERDES_MODE *mode
)
{
GT_U16 u16Data; /* The register's read data. */
GT_U8 hwPort, serdesPort; /* the physical port number */
GT_U8 pageNum = _getSerdesPageNumber(dev);
GT_PHY_INFO serdesInfo;
DBG_INFO(("gprtGetSerdesMode Called.\n"));
if(!IS_IN_DEV_GROUP(dev,DEV_SERDES_CORE))
{
return GT_NOT_SUPPORTED;
}
/* check if input is logical port number */
hwPort = GT_LPORT_2_PORT(port);
serdesPort = hwPort;
GT_GET_SERDES_PORT(dev,&serdesPort);
gtSemTake(dev,dev->phyRegsSem,OS_WAIT_FOREVER);
/* check if the port is configurable */
if((serdesInfo.phyId=GT_GET_PHY_ID(dev,hwPort)) == GT_INVALID_PHY)
{
gtSemGive(dev,dev->phyRegsSem);
return GT_NOT_SUPPORTED;
}
if(driverFindPhyInformation(dev,hwPort,&serdesInfo) != GT_OK)
{
DBG_INFO(("Unknown PHY device.\n"));
gtSemGive(dev,dev->phyRegsSem);
return GT_FAIL;
}
/* Get Serdes Register. */
if(hwReadPagedPhyReg(dev,serdesPort,pageNum, 16,serdesInfo.anyPage,&u16Data) != GT_OK)
{
DBG_INFO(("Failed.\n"));
gtSemGive(dev,dev->phyRegsSem);
return GT_FAIL;
}
*mode = u16Data&0x3;
gtSemGive(dev,dev->phyRegsSem);
return GT_OK;
}
/*******************************************************************************
* gstuFindSidEntry
*
* DESCRIPTION:
* Find STU entry for a specific SID, it will return the entry, if found,
* along with its associated data
*
* INPUTS:
* stuEntry - contains the SID to searche for
*
* OUTPUTS:
* found - GT_TRUE, if the appropriate entry exists.
* stuEntry - the entry parameters.
*
* RETURNS:
* GT_OK - on success.
* GT_FAIL - on error or entry does not exist.
* GT_NO_SUCH - no such entry.
* GT_NOT_SUPPORTED - if current device does not support this feature.
*
* COMMENTS:
* Valid SID is 1 ~ 63.
*
*******************************************************************************/
GT_STATUS gstuFindSidEntry
(
IN GT_QD_DEV *dev,
INOUT GT_STU_ENTRY *stuEntry,
OUT GT_BOOL *found
)
{
GT_U8 valid;
GT_STATUS retVal;
GT_U8 port;
GT_LPORT lport;
GT_STU_ENTRY entry;
DBG_INFO(("gstuFindSidEntry Called.\n"));
/* check if device supports this feature */
if (!IS_IN_DEV_GROUP(dev,DEV_802_1S_STU))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
if((stuEntry->sid == 0) || (stuEntry->sid > 0x3F))
{
DBG_INFO(("GT_BAD_PARAM\n"));
return GT_BAD_PARAM;
}
*found = GT_FALSE;
/* Decrement 1 from sid */
entry.sid = stuEntry->sid-1;
valid = 0; /* valid is not used as input in this operation */
retVal = stuOperationPerform(dev,GET_NEXT_STU_ENTRY,&valid, &entry);
if(retVal != GT_OK)
{
DBG_INFO(("Failed (stuOperationPerform returned GT_FAIL).\n"));
return retVal;
}
/* retrive the value from the operation */
if ((entry.sid != stuEntry->sid) | (valid == 0))
return GT_NO_SUCH;
for(lport=0; lport<dev->numOfPorts; lport++)
{
port = GT_LPORT_2_PORT(lport);
stuEntry->portState[lport]=entry.portState[port];
}
*found = GT_TRUE;
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gsysInitCPUPort
*
* DESCRIPTION:
* This routine initializes CPU Port to required values. It is requred for Opus
*
* INPUTS:
* cpuPort - CPU Port
*
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_NOT_SUPPORTED - if current device does not support this feature.
*
* COMMENTS:
* None.
*
*******************************************************************************/
static GT_STATUS gsysInitCPUPort
(
IN GT_QD_DEV *dev,
IN GT_LPORT cpuPort
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U8 hwPort; /* the physical port number */
DBG_INFO(("gsysInitCPUPort Called.\n"));
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(cpuPort);
if (!IS_IN_DEV_GROUP(dev,DEV_CPU_PORT_NEED_INIT))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
if (cpuPort >= dev->numOfPorts)
{
return GT_BAD_PARAM;
}
/* Initialize the CPU Port. */
retVal = hwSetPortRegField(dev,hwPort, QD_REG_PORT_CONTROL, 11, 1, 1);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
retVal = hwSetPortRegField(dev,hwPort, QD_REG_PORT_CONTROL, 8, 2, 3);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
retVal = hwSetPortRegField(dev,hwPort, QD_REG_PORT_VLAN_MAP, 0, 10, 0x7ff);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
retVal = hwSetPortRegField(dev,hwPort, QD_REG_PORT_CONTROL2, 10, 4, 0);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gstuGetEntryNext
*
* DESCRIPTION:
* Gets next lexicographic STU entry from the specified SID.
*
* INPUTS:
* stuEntry - the SID to start the search.
*
* OUTPUTS:
* stuEntry - next STU entry.
*
* RETURNS:
* GT_OK - on success.
* GT_FAIL - on error or entry does not exist.
* GT_NO_SUCH - no more entries.
* GT_NOT_SUPPORTED - if current device does not support this feature.
*
* COMMENTS:
*
*******************************************************************************/
GT_STATUS gstuGetEntryNext
(
IN GT_QD_DEV *dev,
INOUT GT_STU_ENTRY *stuEntry
)
{
GT_U8 valid;
GT_STATUS retVal;
GT_U8 port;
GT_LPORT lport;
GT_STU_ENTRY entry;
DBG_INFO(("gstuGetEntryNext Called.\n"));
/* check if device supports this feature */
if (!IS_IN_DEV_GROUP(dev,DEV_802_1S_STU))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
if(stuEntry->sid >= 0x3F)
{
return GT_NO_SUCH;
}
else
{
entry.sid = stuEntry->sid;
}
valid = 0;
retVal = stuOperationPerform(dev,GET_NEXT_STU_ENTRY,&valid, &entry);
if(retVal != GT_OK)
{
DBG_INFO(("Failed (stuOperationPerform returned GT_FAIL).\n"));
return retVal;
}
/* retrieve the value from the operation */
if((entry.sid == 0x3F) && (valid == 0))
return GT_NO_SUCH;
stuEntry->sid = entry.sid;
for(lport=0; lport<dev->numOfPorts; lport++)
{
port = GT_LPORT_2_PORT(lport);
stuEntry->portState[lport]=entry.portState[port];
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gpcsGetPCSLink
*
* DESCRIPTION:
* This routine retrieves Link up status in PCS
*
* INPUTS:
* port - the logical port number.
*
* OUTPUTS:
* state - GT_TRUE for Comma Detected or GT_FALSE otherwise
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_NOT_SUPPORTED - if current device does not support this feature.
*
* COMMENTS:
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gpcsGetPCSLink
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_BOOL *state
)
{
GT_U16 data; /* Used to poll the SWReset bit */
GT_STATUS retVal; /* Functions return value. */
GT_U8 hwPort; /* the physical port number */
DBG_INFO(("gpcsGetPCSLink Called.\n"));
/* check if the given Switch supports this feature. */
if (!IS_IN_DEV_GROUP(dev,DEV_PCS))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
/* check if the given Switch supports this feature. */
if (!IS_IN_DEV_GROUP(dev,DEV_PCS_LINK))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(port);
if (!DOES_DEVPORT_SUPPORT_PCS(dev,hwPort))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
/* Get the PCS Link bit. */
retVal = hwGetPortRegField(dev,hwPort, QD_REG_PCS_CONTROL,15,1,&data);
/* translate binary to BOOL */
BIT_2_BOOL(data, *state);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
}
else
{
DBG_INFO(("OK.\n"));
}
/* return */
return retVal;
}
GT_STATUS gprtGetPhyIntPortSummary
(
IN GT_QD_DEV *dev,
OUT GT_U16 *intPortMask
)
{
GT_STATUS retVal;
GT_U8 hwPort; /* the physical port number */
GT_U16 portVec;
#ifdef GT_USE_MAD
if (dev->use_mad==GT_TRUE)
return gprtGetPhyIntPortSummary_mad(dev, intPortMask);
#endif
DBG_INFO(("gprtGetPhyIntPortSummary Called.\n"));
/* translate LPORT 0 to hardware port */
hwPort = GT_LPORT_2_PORT(0);
*intPortMask=0;
if (IS_IN_DEV_GROUP(dev,DEV_DEV_PHY_INTERRUPT))
{
return GT_NOT_SUPPORTED;
}
if (IS_IN_DEV_GROUP(dev,DEV_INTERNAL_GPHY))
{
/* get the interrupt port summary from global register */
retVal = hwGetGlobal2RegField(dev,QD_REG_PHYINT_SOURCE,0,dev->maxPorts,&portVec);
GT_GIG_PHY_INT_MASK(dev,portVec);
*intPortMask = (GT_U16)GT_PORTVEC_2_LPORTVEC(portVec);
}
else
{
/* get the interrupt port summary from phy */
retVal = hwReadPhyReg(dev,hwPort, QD_PHY_INT_PORT_SUMMARY_REG, &portVec);
*intPortMask = (GT_U16)GT_PORTVEC_2_LPORTVEC(portVec);
}
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
}
else
{
DBG_INFO(("OK.\n"));
}
return retVal;
}
/*******************************************************************************
* gprtGetEgressMode
*
* DESCRIPTION:
* This routine get the egress mode.
*
* INPUTS:
* port - the logical port number.
*
* OUTPUTS:
* mode - the egress mode.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_BAD_PARAM - on bad parameters
*
* COMMENTS:
* None.
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gprtGetEgressMode
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_EGRESS_MODE *mode
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* The register's read data. */
GT_U8 phyPort; /* Physical port. */
if(mode == NULL)
return GT_BAD_PARAM;
DBG_INFO(("gprtGetEgressMode Called.\n"));
phyPort = GT_LPORT_2_PORT(port);
/* check if device supports this feature */
if((retVal = IS_VALID_API_CALL(dev,phyPort, DEV_TAGGING)) != GT_OK )
return retVal;
retVal = hwGetPortRegField(dev,phyPort,QD_REG_PORT_CONTROL,12,2,&data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
switch (data)
{
case (0):
*mode = GT_UNMODIFY_EGRESS;
break;
case (2):
*mode = GT_TAGGED_EGRESS;
break;
case (1):
*mode = GT_UNTAGGED_EGRESS;
break;
case (3):
*mode = GT_ADD_TAG;
break;
}
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gprtSetPortDuplexMode
*
* DESCRIPTION:
* Sets duplex mode for a specific logical port. This function will keep the speed
* and loopback mode to the previous value, but disable others, such as Autonegotiation.
*
* INPUTS:
* port - logical port number
* dMode - dulpex mode
*
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
*
* COMMENTS:
* data sheet register 0.8 - Duplex Mode
*
*******************************************************************************/
GT_STATUS gprtSetPortDuplexMode
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_BOOL dMode
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U8 hwPort; /* the physical port number */
GT_U16 u16Data;
DBG_INFO(("gprtSetPortDuplexMode Called.\n"));
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(port);
/* check if the port is configurable */
if(!IS_CONFIGURABLE_PHY(dev,hwPort))
{
return GT_NOT_SUPPORTED;
}
if(hwReadPhyReg(dev,hwPort,QD_PHY_CONTROL_REG,&u16Data) != GT_OK)
{
DBG_INFO(("Not able to read Phy Reg(port:%d,offset:%d).\n",hwPort,QD_PHY_CONTROL_REG));
return GT_FAIL;
}
if(dMode)
{
u16Data = QD_PHY_RESET | (u16Data & (QD_PHY_LOOPBACK | QD_PHY_SPEED)) | QD_PHY_DUPLEX;
}
else
{
u16Data = QD_PHY_RESET | (u16Data & (QD_PHY_LOOPBACK | QD_PHY_SPEED));
}
DBG_INFO(("Write to phy(%d) register: regAddr 0x%x, data %#x",
hwPort,QD_PHY_CONTROL_REG,u16Data));
/* Write to Phy Control Register. */
retVal = hwWritePhyReg(dev,hwPort,QD_PHY_CONTROL_REG,u16Data);
if(retVal != GT_OK)
DBG_INFO(("Failed.\n"));
else
DBG_INFO(("OK.\n"));
return retVal;
}
GT_STATUS gprtPortPowerDown
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_BOOL state
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U8 hwPort; /* the physical port number */
GT_U16 u16Data;
DBG_INFO(("gprtPortPowerDown Called.\n"));
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(port);
/* check if the port is configurable */
if(!IS_CONFIGURABLE_PHY(dev,hwPort))
{
return GT_NOT_SUPPORTED;
}
if(state)
{
if(phySetAutoMode(dev, hwPort,SPEED_AUTO_DUPLEX_AUTO) != GT_OK)
{
DBG_INFO(("Setting AutoMode Failed.\n"));
return GT_FAIL;
}
u16Data = QD_PHY_POWER;
}
else
{
u16Data = QD_PHY_SPEED | QD_PHY_DUPLEX | QD_PHY_AUTONEGO;
}
DBG_INFO(("Write to phy(%d) register: regAddr 0x%x, data %#x",
hwPort,QD_PHY_CONTROL_REG,u16Data));
/* Write to Phy Control Register. */
retVal = hwWritePhyReg(dev,hwPort,QD_PHY_CONTROL_REG,u16Data);
if(retVal != GT_OK)
DBG_INFO(("Failed.\n"));
else
DBG_INFO(("OK.\n"));
return retVal;
}
GT_STATUS gprtSetPause
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_BOOL state
)
{
GT_U8 hwPort; /* the physical port number */
GT_U16 u16Data;
GT_STATUS retVal = GT_OK;
DBG_INFO(("phySetPause Called.\n"));
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(port);
/* check if the port is configurable */
if(!IS_CONFIGURABLE_PHY(dev,hwPort))
{
return GT_NOT_SUPPORTED;
}
if(hwReadPhyReg(dev,hwPort,QD_PHY_AUTONEGO_AD_REG,&u16Data) != GT_OK)
{
DBG_INFO(("Not able to read Phy Reg(port:%d,offset:%d).\n",hwPort,QD_PHY_AUTONEGO_AD_REG));
return GT_FAIL;
}
if(state == GT_TRUE)
{
/* Set the Pause bit. */
u16Data |= QD_PHY_PAUSE;
}
else
{
/* Reset the Pause bit. */
u16Data &= ~QD_PHY_PAUSE;
}
/* Write to Phy AutoNegotiation Advertisement Register. */
if(hwWritePhyReg(dev,hwPort,QD_PHY_AUTONEGO_AD_REG,u16Data) != GT_OK)
{
DBG_INFO(("Not able to write Phy Reg(port:%d,offset:%d,data:%#x).\n",hwPort,QD_PHY_AUTONEGO_AD_REG,u16Data));
return GT_FAIL;
}
return retVal;
}
/*******************************************************************************
* gpcsSetRGMIITimingDelay
*
* DESCRIPTION:
* RGMII receive/transmit Timing Control. This api adds delay to RXCLK for
* IND inputs and GTXCLK for OUTD outputs when port is in RGMII mode.
* Change to this bit are disruptive to normal operation. Hence any changes
* to this register must be done only while the port's link is down.
*
* INPUTS:
* port - the logical port number.
* rxmode - GT_FALSE for default setup, GT_TRUE for adding delay to rxclk
* txmode - GT_FALSE for default setup, GT_TRUE for adding delay to txclk
*
* OUTPUTS:
* None
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_NOT_SUPPORTED - if current device does not support this feature.
*
* COMMENTS:
*
*******************************************************************************/
GT_STATUS gpcsSetRGMIITimingDelay
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
IN GT_BOOL rxmode,
IN GT_BOOL txmode
)
{
GT_U16 data;
GT_STATUS retVal; /* Functions return value. */
GT_U8 hwPort; /* the physical port number */
DBG_INFO(("gpcsSetRGMIITimingDelay Called.\n"));
if (!IS_IN_DEV_GROUP(dev,DEV_RGMII_TIMING))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(port);
if (hwPort < (dev->maxPorts - 2))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
data = (rxmode) ? 2 : 0;
data |= (txmode) ? 1 : 0;
/* Set the register bit(s). */
retVal = hwSetPortRegField(dev,hwPort, QD_REG_PCS_CONTROL,14,2,data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
}
else
{
DBG_INFO(("OK.\n"));
}
/* return */
return retVal;
}
/*******************************************************************************
* gvlnGetPortVlanPorts
*
* DESCRIPTION:
* This routine gets the port VLAN group port membership list.
*
* INPUTS:
* port - logical port number to set.
*
* OUTPUTS:
* memPorts - array of logical ports in the same vlan.
* memPortsLen - number of members in memPorts array
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_BAD_PARAM - on bad parameters
*
* COMMENTS:
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gvlnGetPortVlanPorts
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_LPORT memPorts[],
OUT GT_U8 *memPortsLen
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* The register's read data. */
GT_U8 phyPort; /* Physical port. */
GT_U8 i;
DBG_INFO(("gvlnGetPortVlanPorts Called.\n"));
if((memPorts == NULL) || (memPortsLen == NULL))
{
DBG_INFO(("Failed.\n"));
return GT_BAD_PARAM;
}
phyPort = GT_LPORT_2_PORT(port);
/* memPortsLen = 3 for fullsail, =7 for others */
retVal = hwGetPortRegField(dev,phyPort,QD_REG_PORT_VLAN_MAP,0,dev->maxPorts,&data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
i = 0;
for(phyPort = 0; phyPort < dev->maxPorts; phyPort++)
{
if(!GT_IS_PORT_SET(dev->validPortVec, phyPort))
continue;
if(((1 << phyPort) & data) != 0)
{
memPorts[i] = GT_PORT_2_LPORT(phyPort);
i++;
}
}
*memPortsLen = i;
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gpcsSetRestartPCSAn
*
* DESCRIPTION:
* This routine restarts PCS Inband Auto-Negotiation.
*
* INPUTS:
* port - the logical port number.
*
* OUTPUTS:
* None
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_NOT_SUPPORTED - if current device does not support this feature.
*
* COMMENTS:
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gpcsSetRestartPCSAn
(
IN GT_QD_DEV *dev,
IN GT_LPORT port
)
{
GT_U16 data; /* Used to poll the SWReset bit */
GT_STATUS retVal; /* Functions return value. */
GT_U8 hwPort; /* the physical port number */
DBG_INFO(("gpcsSetRestartPCSAn Called.\n"));
/* check if the given Switch supports this feature. */
if (!IS_IN_DEV_GROUP(dev,DEV_PCS))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
data = 1; /* to set RestartPCSAn bit */
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(port);
/* check if the given port supports PCS */
if (!DOES_DEVPORT_SUPPORT_PCS(dev,hwPort))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
/* Get the RestartPCSAn bit. */
retVal = hwSetPortRegField(dev,hwPort, QD_REG_PCS_CONTROL,9,1,data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
}
else
{
DBG_INFO(("OK.\n"));
}
/* return */
return retVal;
}
/*******************************************************************************
* lport2phy
*
* DESCRIPTION:
* This function converts logical port number to physical phy number.
*
* INPUTS:
* portVec - physical port list in vector
* port - logical port number
* OUTPUTS:
* None.
* RETURNS:
* physical port number
*
* COMMENTS:
*
*******************************************************************************/
GT_U8 lport2phy
(
IN GT_QD_DEV *dev,
IN GT_LPORT port
)
{
GT_U8 hwPort;
/* check if it's for SERDES */
if(dev->validSerdesVec & (1<<port))
{
hwPort = (GT_U8)port;
}
else
{
hwPort = GT_LPORT_2_PORT(port);
}
return hwPort;
}
/*******************************************************************************
* gpavGetIngressMonitor
*
* DESCRIPTION:
* This routine gets the Ingress Monitor bit in the PAV.
*
* INPUTS:
* port - the logical port number.
*
* OUTPUTS:
* mode - the ingress monitor bit in the PAV
* GT_FALSE: Ingress Monitor enabled
* GT_TRUE: Ingress Monitor disabled
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_BAD_PARAM - on bad parameters
*
* COMMENTS:
*
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gpavGetIngressMonitor
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_BOOL *mode
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* The register's read data. */
GT_U8 phyPort; /* Physical port. */
DBG_INFO(("grcGetIngressMonitor Called.\n"));
if(mode == NULL)
{
DBG_INFO(("Failed.\n"));
return GT_BAD_PARAM;
}
phyPort = GT_LPORT_2_PORT(port);
/* check if device supports this feature */
if((retVal = IS_VALID_API_CALL(dev,phyPort, DEV_PORT_MONITORING)) != GT_OK )
return retVal;
if (!IS_IN_DEV_GROUP(dev,DEV_ENABLE_MONITORING))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
retVal = hwGetPortRegField(dev,phyPort,QD_REG_PORT_ASSOCIATION,15,1,&data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
BIT_2_BOOL(data,*mode);
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* gvlnGetPortUserPriLsb
*
* DESCRIPTION:
* This routine gets the user priority (VPT) LSB bit.
*
* INPUTS:
* port - logical port number to set.
*
* OUTPUTS:
* userPriLsb - GT_TRUE for 1, GT_FALSE for 0.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_BAD_PARAM - on bad parameters
*
* COMMENTS:
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gvlnGetPortUserPriLsb
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_BOOL *userPriLsb
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* The register's read data. */
GT_U8 phyPort; /* Physical port. */
DBG_INFO(("gvlnGetPortUserPriLsb Called.\n"));
/* Gigabit Switch does not support this status. */
if ((IS_IN_DEV_GROUP(dev,DEV_GIGABIT_SWITCH)) ||
(IS_IN_DEV_GROUP(dev,DEV_ENHANCED_FE_SWITCH)) ||
(IS_IN_DEV_GROUP(dev,DEV_FE_AVB_FAMILY)))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
if(userPriLsb == NULL)
{
DBG_INFO(("Failed.\n"));
return GT_BAD_PARAM;
}
phyPort = GT_LPORT_2_PORT(port);
retVal = hwGetPortRegField(dev,phyPort,QD_REG_PVID,13,1,&data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
BIT_2_BOOL(data,*userPriLsb);
DBG_INFO(("OK.\n"));
return GT_OK;
}
GT_STATUS gprtPortRestartAutoNeg
(
IN GT_QD_DEV *dev,
IN GT_LPORT port
)
{
GT_STATUS retVal;
GT_U8 hwPort; /* the physical port number */
GT_U16 u16Data;
DBG_INFO(("gprtPortRestartAutoNeg Called.\n"));
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(port);
/* check if the port is configurable */
if(!IS_CONFIGURABLE_PHY(dev,hwPort))
{
return GT_NOT_SUPPORTED;
}
if(hwReadPhyReg(dev,hwPort,QD_PHY_CONTROL_REG,&u16Data) != GT_OK)
{
DBG_INFO(("Not able to read Phy Reg(port:%d,offset:%d).\n",hwPort,QD_PHY_CONTROL_REG));
return GT_FAIL;
}
u16Data &= (QD_PHY_DUPLEX | QD_PHY_SPEED);
u16Data |= (QD_PHY_RESTART_AUTONEGO | QD_PHY_AUTONEGO);
DBG_INFO(("Write to phy(%d) register: regAddr 0x%x, data %#x",
hwPort,QD_PHY_CONTROL_REG,u16Data));
/* Write to Phy Control Register. */
retVal = hwWritePhyReg(dev,hwPort,QD_PHY_CONTROL_REG,u16Data);
if(retVal != GT_OK)
DBG_INFO(("Failed.\n"));
else
DBG_INFO(("OK.\n"));
return retVal;
}
