/*
* ======== IRESMAN_EDMA3CHAN_init ========
* Function to initialize the device specific resource manager implementation
*/
IRES_Status IRESMAN_EDMA3CHAN_init(IRESMAN_Params * initArgs)
{
IRESMAN_Edma3ChanParams * resmanArgs = (IRESMAN_Edma3ChanParams *)initArgs;
if ( 0 == gtInit) {
GT_init();
GT_create(&CURTRACE, "ti.sdo.fc.ires.edma3Chan");
gtInit = 1;
}
GT_1trace(CURTRACE, GT_ENTER,
"IRESMAN_EDMA3CHAN_init> Enter (initArgs=0x%x)\n", initArgs);
GT_assert(CURTRACE, initArgs != NULL);
/*
* Information regarding the memory allocation/free functions
* is stored as part of the internal state of the resource
* manager
*/
_allocFxn = resmanArgs->baseConfig.allocFxn;
_freeFxn = resmanArgs->baseConfig.freeFxn;
if (!(_initialized)) {
/*
* Set Initalized flag to 1 if successful
*/
_initialized = 1;
}
GT_0trace(CURTRACE, GT_ENTER,
"IRESMAN_EDMA3CHAN_init> Exit (status=IRES_OK)\n");
return (IRES_OK);
}
/**
* @brief The main() entry point.
*/
Int main(Int argc, String argv[])
{
/* init trace */
GT_init();
/* create a mask to allow a trace-print welcome message below */
GT_create(&curMask, MOD_NAME);
/* Enable all trace for this module */
GT_set(MOD_NAME "=01234567");
/*
* Init Codec Engine.
* Note that env vars may enable/disable additional trace in this call
*/
CERuntime_init();
GT_0trace(curMask, GT_2CLASS, "main> " MOD_NAME "\n");
return (smain(argc, argv));
}
/*
* ======== IRESMAN_EDMA3CHAN_getProtocolName ========
* Function to return the name of the protocol
*/
String IRESMAN_EDMA3CHAN_getProtocolName()
{
if (0 == gtInit) {
GT_init();
GT_create(&CURTRACE, "ti.sdo.fc.ires.edma3Chan");
gtInit = 1;
}
GT_0trace(CURTRACE, GT_ENTER,
"IRESMAN_EDMA3CHAN_getProtocolName> Enter\n");
GT_1trace(CURTRACE, GT_ENTER,
"IRESMAN_EDMA3CHAN_getProtocolName> Exit (name=%s)\n",
IRESMAN_EDMA3CHAN_CONSTRUCTFXNS.getName());
return (IRESMAN_EDMA3CHAN_CONSTRUCTFXNS.getName());
}
/*
* ======== VIDDEC2FRONT_create ========
*/
VIDDEC2FRONT_Handle VIDDEC2FRONT_create(Engine_Handle engine, String name,
VIDDEC2_Params *params)
{
VIDDEC2FRONT_Handle visa;
static Bool curInit = FALSE;
if (curInit != TRUE) {
curInit = TRUE;
GT_create(&CURTRACE, GTNAME);
}
GT_3trace(CURTRACE, GT_ENTER, "VIDDEC2FRONT_create> "
"Enter (engine=0x%x, name='%s', params=0x%x)\n",
engine, name, params);
visa = VISA_create(engine, name, (IALG_Params *)params,
sizeof (_VIDDEC2FRONT_Msg), "ti.sdo.ce.video2.split.IVIDDEC2FRONT");
GT_1trace(CURTRACE, GT_ENTER, "VIDDEC2FRONT_create> return (0x%x)\n", visa);
return (visa);
}
/*
* ======== STRM_Init ========
* Purpose:
* Initialize the STRM module.
*/
bool STRM_Init(void)
{
bool fRetVal = true;
DBC_Require(cRefs >= 0);
if (cRefs == 0) {
#if GT_TRACE
DBC_Assert(!STRM_debugMask.flags);
GT_create(&STRM_debugMask, "ST"); /* "ST" for STrm */
#endif
}
if (fRetVal)
cRefs++;
GT_1trace(STRM_debugMask, GT_5CLASS, "STRM_Init(), ref count: 0x%x\n",
cRefs);
DBC_Ensure((fRetVal && (cRefs > 0)) || (!fRetVal && (cRefs >= 0)));
return fRetVal;
}
/*
* ======== MEM_Init ========
* Purpose:
* Initialize MEM module private state.
*/
bool MEM_Init(void)
{
DBC_Require(cRefs >= 0);
if (cRefs == 0) {
GT_create(&MEM_debugMask, "MM"); /* MM for MeM module */
#ifdef MEM_CHECK
mMan.lst.head.next = &mMan.lst.head;
mMan.lst.head.prev = &mMan.lst.head;
mMan.lst.head.self = NULL;
#endif
}
cRefs++;
GT_1trace(MEM_debugMask, GT_5CLASS, "MEM_Init: cRefs 0x%x\n", cRefs);
DBC_Ensure(cRefs > 0);
return true;
}
/*
* ======== Processor_init ========
*/
Void Processor_init(Void)
{
if (curInit != TRUE) {
curInit = TRUE;
GT_create(&curTrace, Processor_GTNAME);
/* Semaphore with count 0, will be posted when a command is present */
dcmd.cmdPresent = Sem_create(CMDKEY, 0);
/* Semaphore with count 0, will be posted when reply is ready */
dcmd.replyPresent = Sem_create(REPLYKEY, 0);
/*
* Create lock to allow only one thread at a time to send command
* to the daemon.
*/
dcmd.gate = Lock_create(NULL);
if ((dcmd.cmdPresent == NULL) || (dcmd.replyPresent == NULL) ||
(dcmd.gate == NULL)) {
// TODO: Shouldn't we abort?
GT_0trace(curTrace, GT_7CLASS, "Processor_init> ERROR: cannot"
" create semaphores or lock\n");
}
if ((dcmd.dproc = Thread_create((Fxn)daemon, NULL)) == NULL) {
GT_0trace(curTrace, GT_7CLASS, "Processor_init> "
"ERROR: cannot create DSP daemon\n");
}
Power_init();
Global_atexit((Fxn)cleanup);
}
}
/*
* ======== MEMUTILS_getPhysicalAddr ========
* Converts user virtual address to physical address,
* Returns 0 on failure, physical address on success.
*/
Void * MEMUTILS_getPhysicalAddr(Ptr addr)
{
UInt32 physicalAddress = 0;
#if GT_TRACE
if (!(gtInit)) {
GT_init();
GT_create(&curTrace, "ti.sdo.fc.memutils");
gtInit = 1;
}
#endif
CMEM_init();
physicalAddress = CMEM_getPhys(addr);
GT_2trace(curTrace, GT_1CLASS, "MEMUTILS_getPhysicalAddr> "
"CMEM_getPhys(0x%x) = 0x%x.\n", addr, physicalAddress);
GT_1trace(curTrace, GT_ENTER, "MEMUTILS_getPhysicalAddr> "
"return (0x%x)\n", physicalAddress);
CMEM_exit();
return ((Void *)physicalAddress);
}
/*
* ======== IRESMAN_EDMA3CHAN_getProtocolRevision ========
* Function to return the revision of the protocol
*/
IRES_ProtocolRevision * IRESMAN_EDMA3CHAN_getProtocolRevision()
{
IRES_ProtocolRevision * version;
if ( 0 == gtInit) {
GT_init();
GT_create(&CURTRACE, "ti.sdo.fc.ires.edma3Chan");
gtInit = 1;
}
GT_0trace(CURTRACE, GT_ENTER,
"IRESMAN_EDMA3CHAN_getProtocolRevision> Enter\n");
version = IRESMAN_EDMA3CHAN_CONSTRUCTFXNS.getRevision();
GT_3trace(CURTRACE, GT_ENTER,
"IRESMAN_EDMA3CHAN_getProtocolRevision> Exit (version=(%d.%d.%d))"
"\n", version->Major, version->Source, version->Radius);
return (version);
}
/*
* ======== VIDDECCOPY_TI_alloc ========
*/
Int VIDDECCOPY_TI_alloc(const IALG_Params *algParams,
IALG_Fxns **pf, IALG_MemRec memTab[])
{
if (curTrace.modName == NULL) { /* initialize GT (tracing) */
GT_create(&curTrace, GTNAME);
}
GT_3trace(curTrace, GT_ENTER, "VIDDECCOPY_TI_alloc(0x%lx, 0x%lx, 0x%lx)\n",
algParams, pf, memTab);
/* Request memory for my object */
memTab[0].size = sizeof(VIDDECCOPY_TI_Obj);
memTab[0].alignment = 0;
memTab[0].space = IALG_EXTERNAL;
memTab[0].attrs = IALG_PERSIST;
// memTab[1].size = OFRAMESIZE;
// memTab[1].alignment = 0;
// memTab[1].space = IALG_EXTERNAL;
// memTab[1].attrs = IALG_SCRATCH;
// return (2);
return(1);
}
/*
* ======== NTFY_Init ========
* Purpose:
* Initialize the NTFY module.
*/
bool NTFY_Init(void)
{
GT_create(&NTFY_debugMask, "NY"); /* "NY" for NtfY */
return true;
}
/*
* ======== DSP_Init ========
* Allocates bridge resources. Loads a base image onto DSP, if specified.
*/
u32 DSP_Init(OUT u32 *initStatus)
{
char devNode[MAXREGPATHLENGTH] = "TIOMAP1510";
DSP_STATUS status = DSP_EFAIL;
struct DRV_OBJECT *drvObject = NULL;
u32 index = 0;
u32 deviceNode;
u32 deviceNodeString;
GT_create(&curTrace, "DD");
GT_0trace(curTrace, GT_ENTER, "Entering DSP_Init \r\n");
if (DSP_FAILED(WCD_Init())) {
GT_0trace(curTrace, GT_7CLASS, "DSP_Init Failed \n");
goto func_cont;
} /* End WCD_Exit */
if (DSP_FAILED(DRV_Create(&drvObject))) {
GT_0trace(curTrace, GT_7CLASS, "DSP_Init:DRV_Create Failed \n");
WCD_Exit();
goto func_cont;
} /* End DRV_Create */
GT_0trace(curTrace, GT_5CLASS, "DSP_Init:DRV Created \r\n");
/* Request Resources */
if (DSP_SUCCEEDED(DRV_RequestResources((u32)&devNode,
&deviceNodeString))) {
/* Attempt to Start the Device */
if (DSP_SUCCEEDED(DEV_StartDevice(
(struct CFG_DEVNODE *)deviceNodeString))) {
/* Retreive the DevObject from the Registry */
GT_2trace(curTrace, GT_1CLASS,
"DSP_Init Succeeded for Device1:"
"%d: value: %x\n", index, deviceNodeString);
status = DSP_SOK;
} else {
GT_0trace(curTrace, GT_7CLASS,
"DSP_Init:DEV_StartDevice Failed\n");
(void)DRV_ReleaseResources
((u32) deviceNodeString, drvObject);
status = DSP_EFAIL;
}
} else {
GT_0trace(curTrace, GT_7CLASS,
"DSP_Init:DRV_RequestResources Failed \r\n");
status = DSP_EFAIL;
} /* DRV_RequestResources */
index++;
/* Unwind whatever was loaded */
if (DSP_FAILED(status)) {
/* irrespective of the status of DEV_RemoveDevice we conitinue
* unloading. Get the Driver Object iterate through and remove.
* Reset the status to E_FAIL to avoid going through
* WCD_InitComplete2. */
status = DSP_EFAIL;
for (deviceNode = DRV_GetFirstDevExtension(); deviceNode != 0;
deviceNode = DRV_GetNextDevExtension(deviceNode)) {
(void)DEV_RemoveDevice
((struct CFG_DEVNODE *)deviceNode);
(void)DRV_ReleaseResources((u32)deviceNode,
drvObject);
}
/* Remove the Driver Object */
(void)DRV_Destroy(drvObject);
drvObject = NULL;
WCD_Exit();
GT_0trace(curTrace, GT_7CLASS,
"DSP_Init:Logical device Failed to Load\n");
} /* Unwinding the loaded drivers */
func_cont:
/* Attempt to Start the Board */
if (DSP_SUCCEEDED(status)) {
/* BRD_AutoStart could fail if the dsp execuetable is not the
* correct one. We should not propagate that error
* into the device loader. */
(void)WCD_InitComplete2();
GT_0trace(curTrace, GT_1CLASS, "DSP_Init Succeeded\n");
} else {
GT_0trace(curTrace, GT_7CLASS, "DSP_Init Failed\n");
} /* End WCD_InitComplete2 */
DBC_Ensure((DSP_SUCCEEDED(status) && drvObject != NULL) ||
(DSP_FAILED(status) && drvObject == NULL));
*initStatus = status;
/* Return the Driver Object */
return (u32)drvObject;
}
/*
* ======== SERVICES_Init ========
* Purpose:
* Initializes SERVICES modules.
*/
bool SERVICES_Init(void)
{
bool fInit = true;
bool fCFG, fCSL, fDBG, fDPC, fKFILE, fLST, fMEM;
bool fREG, fSYNC, fCLK, fNTFY;
DBC_Require(cRefs >= 0);
if (cRefs == 0) {
GT_init();
GT_create(&SERVICES_debugMask, "OS"); /* OS for OSal */
GT_0trace(SERVICES_debugMask, GT_ENTER,
"SERVICES_Init: entered\n");
/* Perform required initialization of SERVICES modules. */
fMEM = MEM_Init();
fREG = REG_Init();
fCFG = CFG_Init();
fCSL = CSL_Init();
fDBG = DBG_Init();
fDPC = DPC_Init();
fKFILE = KFILE_Init();
fLST = LST_Init();
fSYNC = SYNC_Init();
fCLK = CLK_Init();
fNTFY = NTFY_Init();
fInit = fCFG && fCSL && fDBG && fDPC && fKFILE &&
fLST && fMEM && fREG && fSYNC && fCLK;
if (!fInit) {
if (fNTFY)
NTFY_Exit();
if (fSYNC)
SYNC_Exit();
if (fCLK)
CLK_Exit();
if (fREG)
REG_Exit();
if (fLST)
LST_Exit();
if (fKFILE)
KFILE_Exit();
if (fDPC)
DPC_Exit();
if (fDBG)
DBG_Exit();
if (fCSL)
CSL_Exit();
if (fCFG)
CFG_Exit();
if (fMEM)
MEM_Exit();
}
}
if (fInit)
cRefs++;
GT_1trace(SERVICES_debugMask, GT_5CLASS, "SERVICES_Init: cRefs 0x%x\n",
cRefs);
DBC_Ensure((fInit && (cRefs > 0)) || (!fInit && (cRefs >= 0)));
return fInit;
}
/*
* ======== main ========
*/
Int main(Int argc, String argv[])
{
CERuntime_init();
GT_create(&curMask, "ZZ");
/* Enable all trace for this "ZZ" module */
GT_set("ZZ=01234567");
GT_0trace(curMask, GT_2CLASS, "main> Welcome to app's main().\n");
// those code is support Qt display , the RGB display is OK , but grayscale is not my I wish !! because the pixel is error I guess!!
#if 0
/*
QApplication app(argc,argv,true);
QLabel label;
QImage qimage;
QSplashScreen *splash = new QSplashScreen;
QVector<QRgb> grayColourTable;
QRgb *colourtable = new QRgb[256];*/
unsigned char *frame_buffer_video = (unsigned char*)malloc(300*320*240*3*sizeof(unsigned char));
unsigned char *frame_buffer_3_channel_gray = (unsigned char*)malloc(320*240*3*sizeof(unsigned char));
int count , i , j;
//cat the video by the smain function , the video include 300 frame
frame_buffer_video = smain(argc,argv);
//show the video capture by using Qt , the video include 300 frame
for(count=0;count<300; count++ )
{
// (R1,G1,B1) ----> (Gray1,Gray1,Gray1)
/*for(i=0;i<320*240;i++)
{
for(j=0;j<3;j++)
{frame_buffer_3_channel[j+i*3] = frame_buffer_video[i + count*320*240];}
}*/
//RGB888 to GrayScale
for (i=0;i<320*240;i++)
{
for(j=0;j<3;j++)
{
(frame_buffer_3_channel_gray[j+i*3]) = ( *(frame_buffer_video + count*320*240*3+i)*0.299 + *(frame_buffer_video + count*320*240*3 +i +1)*0.587 + *(frame_buffer_video + count*320*240*3 +i +2)*0.114);
}
}
qimage =QImage((uchar*)(frame_buffer_3_channel_gray),320,240,QImage::Format_RGB888);
/*==========================greyscale channel but have a problem================*/
/*for(i=0;i<256;i++)
{
colourtable[i]=qRgb(i,i,i);
grayColourTable.append(colourtable[i]);
}*/
//qimage =QImage((uchar*)(frame_buffer_video + count*320*240),320,240,QImage::Format_Indexed8);
//qimage.setColorTable(grayColourTable);
splash->setPixmap(QPixmap::fromImage(qimage));
splash->show();
sleep(1);
}
//free(frame_buffer_video);
//free(frame_buffer);
#endif
GT_0trace(curMask, GT_2CLASS, "ending by this app.\n");
//return 0 ;
//return (smain(argc, argv));
smain(argc, argv);
return 0 ;
}
/* ARGSUSED - this line tells the compiler not to warn about unused args. */
IRES_Status IRESMAN_MEMTCM_init(IRESMAN_Params * initArgs)
{
SMGRMP_Attrs attrs;
IRESMAN_MemTcmParams * resmanArgs = (IRESMAN_MemTcmParams *)initArgs;
/* CMEM_AllocParams params; */
GT_assert(ti_sdo_fc_ires_memtcm, initArgs != NULL);
/*
* Check if already initialized
*/
if (_initialized) {
GT_0trace(CURTRACE, GT_ENTER,
"IRESMAN_MEMTCM_init> Exit (status=IRES_EEXISTS)\n");
return (IRES_EEXISTS);
}
if (gtInit == 0) {
GT_init();
GT_create(&CURTRACE, "ti.sdo.fc.ires.memtcm");
gtInit = 1;
}
GT_1trace(CURTRACE, GT_ENTER,
"IRESMAN_MEMTCM_init> Enter (initArgs=0x%x)\n", initArgs);
/*
* Information regarding the memory allocation/free functions
* is stored as part of the internal state of the resource
* manager
*/
if (NULL == _MEMTCM_lock) {
/* Create a lock for protecting MEMTCM internal state object */
_MEMTCM_lock = LockMP_create(_MEMTCM_LOCKID);
if (_MEMTCM_lock == NULL) {
GT_1trace(CURTRACE, GT_7CLASS,
"IRESMAN_MEMTCM_init> Failed to create IPC lock, "
"key = 0x%x\n", _MEMTCM_LOCKID);
GT_0trace(CURTRACE, GT_ENTER, "IRESMAN_MEMTCM_init> Exit (status="
"IRES_EFAIL)\n");
return (IRES_EFAIL);
}
}
getInternalState();
if (NULL == _resmanInternalState) {
GT_0trace(CURTRACE, GT_7CLASS,
"IRESMAN_MEMTCM_init>Failed to obtain Internal state Object\n");
GT_0trace(CURTRACE, GT_ENTER, "IRESMAN_MEMTCM_init> Exit (status="
"IRES_EFAIL)\n");
LockMP_delete(_MEMTCM_lock);
return (IRES_EFAIL);
}
/*
* Information regarding the memory allocation/free functions
*/
_allocFxn = resmanArgs->baseConfig.allocFxn;
_freeFxn = resmanArgs->baseConfig.freeFxn;
if (0 != CMEM_init()) {
GT_0trace(CURTRACE, GT_7CLASS,
"IRESMAN_MEMTCM_init> Could not initialize CMEM\n");
GT_0trace(CURTRACE, GT_ENTER,
"IRESMAN_MEMTCM_init> Exit (status=IRES_EFAIL)\n");
freeInternalState();
LockMP_delete(_MEMTCM_lock);
return (IRES_EFAIL);
}
/* TODO: Figure out how to populate the params */
if (_resmanInternalState->numOpens == 0) {
armtcmAddr = CMEM_alloc2(MEMTCM_blockId, MEMTCM_size, NULL);
_resmanInternalState->armtcmAddr = (void *)CMEM_getPhys(armtcmAddr);
}
else {
armtcmAddr = CMEM_registerAlloc(
(unsigned long)_resmanInternalState->armtcmAddr);
}
if (NULL == armtcmAddr) {
GT_0trace(CURTRACE, GT_7CLASS,
"IRESMAN_MEMTCM_init> Could not allocate TCM memory from CMEM"
"\n");
GT_0trace(CURTRACE, GT_ENTER,
"IRESMAN_MEMTCM_init> Exit (status=IRES_EFAIL)\n");
freeInternalState();
LockMP_delete(_MEMTCM_lock);
return (IRES_EFAIL);
}
if (NULL == smgr) {
attrs.numScratchGroups = MEMTCM_NUM_GROUPS;
attrs.numResources = (MEMTCM_NUMRES);
/* One resource corresponds to a 1/2 K
chunk of memory (0x200), Manage memory
in chunks of 0x200
*/
attrs.lock = _MEMTCM_lock;
attrs.key = (void *)_MEMTCM_MEMID; /* A key specific to the resource
being managed */
/* This will create a new resource manager or return a process-specific
handle to an existing smgr */
smgr = SMGRMP_create(&attrs);
if (NULL == smgr) {
GT_0trace(CURTRACE, GT_7CLASS, "IRESMAN_MEMTCM_init> Error creating"
" scratch resource manager.\n");
GT_0trace(CURTRACE, GT_ENTER, "IRESMAN_MEMTCM_init> Exit (status="
"IRES_EFAIL)\n");
freeInternalState();
LockMP_delete(_MEMTCM_lock);
return (IRES_EFAIL);
}
}
_resmanInternalState->numOpens++;
/*
* Set Initalized flag to 1 if successful
*/
_initialized = 1;
GT_0trace(CURTRACE, GT_ENTER,
"IRESMAN_MEMTCM_init> Exit (status=IRES_OK)\n");
return (IRES_OK);
}
/*
* ======== WCD_Init ========
* Purpose:
* Module initialization is done by SERVICES Init.
*/
bool WCD_Init(void)
{
bool fInit = true;
bool fDRV, fDEV, fCOD, fSERVICES, fCHNL, fMSG, fIO;
bool fMGR, fPROC, fNODE, fDISP, fNTFY, fSTRM, fRMM;
#ifdef DEBUG
/* runtime check of Device IOCtl array. */
u32 i;
int cmdtable = ARRAY_SIZE(WCD_cmdTable);
for (i = 1; i < cmdtable; i++)
DBC_Assert(WCD_cmdTable[i - 1].dwIndex == i);
#endif
if (WCD_cRefs == 0) {
/* initialize all SERVICES modules */
fSERVICES = SERVICES_Init();
/* initialize debugging module */
DBC_Assert(!WCD_debugMask.flags);
GT_create(&WCD_debugMask, "CD"); /* CD for class driver */
/* initialize class driver and other modules */
fDRV = DRV_Init();
fMGR = MGR_Init();
fPROC = PROC_Init();
fNODE = NODE_Init();
fDISP = DISP_Init();
fNTFY = NTFY_Init();
fSTRM = STRM_Init();
fRMM = RMM_init();
fCHNL = CHNL_Init();
fMSG = MSG_Init();
fIO = IO_Init();
fDEV = DEV_Init();
fCOD = COD_Init();
fInit = fSERVICES && fDRV && fDEV && fCHNL && fCOD &&
fMSG && fIO;
fInit = fInit && fMGR && fPROC && fRMM;
if (!fInit) {
if (fSERVICES)
SERVICES_Exit();
if (fDRV)
DRV_Exit();
if (fMGR)
MGR_Exit();
if (fSTRM)
STRM_Exit();
if (fPROC)
PROC_Exit();
if (fNODE)
NODE_Exit();
if (fDISP)
DISP_Exit();
if (fNTFY)
NTFY_Exit();
if (fCHNL)
CHNL_Exit();
if (fMSG)
MSG_Exit();
if (fIO)
IO_Exit();
if (fDEV)
DEV_Exit();
if (fCOD)
COD_Exit();
if (fRMM)
RMM_exit();
}
}
if (fInit)
WCD_cRefs++;
GT_1trace(WCD_debugMask, GT_5CLASS,
"Entered WCD_Init, ref count: 0x%x\n", WCD_cRefs);
return fInit;
}
static int __devinit omap34xx_bridge_probe(struct platform_device *pdev)
{
int status;
u32 initStatus;
u32 temp;
dev_t dev = 0 ;
int result;
struct dspbridge_platform_data *pdata = pdev->dev.platform_data;
omap_dspbridge_dev = pdev;
/* use 2.6 device model */
result = alloc_chrdev_region(&dev, 0, 1, driver_name);
if (result < 0) {
pr_err("%s: Can't get major %d\n", __func__, driver_major);
goto err1;
}
driver_major = MAJOR(dev);
cdev_init(&bridge_cdev, &bridge_fops);
bridge_cdev.owner = THIS_MODULE;
status = cdev_add(&bridge_cdev, dev, 1);
if (status) {
pr_err("%s: Failed to add bridge device\n", __func__);
goto err2;
}
/* udev support */
bridge_class = class_create(THIS_MODULE, "ti_bridge");
if (IS_ERR(bridge_class))
pr_err("%s: Error creating bridge class\n", __func__);
device_create(bridge_class, NULL, MKDEV(driver_major, 0),
NULL, "DspBridge");
bridge_create_sysfs();
GT_init();
GT_create(&driverTrace, "LD");
#ifdef CONFIG_BRIDGE_DEBUG
if (GT_str)
GT_set(GT_str);
#elif defined(DDSP_DEBUG_PRODUCT) && GT_TRACE
GT_set("**=67");
#endif
#ifdef CONFIG_PM
/* Initialize the wait queue */
bridge_suspend_data.suspended = 0;
init_waitqueue_head(&bridge_suspend_data.suspend_wq);
#endif
SERVICES_Init();
/* Autostart flag. This should be set to true if the DSP image should
* be loaded and run during bridge module initialization */
if (base_img) {
temp = true;
REG_SetValue(AUTOSTART, (u8 *)&temp, sizeof(temp));
REG_SetValue(DEFEXEC, (u8 *)base_img, strlen(base_img) + 1);
} else {
temp = false;
REG_SetValue(AUTOSTART, (u8 *)&temp, sizeof(temp));
REG_SetValue(DEFEXEC, (u8 *) "\0", (u32)2);
}
if (shm_size >= 0x10000) { /* 64 KB */
initStatus = REG_SetValue(SHMSIZE, (u8 *)&shm_size,
sizeof(shm_size));
} else {
initStatus = DSP_EINVALIDARG;
status = -1;
pr_err("%s: SHM size must be at least 64 KB\n", __func__);
}
GT_1trace(driverTrace, GT_7CLASS,
"requested shm_size = 0x%x\n", shm_size);
if (pdata->phys_mempool_base && pdata->phys_mempool_size) {
phys_mempool_base = pdata->phys_mempool_base;
phys_mempool_size = pdata->phys_mempool_size;
}
GT_1trace(driverTrace, GT_7CLASS, "phys_mempool_base = 0x%x \n",
phys_mempool_base);
GT_1trace(driverTrace, GT_7CLASS, "phys_mempool_size = 0x%x\n",
phys_mempool_base);
if ((phys_mempool_base > 0x0) && (phys_mempool_size > 0x0))
MEM_ExtPhysPoolInit(phys_mempool_base, phys_mempool_size);
if (tc_wordswapon) {
GT_0trace(driverTrace, GT_7CLASS, "TC Word Swap is enabled\n");
REG_SetValue(TCWORDSWAP, (u8 *)&tc_wordswapon,
sizeof(tc_wordswapon));
} else {
GT_0trace(driverTrace, GT_7CLASS, "TC Word Swap is disabled\n");
REG_SetValue(TCWORDSWAP, (u8 *)&tc_wordswapon,
sizeof(tc_wordswapon));
}
if (DSP_SUCCEEDED(initStatus)) {
#ifdef CONFIG_BRIDGE_DVFS
clk_handle = clk_get(NULL, "iva2_ck");
if (!clk_handle)
pr_err("%s: clk_get failed to get iva2_ck\n", __func__);
if (clk_notifier_register(clk_handle, &iva_clk_notifier))
pr_err("%s: clk_notifier_register failed for iva2_ck\n",
__func__);
if (!min_dsp_freq)
min_dsp_freq = pdata->mpu_min_speed;
#endif
driverContext = DSP_Init(&initStatus);
if (DSP_FAILED(initStatus)) {
status = -1;
pr_err("DSP Bridge driver initialization failed\n");
} else {
pr_info("DSP Bridge driver loaded\n");
}
}
#ifdef CONFIG_BRIDGE_RECOVERY
bridge_rec_queue = create_workqueue("bridge_rec_queue");
INIT_WORK(&bridge_recovery_work, bridge_recover);
INIT_COMPLETION(bridge_comp);
#endif
DBC_Assert(status == 0);
DBC_Assert(DSP_SUCCEEDED(initStatus));
return 0;
err2:
unregister_chrdev_region(dev, 1);
err1:
return result;
}
