示例#1
0
	double TimeUtils::GetAbsoluteTimeSeconds()
	{
		static SystemClocks freq = GetClockFrequency();
		static double inverseFreq = 1.0 / static_cast<double>( freq );

		LARGE_INTEGER clocks;
		QueryPerformanceCounter( &clocks );

		return clocks.QuadPart * inverseFreq;
	}
示例#2
0
	//---------------------------------------------------------------
	double ClocksToSeconds( SystemClocks clocks )
	{
		SystemClocks freq = GetClockFrequency();
		return static_cast<double>( clocks ) / freq;
	}
示例#3
0
	//---------------------------------------------------------------
	//	Utility functions
	//---------------------------------------------------------------
	double GetClockFrequencyDouble()
	{
		return static_cast<double>( GetClockFrequency() );
	}
示例#4
0
	//---------------------------------------------------------------
	SystemClocks SecondsToClocks( double seconds )
	{
		SystemClocks freq = GetClockFrequency();
		return static_cast<SystemClocks>(freq * seconds);
	}
示例#5
0
/**
 * Set Clock
 *
 * @param  target PLL, source clock, division
 * @return none
 *
 * @brief  Setup a clock 
 */
void SetClock(CLKBASE_Type target_clk, CLKSRC_Type src_clk, CLKDIV_Type div)
{
	volatile uint32_t target_clk_adr;
	volatile uint8_t auto_block=TRUE;
	uint32_t src_freq;

	EnableSourceClk(src_clk);

	switch(div)
	{
		case(DIV1):						// Divide by 1 == no division
			break;
		case(DIV2):	
			LPC_CGU->IDIVA_CTRL = (src_clk<<24) | (1<<2) | AUTO_BLOCK;	
			IDIVAFrequency = GetClockFrequency(src_clk)/2;
			src_clk = SRC_IDIV_0; 		// Set new src_clk for target_clk
			break;
		case(DIV4):	
			LPC_CGU->IDIVB_CTRL = (src_clk<<24) | (3<<2) |AUTO_BLOCK;		
			IDIVBFrequency = GetClockFrequency(src_clk)/4;
			src_clk = SRC_IDIV_1; 		// Set new src_clk for target_clk
			break;
		case(DIV8):	
			LPC_CGU->IDIVC_CTRL = (src_clk<<24) | (7<<2) |AUTO_BLOCK;		
			IDIVCFrequency = GetClockFrequency(src_clk)/8;
			src_clk = SRC_IDIV_2; 		// Set new src_clk for target_clk
			break;
		case(DIV16):	
			LPC_CGU->IDIVD_CTRL = (src_clk<<24) | (15<<2) |AUTO_BLOCK;		
			IDIVDFrequency = GetClockFrequency(src_clk)/16;
			src_clk = SRC_IDIV_3; 		// Set new src_clk for target_clk
			break;
		case(DIV256):
			LPC_CGU->IDIVE_CTRL = (src_clk<<24) | (255<<2) |AUTO_BLOCK;	// MAX 128? IDIV bit 2:9 = 7 bits = 127 max
			IDIVEFrequency = GetClockFrequency(src_clk)/256;
			src_clk = SRC_IDIV_4; 		// Set new src_clk for target_clk
			break;
		default:
			break;
	}

	src_freq = GetClockFrequency(src_clk);

	switch(target_clk)
	{
		case(BASE_OUT_CLK):
		{
			LPC_SCU->SFSCLK_0 = 1; 					// function 1; CGU clk out, diable pull down, disable pull-up
			auto_block = FALSE;
			break;
		}
		case(XTAL):
		{
			XtalFrequency = (uint32_t) src_clk;	  	// convert target clock directly to frequency
			break;
		}
		case(ENET_RX):
		{
			EnetRxFrequency = (uint32_t) src_clk;	// convert target clock directly to frequency
			break;
		}
		case(ENET_TX):
		{
			EnetTxFrequency = (uint32_t) src_clk;	// convert target clock directly to frequency
			break;
		}
		case(BASE_USB1_CLK):
		{
			USB1Frequency = src_freq;
			break;
		}
		case(BASE_M4_CLK):
		{
			M4Frequency = src_freq;
			break;
		}
		case(BASE_SPIFI_CLK):
		{
			SPIFIFrequency = src_freq;
			break;
		}
		case(BASE_SPI_CLK):
		{
			SPIFrequency = src_freq;
			break;
		}
		case(BASE_PHY_RX_CLK):
		{
			EnetRxFrequency = src_freq;
			break;
		}
		case(BASE_PHY_TX_CLK):
		{
			EnetTxFrequency = src_freq;
			break;
		}
		case(BASE_VPB1_CLK):
		{
			VPB1Frequency = src_freq;
			break;
		}
		case(BASE_VPB3_CLK):
		{
			VPB3Frequency = src_freq;
			break;
		}
		case(BASE_LCD_CLK):
		{
			LCDFrequency = src_freq;
			break;
		}
		case (BASE_VADC_CLK) :
		{
			VADCFrequency = src_freq;
			break;
		}
		case(BASE_SDIO_CLK):
		{
			SDIOFrequency = src_freq;
			break;
		}
		case(BASE_SSP0_CLK):
		{
			SSP0Frequency = src_freq;
			break;
		}
		case(BASE_SSP1_CLK):
		{
			SSP1Frequency = src_freq;
			break;
		}
		case(BASE_UART0_CLK):
		{
			UART0Frequency = src_freq;
			break;
		}
		case(BASE_UART1_CLK):
		{
			UART1Frequency = src_freq;
			break;
		}
		case(BASE_UART2_CLK):
		{
			UART2Frequency = src_freq;
			break;
		}
		case(BASE_UART3_CLK):
		{
			UART3Frequency = src_freq;
			break;
		}
		case(BASE_AOTEST_CLK):
		{
			AOTESTFrequency = src_freq;
			break;
		}
		case(BASE_ISO_TCK):
		{
			ISOFrequency = src_freq;
			break;
		}
		case(BASE_BSR_TCK):
		{
			BSRFrequency = src_freq;
			break;
		}
		case(BASE_CLK_TEST):
		{
			CLK_TESTFrequency = src_freq;
			break;
		}
		case(BASE_APLL_CLK): //New in Falcon
		{
			APLLFrequency = src_freq;
			break;
		}
		case(BASE_SPARE0_CLK): //New in Falcon
		{
			SPARE0Frequency = src_freq;
			break;
		}
		case(BASE_SPARE1_CLK): //New in Falcon
		{
			SPARE1Frequency = src_freq;
			break;
		}
		default:
			break;
	}

	if(target_clk<200)
	{
		target_clk_adr = (uint32_t) &LPC_CGU->IDIVA_CTRL + (target_clk-2)*4;	
		*(uint32_t *)target_clk_adr = (src_clk<<24) | (auto_block<<11);	
	}
}