void LPC24XX_EMAC_lwip_interrupt( struct netif *pNetIf )
{
UINT32 intstatus;
LPC24XX_EMAC & ENET = *(LPC24XX_EMAC *)LPC24XX_EMAC::c_EMAC_Base;
/* Disable intrrupts */
GLOBAL_LOCK(irq);
intstatus = ENET.MAC_INTSTATUS;
if ( !( intstatus & ( INT_RX_OVERRUN | INT_TX_UNDERRUN ) ) )
{
if ( pNetIf )
{
if( intstatus & INT_RX_DONE )
{
/* Ethernet frame received */
lwip_interrupt_continuation( );
/* Clear Rx Done Interrupt */
ENET.MAC_INTCLEAR = INT_RX_DONE;
}
if( intstatus & INT_TX_DONE )
{
/* Clear Tx Done Interrupt */
ENET.MAC_INTCLEAR = INT_TX_DONE;
}
}
else
{
/* Invalid netif structure, clear the interrupts and return */
ENET.MAC_INTCLEAR = INT_RX_DONE | INT_TX_DONE;
return;
}
}
else
{
if ( intstatus & INT_RX_OVERRUN )
{
/* Fatal Rx Error Reset RX hardware */
ENET.MAC_COMMAND |= CR_RX_RES;
/* Clear Rx overrun Interrupt */
ENET.MAC_INTCLEAR = INT_RX_OVERRUN;
//lpc24xx_emac_stats.rx_other_errors++;
}
if ( intstatus & INT_TX_UNDERRUN )
{
/* Fatal Tx Error Reset TX hardware */
ENET.MAC_COMMAND |= CR_TX_RES;
/* Clear Tx underrun Interrupt */
ENET.MAC_INTCLEAR = INT_TX_UNDERRUN;
//lpc24xx_emac_stats.tx_other_errors++;
}
HAL_Time_Sleep_MicroSeconds(1);
}
}
BOOL LPC24XX_EMAC_lwip_init ( struct netif *pNetIf )
{
UINT32 i;
LPC24XX_EMAC & ENET = *(LPC24XX_EMAC *)LPC24XX_EMAC::c_EMAC_Base;
/* Power Up the EMAC controller. */
LPC24XX::SYSCON().PCONP |= LPC24XX_SYSCON::ENABLE_ENET;
/* Connect EMAC pins */
LPC24XX_EMAC_lwip_setpins( ENET_PHY_lwip_get_MII_mode() );
/* Reset EMAC */
ENET.MAC_MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
MAC1_SIM_RES | MAC1_SOFT_RES;
ENET.MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES;
HAL_Time_Sleep_MicroSeconds(1);
/* Initialize MAC control registers. */
ENET.MAC_MAC1 = 0;
ENET.MAC_MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
ENET.MAC_MAXF = ETH_MAX_FLEN;
ENET.MAC_CLRT = CLRT_DEF;
ENET.MAC_IPGR = IPGR_DEF;
if ( !ENET_PHY_lwip_get_MII_mode() )
{
/* Enable RMII mode in MAC command register */
ENET.MAC_COMMAND = ENET.MAC_COMMAND | CR_RMII;
}
/* Reset MII Management hardware */
ENET.MAC_MCFG = MCFG_RES_MII;
HAL_Time_Sleep_MicroSeconds(1);
/* Set MDC Clock divider */
ENET.MAC_MCFG = ENET_PHY_lwip_get_MDC_Clk_Div() & MCFG_CLK_SEL;
/* Initialiaze external ethernet Phy */
if ( !ENET_PHY_lwip_init() )
{
return FALSE;
}
/* Set the Ethernet MAC Address registers */
ENET.MAC_SA2 = (pNetIf->hwaddr[1] << 8) | pNetIf->hwaddr[0];
ENET.MAC_SA1 = (pNetIf->hwaddr[3] << 8) | pNetIf->hwaddr[2];
ENET.MAC_SA0 = (pNetIf->hwaddr[5] << 8) | pNetIf->hwaddr[4];
/* Setup the Rx DMA Descriptors */
for (i = 0; i < NUM_RX_FRAG; i++)
{
RX_DESC_PACKET(i) = RX_BUF(i);
RX_DESC_CTRL(i) = RCTRL_INT | (ETH_FRAG_SIZE-1);
RX_STAT_INFO(i) = 0;
RX_STAT_HASHCRC(i) = 0;
}
/* Set the EMAC Rx Descriptor Registers. */
ENET.MAC_RXDESCRIPTOR = RX_DESC_BASE;
ENET.MAC_RXSTATUS = RX_STAT_BASE;
ENET.MAC_RXDESCRIPTORNUM = NUM_RX_FRAG-1;
ENET.MAC_RXCONSUMEINDEX = 0;
/* Setup the Tx DMA Descriptors */
for (i = 0; i < NUM_TX_FRAG; i++)
{
TX_DESC_PACKET(i) = TX_BUF(i);
TX_DESC_CTRL(i) = 0;
TX_STAT_INFO(i) = 0;
}
/* Set the EMAC Tx Descriptor Registers. */
ENET.MAC_TXDESCRIPTOR = TX_DESC_BASE;
ENET.MAC_TXSTATUS = TX_STAT_BASE;
ENET.MAC_TXDESCRIPTORNUM = NUM_TX_FRAG-1;
ENET.MAC_TXPRODUCEINDEX = 0;
/* Receive Broadcast and Perfect Match Packets */
ENET.MAC_RXFILTERCTRL = RFC_PERFECT_EN | RFC_BCAST_EN;
/* Enable EMAC interrupts. */
ENET.MAC_INTENABLE = INT_RX_DONE | INT_TX_DONE | INT_TX_UNDERRUN | INT_RX_OVERRUN;
/* Reset all interrupts */
ENET.MAC_INTCLEAR = 0xFFFF;
/* Enable receive and transmit */
ENET.MAC_COMMAND |= (CR_RX_EN | CR_TX_EN);
ENET.MAC_MAC1 |= MAC1_REC_EN;
return TRUE;
}
//Initialize USB Host
// USB OTG Full Speed is controller 0
// USB OTG High Speed is controller 1
BOOL USBH_Initialize( int Controller ) {
CPU_GPIO_EnableOutputPin(16+2, TRUE);
// enable USB clock
OTG_TypeDef* OTG;
if (Controller == 0) {
RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
OTG = OTG_FS;
}
else if (Controller == 1) {
RCC->AHB1ENR |= RCC_AHB1ENR_OTGHSEN;
OTG = OTG_HS;
}
else {
return FALSE;
}
//disable int
OTG->GAHBCFG &= ~OTG_GAHBCFG_GINTMSK;
//core init 1
OTG->GINTSTS |= OTG_GINTSTS_RXFLVL;
OTG->GAHBCFG |= OTG_GAHBCFG_PTXFELVL;
//core init 2
OTG->GUSBCFG &= ~OTG_GUSBCFG_HNPCAP;
OTG->GUSBCFG &= ~OTG_GUSBCFG_SRPCAP;
OTG->GUSBCFG &= ~OTG_GUSBCFG_TRDT;
OTG->GUSBCFG |= STM32F4_USB_TRDT<<10;
OTG->GUSBCFG |= OTG_GUSBCFG_PHYSEL;
//core init 3
OTG->GINTMSK |= OTG_GINTMSK_OTGINT | OTG_GINTMSK_MMISM;
//force host mode
OTG->GUSBCFG |= OTG_GUSBCFG_FHMOD;
//host init
OTG->GINTMSK |= OTG_GINTMSK_PRTIM;
OTG->HCFG = OTG_HCFG_FSLSPCS_48MHZ;
OTG->HPRT |= OTG_HPRT_PPWR;
OTG->GCCFG |= (OTG_GCCFG_VBUSBSEN | OTG_GCCFG_VBUSASEN | OTG_GCCFG_NOVBUSSENS | OTG_GCCFG_PWRDWN);
//
//config pins and ISR
if (Controller == 0) {
CPU_GPIO_DisablePin(10, RESISTOR_DISABLED, 0, (GPIO_ALT_MODE)0xA2);
CPU_GPIO_DisablePin(11, RESISTOR_DISABLED, 0, (GPIO_ALT_MODE)0xA2);
CPU_INTC_ActivateInterrupt(OTG_FS_IRQn, USBH_ISR, OTG);
}
else {
CPU_GPIO_DisablePin(16+14, RESISTOR_DISABLED, 0, (GPIO_ALT_MODE)0xC2);
CPU_GPIO_DisablePin(16+15, RESISTOR_DISABLED, 0, (GPIO_ALT_MODE)0xC2);
CPU_INTC_ActivateInterrupt(OTG_HS_IRQn, USBH_ISR, OTG);
}
for (int i = 0; i < 3; i++)
{
CPU_GPIO_SetPinState(18, 1);
HAL_Time_Sleep_MicroSeconds(200*1000);
CPU_GPIO_SetPinState(18, 0);
HAL_Time_Sleep_MicroSeconds(200*1000);
}
//enable interrupt
OTG->GINTSTS = 0xFFFFFFFF;
OTG->GAHBCFG |= OTG_GAHBCFG_GINTMSK;
return TRUE;
}
void ABORT_HandlerDisplay(
UINT32 *registers_const,
UINT32 sp,
UINT32 lr,
UINT32 pc_offset,
const char *Title,
BOOL SerialOutput
)
{
UINT32 cpsr;
UINT32 pc;
int i;
int j;
#if !defined(PLATFORM_ARM_OS_PORT)
UINT8* stackbytes;
const UINT32* const stackwords = (UINT32 *)sp;
#endif
int page;
UINT32* registers;
#if defined(PLATFORM_ARM_MC9328)
UINT32 URXDn_X;
MC9328MXL_USART& USART = MC9328MXL::USART( ConvertCOM_ComPort(USART_DEFAULT_PORT) );
#else
// TODO ???
#endif
++ABORT_recursion_counter;
dump_again:
page = 0;
registers = registers_const;
cpsr = *registers++;
pc = (*registers++) - pc_offset;
if(SerialOutput)
{
// unprotect the GPIO pins for USART, allowing USART output
USART_Initialize( ConvertCOM_ComPort(USART_DEFAULT_PORT), USART_DEFAULT_BAUDRATE, USART_PARITY_NONE, 8, USART_STOP_BITS_ONE, USART_FLOW_NONE );
monitor_debug_printf("ERROR: %s\r\n", Title);
monitor_debug_printf(" cpsr=0x%08x\r\n", cpsr);
monitor_debug_printf(" pc =0x%08x\r\n", pc);
monitor_debug_printf(" lr =0x%08x\r\n", lr);
for(i = 0; i <= 12; i++)
{
monitor_debug_printf(" r%d=0x%08x\r\n", i, registers[i]);
}
monitor_debug_printf(" sp =0x%08x\r\n", sp);
RegisterDump();
}
// don't let the screen go away if the watchdog was enabled.
Watchdog_Disable();
//Flash_ChipReadOnly(TRUE);
// first dump stuff to the com port, then go interactive with the buttons and LCD
if(SerialOutput)
{
monitor_debug_printf("ERROR: %s\r\n", Title);
monitor_debug_printf(" cpsr=0x%08x\r\n", cpsr);
monitor_debug_printf(" pc =0x%08x\r\n", pc);
monitor_debug_printf(" lr =0x%08x\r\n", lr);
for(i = 0; i <= 12; i++)
{
monitor_debug_printf(" r%d=0x%08x\r\n", i, registers[i]);
}
monitor_debug_printf(" sp =0x%08x\r\n", sp);
#if !defined(PLATFORM_ARM_OS_PORT)
stackbytes = (UINT8 *)sp;
for(i = 0; i < 16; i++)
{
monitor_debug_printf("[0x%08x] :", (UINT32)&stackbytes[i*16]);
for(j = 0; j < 16; j++)
{
// don't cause a data abort here!
if((UINT32) &stackbytes[i*16 + j] < (UINT32) &StackTop)
{
monitor_debug_printf(" %02x", stackbytes[i*16 + j]);
}
else
{
monitor_debug_printf(" ");
}
}
monitor_debug_printf(" ");
for(j = 0; j < 16; j++)
{
if((UINT32) &stackbytes[i*16 + j] < (UINT32) &StackTop)
{
monitor_debug_printf("%c", (stackbytes[i*16 + j] >= ' ') ? stackbytes[i*16 + j] : '.');
}
}
monitor_debug_printf("\r\n");
}
#endif
}
//--//
// make sure USART is ready to go (clock enabled, pins set active) regardless of charger state, idem potent call if it was already on
CPU_ProtectCommunicationGPIOs( FALSE );
#if defined(PLATFORM_ARM_MC9328)
while(USART.URXDn_X[0] & MC9328MXL_USART::URXDn__CHARRDY);
#else
// TODO ???
#endif
//--//
// go interactive with the buttons and LCD
while(true)
{
UINT32 CurrentButtonsState;
lcd_printf("\f");
switch(page)
{
case 0:
lcd_printf("%-12s \r\n\r\n", Title);
lcd_printf("Build Date:\r\n");
lcd_printf("%-12s \r\n" , __DATE__);
lcd_printf("%-12s \r\n" , __TIME__);
lcd_printf("\r\n");
lcd_printf("cps=0x%08x\r\n", cpsr);
lcd_printf("pc =0x%08x\r\n", pc);
lcd_printf("lr =0x%08x\r\n", lr);
lcd_printf("sp =0x%08x\r\n", sp);
break;
case 1:
lcd_printf("Registers 1\r\n\r\n");
for(i = 0; i < 10; i++)
{
lcd_printf("r%1d =0x%08x\r\n", i, registers[i]);
}
break;
case 2:
lcd_printf("Registers 2\r\n\r\n");
for(i = 10; i < 13; i++)
{
lcd_printf("r%2d=0x%08x\r\n", i, registers[i]);
}
break;
case 3:
default:
{
#if !defined(PLATFORM_ARM_OS_PORT)
UINT32 index = (page-3)*10;
lcd_printf("Stack %08x\r\n\r\n", (UINT32)&stackwords[index]);
for(i = 0; i < 10; i++)
{
stackbytes = (UINT8 *)&stackwords[index+i];
// don't cause a data abort displaying past the end of the stack!
if((UINT32) &stackwords[index+i] < (UINT32) &StackTop)
{
lcd_printf("%08x %c%c%c%c\r\n", stackwords[index+i],
(stackbytes[0] >= ' ') ? stackbytes[0] : '.',
(stackbytes[1] >= ' ') ? stackbytes[1] : '.',
(stackbytes[2] >= ' ') ? stackbytes[2] : '.',
(stackbytes[3] >= ' ') ? stackbytes[3] : '.'
);
}
else
{
lcd_printf(" \r\n");
}
}
#endif
}
break;
}
// wait for a button press
while(0 == (CurrentButtonsState = Buttons_CurrentHWState()))
{
#if defined(PLATFORM_ARM_MC9328)
if(USART.URXDn_X[0] & MC9328MXL_USART::URXDn__CHARRDY)
{
goto StartMonitorMode;
}
#else
// TODO ???
#endif
}
// wait for 10 mSec
HAL_Time_Sleep_MicroSeconds(10000/64);
// wait for it to release
while(0 == (CurrentButtonsState ^ Buttons_CurrentHWState()));
// wait for 10 mSec
HAL_Time_Sleep_MicroSeconds(10000/64);
if(CurrentButtonsState & BUTTON_B5)
{
page = (page + 1); // no limit of stack pages
LCD_Clear();
}
if(CurrentButtonsState & BUTTON_B2)
{
page = (page > 0) ? page - 1 : 0;
LCD_Clear();
}
if((CurrentButtonsState & BUTTON_B4) || (CurrentButtonsState & BUTTON_B0))
{
goto dump_again;
}
continue;
#if defined(PLATFORM_ARM_MC9328)
StartMonitorMode:
#endif
{
char data[16];
UINT32 pos = 0;
LCD_Clear();
lcd_printf("\fMONITOR MODE\r\n");
HAL_Time_Sleep_MicroSeconds(10000);
while(1)
{
#if defined(PLATFORM_ARM_MC9328)
URXDn_X = USART.URXDn_X[0];
if(URXDn_X & MC9328MXL_USART::URXDn__CHARRDY)
{
data[pos++] = (char)(URXDn_X & MC9328MXL_USART::URXDn__DATA_mask);
#else
if(false)
{
// TODO ???
#endif
switch(data[0])
{
case 'L':
monitor_debug_printf("rb=0x%08x\r\n", HalSystemConfig.RAM1.Base );
monitor_debug_printf("rs=0x%08x\r\n", HalSystemConfig.RAM1.Size );
monitor_debug_printf("fb=0x%08x\r\n", HalSystemConfig.FLASH.Base);
monitor_debug_printf("fs=0x%08x\r\n", HalSystemConfig.FLASH.Size);
break;
case 'M':
if(pos < 12) continue;
{
UINT8* start = *(UINT8**)&data[4];
UINT8* end = *(UINT8**)&data[8];
lcd_printf( "\f\r\n\r\nREAD:\r\n %08x\r\n %08x", (UINT32)start, (UINT32)end );
if(AbortHandler_CheckMemoryRange( start, end ))
{
while(start < end)
{
monitor_debug_printf("[0x%08x]", (UINT32)start);
for(j = 0; j < 128; j++)
{
monitor_debug_printf("%02x", *start++);
if(start == end) break;
}
monitor_debug_printf("\r\n");
}
}
else
{
monitor_debug_printf("ERROR: invalid range: %08x-%08x\r\n", (UINT32)start, (UINT32)end );
}
}
break;
case 'R':
for(i = 0; i <= 12; i++)
{
monitor_debug_printf("r%d=%08x\r\n", i, registers[i]);
}
monitor_debug_printf("sp=%08x\r\n", sp);
monitor_debug_printf("lr=%08x\r\n", lr);
monitor_debug_printf("pc=%08x\r\n", pc);
monitor_debug_printf("cpsr=%08x\r\n", cpsr);
#if defined(PLATFORM_ARM_MC9328)
monitor_debug_printf("BWA=%08x\r\n", 0);
monitor_debug_printf("BWC=%08x\r\n", 0);
#else
// TODO ???
#endif
break;
case '\r':
case '\n':
case ' ':
break;
default:
monitor_debug_printf("ERROR: unknown command %c\r\n", data[0] );
break;
}
pos = 0;
}
else if(Buttons_CurrentHWState())
{
// wait for it to release
while (Buttons_CurrentHWState());
LCD_Clear();
break;
}
}
}
}
}
#endif // !defined(ABORTS_REDUCESIZE)
extern "C"
{
void UNDEF_Handler( UINT32* registers, UINT32 sp, UINT32 lr )
{
ASSERT_IRQ_MUST_BE_OFF();
#if !defined(ABORTS_REDUCESIZE)
Verify_RAMConstants((void *) FALSE);
ABORT_HandlerDisplay(registers, sp, lr, 4, "Undef Instr", TRUE);
CPU_Halt();
#else
CPU_Reset();
#endif // !defined(ABORTS_REDUCESIZE)
}
