externC void hal_ppc405_pci_cfg_write_uint16(int bus, int devfn, int offset, cyg_uint16 cfg_val) { cyg_uint32 cfg_addr; #ifdef CYGPKG_IO_PCI_DEBUG diag_printf("%s(bus=%x, devfn=%x, offset=%x, val=%x)\n", __FUNCTION__, bus, devfn, offset, cfg_val); #endif // CYGPKG_IO_PCI_DEBUG cfg_addr = _cfg_addr(bus, devfn, offset); HAL_WRITE_UINT32LE(PCIC0_CFGADDR, cfg_addr); HAL_WRITE_UINT16LE(PCIC0_CFGDATA|(offset & 0x03), cfg_val); }
externC void _csb281_pci_cfg_write_uint16(int bus, int devfn, int offset, cyg_uint16 cfg_val) { cyg_uint32 addr; #ifdef CYGPKG_IO_PCI_DEBUG diag_printf("%s(bus=%x, devfn=%x, offset=%x, val=%x)\n", __FUNCTION__, bus, devfn, offset, cfg_val); #endif // CYGPKG_IO_PCI_DEBUG addr = _cfg_sel(bus, devfn, offset); HAL_WRITE_UINT16LE(addr, cfg_val); #if 0 HAL_READ_UINT16(_CSB281_PCI_STAT_CMD, status); if (status & _CSB281_PCI_STAT_ERROR_MASK) { // Cycle failed - clean up and get out HAL_WRITE_UINT16(_CSB281_PCI_STAT_CMD, status & _CSB281_PCI_STAT_ERROR_MASK); } #endif HAL_WRITE_UINT32(_CSB281_PCI_CONFIG_ADDR, 0); }