static bool
moxie_reg_ok_for_base_p (const_rtx reg, bool strict_p)
{
int regno = REGNO (reg);
if (strict_p)
return HARD_REGNO_OK_FOR_BASE_P (regno)
|| HARD_REGNO_OK_FOR_BASE_P (reg_renumber[regno]);
else
return !HARD_REGISTER_NUM_P (regno)
|| HARD_REGNO_OK_FOR_BASE_P (regno);
}
static basic_block
create_pre_exit (int n_entities, int *entity_map, const int *num_modes)
{
edge eg;
edge_iterator ei;
basic_block pre_exit;
/* The only non-call predecessor at this stage is a block with a
fallthrough edge; there can be at most one, but there could be
none at all, e.g. when exit is called. */
pre_exit = 0;
FOR_EACH_EDGE (eg, ei, EXIT_BLOCK_PTR_FOR_FN (cfun)->preds)
if (eg->flags & EDGE_FALLTHRU)
{
basic_block src_bb = eg->src;
rtx_insn *last_insn;
rtx ret_reg;
gcc_assert (!pre_exit);
/* If this function returns a value at the end, we have to
insert the final mode switch before the return value copy
to its hard register. */
if (EDGE_COUNT (EXIT_BLOCK_PTR_FOR_FN (cfun)->preds) == 1
&& NONJUMP_INSN_P ((last_insn = BB_END (src_bb)))
&& GET_CODE (PATTERN (last_insn)) == USE
&& GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG)
{
int ret_start = REGNO (ret_reg);
int nregs = hard_regno_nregs[ret_start][GET_MODE (ret_reg)];
int ret_end = ret_start + nregs;
bool short_block = false;
bool multi_reg_return = false;
bool forced_late_switch = false;
rtx_insn *before_return_copy;
do
{
rtx_insn *return_copy = PREV_INSN (last_insn);
rtx return_copy_pat, copy_reg;
int copy_start, copy_num;
int j;
if (NONDEBUG_INSN_P (return_copy))
{
/* When using SJLJ exceptions, the call to the
unregister function is inserted between the
clobber of the return value and the copy.
We do not want to split the block before this
or any other call; if we have not found the
copy yet, the copy must have been deleted. */
if (CALL_P (return_copy))
{
short_block = true;
break;
}
return_copy_pat = PATTERN (return_copy);
switch (GET_CODE (return_copy_pat))
{
case USE:
/* Skip USEs of multiple return registers.
__builtin_apply pattern is also handled here. */
if (GET_CODE (XEXP (return_copy_pat, 0)) == REG
&& (targetm.calls.function_value_regno_p
(REGNO (XEXP (return_copy_pat, 0)))))
{
multi_reg_return = true;
last_insn = return_copy;
continue;
}
break;
case ASM_OPERANDS:
/* Skip barrier insns. */
if (!MEM_VOLATILE_P (return_copy_pat))
break;
/* Fall through. */
case ASM_INPUT:
case UNSPEC_VOLATILE:
last_insn = return_copy;
continue;
default:
break;
}
/* If the return register is not (in its entirety)
likely spilled, the return copy might be
partially or completely optimized away. */
return_copy_pat = single_set (return_copy);
if (!return_copy_pat)
{
return_copy_pat = PATTERN (return_copy);
if (GET_CODE (return_copy_pat) != CLOBBER)
break;
else if (!optimize)
{
/* This might be (clobber (reg [<result>]))
when not optimizing. Then check if
the previous insn is the clobber for
the return register. */
copy_reg = SET_DEST (return_copy_pat);
if (GET_CODE (copy_reg) == REG
&& !HARD_REGISTER_NUM_P (REGNO (copy_reg)))
{
if (INSN_P (PREV_INSN (return_copy)))
{
return_copy = PREV_INSN (return_copy);
return_copy_pat = PATTERN (return_copy);
if (GET_CODE (return_copy_pat) != CLOBBER)
break;
}
}
}
}
copy_reg = SET_DEST (return_copy_pat);
if (GET_CODE (copy_reg) == REG)
copy_start = REGNO (copy_reg);
else if (GET_CODE (copy_reg) == SUBREG
&& GET_CODE (SUBREG_REG (copy_reg)) == REG)
copy_start = REGNO (SUBREG_REG (copy_reg));
else
{
/* When control reaches end of non-void function,
there are no return copy insns at all. This
avoids an ice on that invalid function. */
if (ret_start + nregs == ret_end)
short_block = true;
break;
}
if (!targetm.calls.function_value_regno_p (copy_start))
copy_num = 0;
else
copy_num
= hard_regno_nregs[copy_start][GET_MODE (copy_reg)];
/* If the return register is not likely spilled, - as is
the case for floating point on SH4 - then it might
be set by an arithmetic operation that needs a
different mode than the exit block. */
for (j = n_entities - 1; j >= 0; j--)
{
int e = entity_map[j];
int mode =
targetm.mode_switching.needed (e, return_copy);
if (mode != num_modes[e]
&& mode != targetm.mode_switching.exit (e))
break;
}
if (j >= 0)
{
/* __builtin_return emits a sequence of loads to all
return registers. One of them might require
another mode than MODE_EXIT, even if it is
unrelated to the return value, so we want to put
the final mode switch after it. */
if (multi_reg_return
&& targetm.calls.function_value_regno_p
(copy_start))
forced_late_switch = true;
/* For the SH4, floating point loads depend on fpscr,
thus we might need to put the final mode switch
after the return value copy. That is still OK,
because a floating point return value does not
conflict with address reloads. */
if (copy_start >= ret_start
&& copy_start + copy_num <= ret_end
&& OBJECT_P (SET_SRC (return_copy_pat)))
forced_late_switch = true;
break;
}
if (copy_num == 0)
{
last_insn = return_copy;
continue;
}
if (copy_start >= ret_start
&& copy_start + copy_num <= ret_end)
nregs -= copy_num;
else if (!multi_reg_return
|| !targetm.calls.function_value_regno_p
(copy_start))
break;
last_insn = return_copy;
}
/* ??? Exception handling can lead to the return value
copy being already separated from the return value use,
as in unwind-dw2.c .
Similarly, conditionally returning without a value,
and conditionally using builtin_return can lead to an
isolated use. */
if (return_copy == BB_HEAD (src_bb))
{
short_block = true;
break;
}
last_insn = return_copy;
}
while (nregs);
/* If we didn't see a full return value copy, verify that there
is a plausible reason for this. If some, but not all of the
return register is likely spilled, we can expect that there
is a copy for the likely spilled part. */
gcc_assert (!nregs
|| forced_late_switch
|| short_block
|| !(targetm.class_likely_spilled_p
(REGNO_REG_CLASS (ret_start)))
|| (nregs
!= hard_regno_nregs[ret_start][GET_MODE (ret_reg)])
/* For multi-hard-register floating point
values, sometimes the likely-spilled part
is ordinarily copied first, then the other
part is set with an arithmetic operation.
This doesn't actually cause reload
failures, so let it pass. */
|| (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT
&& nregs != 1));
if (!NOTE_INSN_BASIC_BLOCK_P (last_insn))
{
before_return_copy
= emit_note_before (NOTE_INSN_DELETED, last_insn);
/* Instructions preceding LAST_INSN in the same block might
require a different mode than MODE_EXIT, so if we might
have such instructions, keep them in a separate block
from pre_exit. */
src_bb = split_block (src_bb,
PREV_INSN (before_return_copy))->dest;
}
else
before_return_copy = last_insn;
pre_exit = split_block (src_bb, before_return_copy)->src;
}
else
{
pre_exit = split_edge (eg);
}
}
return pre_exit;
}
static bool
deletable_insn_p (rtx_insn *insn, bool fast, bitmap arg_stores)
{
rtx body, x;
int i;
df_ref def;
if (CALL_P (insn)
/* We cannot delete calls inside of the recursive dce because
this may cause basic blocks to be deleted and this messes up
the rest of the stack of optimization passes. */
&& (!df_in_progress)
/* We cannot delete pure or const sibling calls because it is
hard to see the result. */
&& (!SIBLING_CALL_P (insn))
/* We can delete dead const or pure calls as long as they do not
infinite loop. */
&& (RTL_CONST_OR_PURE_CALL_P (insn)
&& !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)))
return find_call_stack_args (as_a <rtx_call_insn *> (insn), false,
fast, arg_stores);
/* Don't delete jumps, notes and the like. */
if (!NONJUMP_INSN_P (insn))
return false;
/* Don't delete insns that may throw if we cannot do so. */
if (!(cfun->can_delete_dead_exceptions && can_alter_cfg)
&& !insn_nothrow_p (insn))
return false;
/* If INSN sets a global_reg, leave it untouched. */
FOR_EACH_INSN_DEF (def, insn)
if (HARD_REGISTER_NUM_P (DF_REF_REGNO (def))
&& global_regs[DF_REF_REGNO (def)])
return false;
/* Initialization of pseudo PIC register should never be removed. */
else if (DF_REF_REG (def) == pic_offset_table_rtx
&& REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
return false;
body = PATTERN (insn);
switch (GET_CODE (body))
{
case USE:
case VAR_LOCATION:
return false;
case CLOBBER:
if (fast)
{
/* A CLOBBER of a dead pseudo register serves no purpose.
That is not necessarily true for hard registers until
after reload. */
x = XEXP (body, 0);
return REG_P (x) && (!HARD_REGISTER_P (x) || reload_completed);
}
else
/* Because of the way that use-def chains are built, it is not
possible to tell if the clobber is dead because it can
never be the target of a use-def chain. */
return false;
case PARALLEL:
for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
if (!deletable_insn_p_1 (XVECEXP (body, 0, i)))
return false;
return true;
default:
return deletable_insn_p_1 (body);
}
}
