/**Function*************************************************************
Synopsis [Recognizes what nodes are inputs of the EXOR.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Hop_ObjRecognizeExor( Hop_Obj_t * pObj, Hop_Obj_t ** ppFan0, Hop_Obj_t ** ppFan1 )
{
Hop_Obj_t * p0, * p1;
assert( !Hop_IsComplement(pObj) );
if ( !Hop_ObjIsNode(pObj) )
return 0;
if ( Hop_ObjIsExor(pObj) )
{
*ppFan0 = Hop_ObjChild0(pObj);
*ppFan1 = Hop_ObjChild1(pObj);
return 1;
}
assert( Hop_ObjIsAnd(pObj) );
p0 = Hop_ObjChild0(pObj);
p1 = Hop_ObjChild1(pObj);
if ( !Hop_IsComplement(p0) || !Hop_IsComplement(p1) )
return 0;
p0 = Hop_Regular(p0);
p1 = Hop_Regular(p1);
if ( !Hop_ObjIsAnd(p0) || !Hop_ObjIsAnd(p1) )
return 0;
if ( Hop_ObjFanin0(p0) != Hop_ObjFanin0(p1) || Hop_ObjFanin1(p0) != Hop_ObjFanin1(p1) )
return 0;
if ( Hop_ObjFaninC0(p0) == Hop_ObjFaninC0(p1) || Hop_ObjFaninC1(p0) == Hop_ObjFaninC1(p1) )
return 0;
*ppFan0 = Hop_ObjChild0(p0);
*ppFan1 = Hop_ObjChild1(p0);
return 1;
}
word Hop_ManComputeTruth6( Hop_Man_t * p, Hop_Obj_t * pObj, int nVars )
{
word Truth;
int i;
if ( Hop_ObjIsConst1( Hop_Regular(pObj) ) )
return Hop_IsComplement(pObj) ? 0 : ~(word)0;
for ( i = 0; i < nVars; i++ )
Hop_ManPi( p, i )->iData = i;
Truth = Hop_ManComputeTruth6_rec( p, Hop_Regular(pObj) );
return Hop_IsComplement(pObj) ? ~Truth : Truth;
}
/**Function*************************************************************
Synopsis [Prints Eqn formula for the AIG rooted at this node.]
Description [The formula is in terms of PIs, which should have
their names assigned in pObj->pData fields.]
SideEffects []
SeeAlso []
***********************************************************************/
void Hop_ObjPrintEqn( FILE * pFile, Hop_Obj_t * pObj, Vec_Vec_t * vLevels, int Level )
{
Vec_Ptr_t * vSuper;
Hop_Obj_t * pFanin;
int fCompl, i;
// store the complemented attribute
fCompl = Hop_IsComplement(pObj);
pObj = Hop_Regular(pObj);
// constant case
if ( Hop_ObjIsConst1(pObj) )
{
fprintf( pFile, "%d", !fCompl );
return;
}
// PI case
if ( Hop_ObjIsPi(pObj) )
{
fprintf( pFile, "%s%s", fCompl? "!" : "", (char*)pObj->pData );
return;
}
// AND case
Vec_VecExpand( vLevels, Level );
vSuper = Vec_VecEntry(vLevels, Level);
Hop_ObjCollectMulti( pObj, vSuper );
fprintf( pFile, "%s", (Level==0? "" : "(") );
Vec_PtrForEachEntry( Hop_Obj_t *, vSuper, pFanin, i )
{
Hop_ObjPrintEqn( pFile, Hop_NotCond(pFanin, fCompl), vLevels, Level+1 );
if ( i < Vec_PtrSize(vSuper) - 1 )
fprintf( pFile, " %s ", fCompl? "+" : "*" );
}
/**Function*************************************************************
Synopsis [Converts the network from AIG to BDD representation.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_MfsConvertHopToAig( Abc_Obj_t * pObjOld, Aig_Man_t * pMan )
{
Hop_Man_t * pHopMan;
Hop_Obj_t * pRoot;
Abc_Obj_t * pFanin;
int i;
// get the local AIG
pHopMan = (Hop_Man_t *)pObjOld->pNtk->pManFunc;
pRoot = (Hop_Obj_t *)pObjOld->pData;
// check the case of a constant
if ( Hop_ObjIsConst1( Hop_Regular(pRoot) ) )
{
pObjOld->pCopy = (Abc_Obj_t *)Aig_NotCond( Aig_ManConst1(pMan), Hop_IsComplement(pRoot) );
pObjOld->pNext = pObjOld->pCopy;
return;
}
// assign the fanin nodes
Abc_ObjForEachFanin( pObjOld, pFanin, i )
Hop_ManPi(pHopMan, i)->pData = pFanin->pCopy;
// construct the AIG
Abc_MfsConvertHopToAig_rec( Hop_Regular(pRoot), pMan );
pObjOld->pCopy = (Abc_Obj_t *)Aig_NotCond( (Aig_Obj_t *)Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );
Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
// assign the fanin nodes
Abc_ObjForEachFanin( pObjOld, pFanin, i )
Hop_ManPi(pHopMan, i)->pData = pFanin->pNext;
// construct the AIG
Abc_MfsConvertHopToAig_rec( Hop_Regular(pRoot), pMan );
pObjOld->pNext = (Abc_Obj_t *)Aig_NotCond( (Aig_Obj_t *)Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );
Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
}
int Abc_NtkTestTimNodeStrash( Gia_Man_t * pGia, Abc_Obj_t * pNode )
{
Hop_Man_t * pMan;
Hop_Obj_t * pRoot;
Abc_Obj_t * pFanin;
int i;
assert( Abc_ObjIsNode(pNode) );
assert( Abc_NtkIsAigLogic(pNode->pNtk) );
// get the local AIG manager and the local root node
pMan = (Hop_Man_t *)pNode->pNtk->pManFunc;
pRoot = (Hop_Obj_t *)pNode->pData;
// check the constant case
if ( Abc_NodeIsConst(pNode) || Hop_Regular(pRoot) == Hop_ManConst1(pMan) )
return !Hop_IsComplement(pRoot);
// set elementary variables
Abc_ObjForEachFanin( pNode, pFanin, i )
Hop_IthVar(pMan, i)->iData = pFanin->iTemp;
// strash the AIG of this node
Abc_NtkTestTimNodeStrash_rec( pGia, Hop_Regular(pRoot) );
Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
// return the final node with complement if needed
return Abc_LitNotCond( Hop_Regular(pRoot)->iData, Hop_IsComplement(pRoot) );
}
/**Function*************************************************************
Synopsis [Computes truth table of the node.]
Description [Assumes that the structural support is no more than 8 inputs.
Uses array vTruth to store temporary truth tables. The returned pointer should
be used immediately.]
SideEffects []
SeeAlso []
***********************************************************************/
unsigned * Hop_ManConvertAigToTruth( Hop_Man_t * p, Hop_Obj_t * pRoot, int nVars, Vec_Int_t * vTruth, int fMsbFirst )
{
static unsigned uTruths[8][8] = { // elementary truth tables
{ 0xAAAAAAAA,0xAAAAAAAA,0xAAAAAAAA,0xAAAAAAAA,0xAAAAAAAA,0xAAAAAAAA,0xAAAAAAAA,0xAAAAAAAA },
{ 0xCCCCCCCC,0xCCCCCCCC,0xCCCCCCCC,0xCCCCCCCC,0xCCCCCCCC,0xCCCCCCCC,0xCCCCCCCC,0xCCCCCCCC },
{ 0xF0F0F0F0,0xF0F0F0F0,0xF0F0F0F0,0xF0F0F0F0,0xF0F0F0F0,0xF0F0F0F0,0xF0F0F0F0,0xF0F0F0F0 },
{ 0xFF00FF00,0xFF00FF00,0xFF00FF00,0xFF00FF00,0xFF00FF00,0xFF00FF00,0xFF00FF00,0xFF00FF00 },
{ 0xFFFF0000,0xFFFF0000,0xFFFF0000,0xFFFF0000,0xFFFF0000,0xFFFF0000,0xFFFF0000,0xFFFF0000 },
{ 0x00000000,0xFFFFFFFF,0x00000000,0xFFFFFFFF,0x00000000,0xFFFFFFFF,0x00000000,0xFFFFFFFF },
{ 0x00000000,0x00000000,0xFFFFFFFF,0xFFFFFFFF,0x00000000,0x00000000,0xFFFFFFFF,0xFFFFFFFF },
{ 0x00000000,0x00000000,0x00000000,0x00000000,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF }
};
Hop_Obj_t * pObj;
unsigned * pTruth, * pTruth2;
int i, nWords, nNodes;
Vec_Ptr_t * vTtElems;
// if the number of variables is more than 8, allocate truth tables
if ( nVars > 8 )
vTtElems = Vec_PtrAllocTruthTables( nVars );
else
vTtElems = NULL;
// clear the data fields and set marks
nNodes = Hop_ManConvertAigToTruth_rec1( Hop_Regular(pRoot) );
// prepare memory
nWords = Hop_TruthWordNum( nVars );
Vec_IntClear( vTruth );
Vec_IntGrow( vTruth, nWords * (nNodes+1) );
pTruth = Vec_IntFetch( vTruth, nWords );
// check the case of a constant
if ( Hop_ObjIsConst1( Hop_Regular(pRoot) ) )
{
assert( nNodes == 0 );
if ( Hop_IsComplement(pRoot) )
Hop_ManTruthClear( pTruth, nVars );
else
Hop_ManTruthFill( pTruth, nVars );
return pTruth;
}
// set elementary truth tables at the leaves
assert( nVars <= Hop_ManPiNum(p) );
// assert( Hop_ManPiNum(p) <= 8 );
if ( fMsbFirst )
{
// Hop_ManForEachPi( p, pObj, i )
for ( i = 0; i < nVars; i++ )
{
pObj = Hop_ManPi( p, i );
if ( vTtElems )
pObj->pData = Vec_PtrEntry(vTtElems, nVars-1-i);
else
pObj->pData = (void *)uTruths[nVars-1-i];
}
}
else
{
// Hop_ManForEachPi( p, pObj, i )
for ( i = 0; i < nVars; i++ )
{
pObj = Hop_ManPi( p, i );
if ( vTtElems )
pObj->pData = Vec_PtrEntry(vTtElems, i);
else
pObj->pData = (void *)uTruths[i];
}
}
// clear the marks and compute the truth table
pTruth2 = Hop_ManConvertAigToTruth_rec2( Hop_Regular(pRoot), vTruth, nWords );
// copy the result
Hop_ManTruthCopy( pTruth, pTruth2, nVars );
if ( Hop_IsComplement(pRoot) )
Hop_ManTruthNot( pTruth, pTruth, nVars );
if ( vTtElems )
Vec_PtrFree( vTtElems );
return pTruth;
}
{ 0x00000000,0x00000000,0x00000000,0x00000000,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF }
};
Hop_Obj_t * pObj;
unsigned * pTruth, * pTruth2;
int i, nWords, nNodes;
Vec_Ptr_t * vTtElems;
// if the number of variables is more than 8, allocate truth tables
if ( nVars > 8 )
vTtElems = Vec_PtrAllocTruthTables( nVars );
else
vTtElems = NULL;
// clear the data fields and set marks
<<<<<<< HEAD
nNodes = Hop_ManConvertAigToTruth_rec1( Hop_Regular( pRoot) );
=======
nNodes = Hop_ManConvertAigToTruth_rec1( Hop_Regular(pRoot) );
>>>>>>> 315ac30... test_commit
// prepare memory
nWords = Hop_TruthWordNum( nVars );
Vec_IntClear( vTruth );
Vec_IntGrow( vTruth, nWords * (nNodes+1) );
pTruth = Vec_IntFetch( vTruth, nWords );
// check the case of a constant
if ( Hop_ObjIsConst1( Hop_Regular(pRoot) ) )
{
assert( nNodes == 0 );
if ( Hop_IsComplement(pRoot) )
Hop_ManTruthClear( pTruth, nVars );
else
