/*******************************************************************************
* Function Name: I2C_1_Stop
********************************************************************************
*
* Summary:
*  Disables the SCB component and its interrupt.
*  It also disables all TX interrupt sources so as not to cause an unexpected
*  interrupt trigger because after the component is enabled, the TX FIFO 
*  is empty.
*
* Parameters:
*  None
*
* Return:
*  None
* 
*******************************************************************************/
void I2C_1_Stop(void)
{
#if (I2C_1_SCB_IRQ_INTERNAL)
    I2C_1_DisableInt();
#endif /* (I2C_1_SCB_IRQ_INTERNAL) */

    /* Call Stop function specific to current operation mode */
    I2C_1_ScbModeStop();

    /* Disable SCB IP */
    I2C_1_CTRL_REG &= (uint32) ~I2C_1_CTRL_ENABLED;

    /* Disable all TX interrupt sources so as not to cause an unexpected
    * interrupt trigger because after the component is enabled, the TX FIFO
    * is empty.
    * For SCB IP v0, it is critical as it does not mask-out interrupt
    * sources when they are disabled. This can cause a code lock-up in the
    * interrupt handler because TX FIFO cannot be loaded after the block
    * is disabled.
    */
    I2C_1_SetTxInterruptMode(I2C_1_NO_INTR_SOURCES);

#if (I2C_1_SCB_IRQ_INTERNAL)
    I2C_1_ClearPendingInt();
#endif /* (I2C_1_SCB_IRQ_INTERNAL) */
}
示例#2
0
/*******************************************************************************
* Function Name: I2C_1_Stop
********************************************************************************
*
* Summary:
*  Disables the SCB component and its interrupt.
*
* Parameters:
*  None
*
* Return:
*  None
*
*******************************************************************************/
void I2C_1_Stop(void)
{
#if(I2C_1_SCB_IRQ_INTERNAL)
    I2C_1_DisableInt();
#endif /* (I2C_1_SCB_IRQ_INTERNAL) */

    I2C_1_CTRL_REG &= (uint32) ~I2C_1_CTRL_ENABLED;  /* Disable scb IP */

#if(I2C_1_SCB_IRQ_INTERNAL)
    I2C_1_ClearPendingInt();
#endif /* (I2C_1_SCB_IRQ_INTERNAL) */

    I2C_1_ScbModeStop(); /* Calls scbMode specific Stop function */
}
/*******************************************************************************
* Function Name: I2C_1_I2CStop
********************************************************************************
*
* Summary:
*  Resets the I2C FSM into the default state and disables TX interrupt sources.
*
* Parameters:
*  None
*
* Return:
*  None
*
* Global variables:
*
*
*******************************************************************************/
void I2C_1_I2CStop(void)
{
    /* Disable TX interrupt sources in order not to cause a false trigger.
    * The incoming transaction will enable an appropriate TX interrupt.
    */
    I2C_1_SetTxInterruptMode(I2C_1_NO_INTR_SOURCES);

#if(I2C_1_CY_SCBIP_V0)
    /* Clear pending interrupt as TX FIFO becomes empty and block does not gate interrupt trigger when disabled */
    I2C_1_ClearPendingInt();
#endif /* (I2C_1_CY_SCBIP_V0) */

    I2C_1_state = I2C_1_I2C_FSM_IDLE;
}
示例#4
0
文件: I2C_1.c 项目: Qmax/PT6
/*******************************************************************************
* Function Name: I2C_1_Stop
********************************************************************************
*
* Summary:
*  Disables I2C hardware and disables I2C interrupt. Disables Active mode power
*  template bits or clock gating as appropriate.
*
* Parameters:
*  None
*
* Return:
*  None
*
*******************************************************************************/
void I2C_1_Stop(void)
{
#if((I2C_1_FF_IMPLEMENTED)  || \
        (I2C_1_UDB_IMPLEMENTED && I2C_1_MODE_SLAVE_ENABLED))
    uint8 enableInterrupts;
#endif /* ((I2C_1_FF_IMPLEMENTED)  || \
               (I2C_1_UDB_IMPLEMENTED && I2C_1_MODE_SLAVE_ENABLED)) */

    I2C_1_DisableInt();

    I2C_1_DISABLE_INT_ON_STOP;   /* Interrupt on Stop can be enabled by write */
    (void) I2C_1_CSR_REG;        /* Clear CSR reg */

#if(I2C_1_TIMEOUT_ENABLED)
    I2C_1_TimeoutStop();
#endif  /* End (I2C_1_TIMEOUT_ENABLED) */

#if(I2C_1_FF_IMPLEMENTED)
#if(CY_PSOC3 || CY_PSOC5LP)
    /* Store registers which are held in reset when Master and Slave bits are cleared */
#if(I2C_1_MODE_SLAVE_ENABLED)
    I2C_1_backup.addr = I2C_1_ADDR_REG;
#endif /* (I2C_1_MODE_SLAVE_ENABLED) */

    I2C_1_backup.clkDiv1  = I2C_1_CLKDIV1_REG;
    I2C_1_backup.clkDiv2  = I2C_1_CLKDIV2_REG;


    /* Reset FF block */
    I2C_1_CFG_REG &= ((uint8) ~I2C_1_ENABLE_MS);
    CyDelayUs(I2C_1_FF_RESET_DELAY);
    I2C_1_CFG_REG |= ((uint8)  I2C_1_ENABLE_MS);


    /* Restore registers */
#if(I2C_1_MODE_SLAVE_ENABLED)
    I2C_1_ADDR_REG = I2C_1_backup.addr;
#endif /* (I2C_1_MODE_SLAVE_ENABLED) */

    I2C_1_CLKDIV1_REG = I2C_1_backup.clkDiv1;
    I2C_1_CLKDIV2_REG = I2C_1_backup.clkDiv2;

#endif /* (CY_PSOC3 || CY_PSOC5LP) */

    /* Disable power to I2C block */
    enableInterrupts = CyEnterCriticalSection();
    I2C_1_ACT_PWRMGR_REG  &= ((uint8) ~I2C_1_ACT_PWR_EN);
    I2C_1_STBY_PWRMGR_REG &= ((uint8) ~I2C_1_STBY_PWR_EN);
    CyExitCriticalSection(enableInterrupts);

#else

#if(I2C_1_MODE_SLAVE_ENABLED)
    /* Disable slave bit counter */
    enableInterrupts = CyEnterCriticalSection();
    I2C_1_COUNTER_AUX_CTL_REG &= ((uint8) ~I2C_1_CNT7_ENABLE);
    CyExitCriticalSection(enableInterrupts);
#endif /* (I2C_1_MODE_SLAVE_ENABLED) */

    I2C_1_CFG_REG &= ((uint8) ~I2C_1_ENABLE_MS);

#endif /* (I2C_1_FF_IMPLEMENTED) */

    I2C_1_ClearPendingInt();  /* Clear interrupt triggers on reset */

    I2C_1_state = I2C_1_SM_IDLE;  /* Reset software FSM */
}