static int i2c_pnx_probe(struct platform_device *pdev)
{
unsigned long tmp;
int ret = 0;
struct i2c_pnx_algo_data *alg_data;
unsigned long freq;
struct resource *res;
u32 speed = I2C_PNX_SPEED_KHZ_DEFAULT * 1000;
alg_data = devm_kzalloc(&pdev->dev, sizeof(*alg_data), GFP_KERNEL);
if (!alg_data)
return -ENOMEM;
platform_set_drvdata(pdev, alg_data);
alg_data->adapter.dev.parent = &pdev->dev;
alg_data->adapter.algo = &pnx_algorithm;
alg_data->adapter.algo_data = alg_data;
alg_data->adapter.nr = pdev->id;
alg_data->timeout = I2C_PNX_TIMEOUT_DEFAULT;
#ifdef CONFIG_OF
alg_data->adapter.dev.of_node = of_node_get(pdev->dev.of_node);
if (pdev->dev.of_node) {
of_property_read_u32(pdev->dev.of_node, "clock-frequency",
&speed);
/*
* At this point, it is planned to add an OF timeout property.
* As soon as there is a consensus about how to call and handle
* this, sth. like the following can be put here:
*
* of_property_read_u32(pdev->dev.of_node, "timeout",
* &alg_data->timeout);
*/
}
#endif
alg_data->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(alg_data->clk))
return PTR_ERR(alg_data->clk);
init_timer(&alg_data->mif.timer);
alg_data->mif.timer.function = i2c_pnx_timeout;
alg_data->mif.timer.data = (unsigned long)alg_data;
snprintf(alg_data->adapter.name, sizeof(alg_data->adapter.name),
"%s", pdev->name);
/* Register I/O resource */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
alg_data->ioaddr = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(alg_data->ioaddr))
return PTR_ERR(alg_data->ioaddr);
ret = clk_prepare_enable(alg_data->clk);
if (ret)
return ret;
freq = clk_get_rate(alg_data->clk);
/*
* Clock Divisor High This value is the number of system clocks
* the serial clock (SCL) will be high.
* For example, if the system clock period is 50 ns and the maximum
* desired serial period is 10000 ns (100 kHz), then CLKHI would be
* set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
* programmed into CLKHI will vary from this slightly due to
* variations in the output pad's rise and fall times as well as
* the deglitching filter length.
*/
tmp = (freq / speed) / 2 - 2;
if (tmp > 0x3FF)
tmp = 0x3FF;
iowrite32(tmp, I2C_REG_CKH(alg_data));
iowrite32(tmp, I2C_REG_CKL(alg_data));
iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
if (wait_reset(alg_data)) {
ret = -ENODEV;
goto out_clock;
}
init_completion(&alg_data->mif.complete);
alg_data->irq = platform_get_irq(pdev, 0);
if (alg_data->irq < 0) {
dev_err(&pdev->dev, "Failed to get IRQ from platform resource\n");
ret = alg_data->irq;
goto out_clock;
}
ret = devm_request_irq(&pdev->dev, alg_data->irq, i2c_pnx_interrupt,
0, pdev->name, alg_data);
if (ret)
goto out_clock;
/* Register this adapter with the I2C subsystem */
ret = i2c_add_numbered_adapter(&alg_data->adapter);
if (ret < 0) {
dev_err(&pdev->dev, "I2C: Failed to add bus\n");
goto out_clock;
}
dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
alg_data->adapter.name, res->start, alg_data->irq);
return 0;
out_clock:
clk_disable_unprepare(alg_data->clk);
return ret;
}
static int __devinit i2c_pnx_probe(struct platform_device *pdev)
{
unsigned long tmp;
int ret = 0;
struct i2c_pnx_algo_data *alg_data;
unsigned long freq;
struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
if (!i2c_pnx || !i2c_pnx->name) {
dev_err(&pdev->dev, "%s: no platform data supplied\n",
__func__);
ret = -EINVAL;
goto out;
}
alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
if (!alg_data) {
ret = -ENOMEM;
goto err_kzalloc;
}
platform_set_drvdata(pdev, alg_data);
strlcpy(alg_data->adapter.name, i2c_pnx->name,
sizeof(alg_data->adapter.name));
alg_data->adapter.dev.parent = &pdev->dev;
alg_data->adapter.algo = &pnx_algorithm;
alg_data->adapter.algo_data = alg_data;
alg_data->adapter.nr = pdev->id;
alg_data->i2c_pnx = i2c_pnx;
alg_data->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(alg_data->clk)) {
ret = PTR_ERR(alg_data->clk);
goto out_drvdata;
}
init_timer(&alg_data->mif.timer);
alg_data->mif.timer.function = i2c_pnx_timeout;
alg_data->mif.timer.data = (unsigned long)alg_data;
/* Register I/O resource */
if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
pdev->name)) {
dev_err(&pdev->dev,
"I/O region 0x%08x for I2C already in use.\n",
i2c_pnx->base);
ret = -ENODEV;
goto out_clkget;
}
alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
if (!alg_data->ioaddr) {
dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
ret = -ENOMEM;
goto out_release;
}
ret = clk_enable(alg_data->clk);
if (ret)
goto out_unmap;
freq = clk_get_rate(alg_data->clk);
/*
* Clock Divisor High This value is the number of system clocks
* the serial clock (SCL) will be high.
* For example, if the system clock period is 50 ns and the maximum
* desired serial period is 10000 ns (100 kHz), then CLKHI would be
* set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
* programmed into CLKHI will vary from this slightly due to
* variations in the output pad's rise and fall times as well as
* the deglitching filter length.
*/
tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
iowrite32(tmp, I2C_REG_CKH(alg_data));
iowrite32(tmp, I2C_REG_CKL(alg_data));
iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
ret = -ENODEV;
goto out_clock;
}
init_completion(&alg_data->mif.complete);
ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
0, pdev->name, alg_data);
if (ret)
goto out_clock;
/* Register this adapter with the I2C subsystem */
ret = i2c_add_numbered_adapter(&alg_data->adapter);
if (ret < 0) {
dev_err(&pdev->dev, "I2C: Failed to add bus\n");
goto out_irq;
}
dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
return 0;
out_irq:
free_irq(i2c_pnx->irq, alg_data);
out_clock:
clk_disable(alg_data->clk);
out_unmap:
iounmap(alg_data->ioaddr);
out_release:
release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
out_clkget:
clk_put(alg_data->clk);
out_drvdata:
kfree(alg_data);
err_kzalloc:
platform_set_drvdata(pdev, NULL);
out:
return ret;
}
static int __devinit i2c_pnx_probe(struct platform_device *pdev)
{
unsigned long tmp;
int ret = 0;
struct i2c_pnx_algo_data *alg_data;
int freq_mhz;
struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
if (!i2c_pnx || !i2c_pnx->adapter) {
dev_err(&pdev->dev, "%s: no platform data supplied\n",
__func__);
ret = -EINVAL;
goto out;
}
platform_set_drvdata(pdev, i2c_pnx);
if (i2c_pnx->calculate_input_freq)
freq_mhz = i2c_pnx->calculate_input_freq(pdev);
else {
freq_mhz = PNX_DEFAULT_FREQ;
dev_info(&pdev->dev, "Setting bus frequency to default value: "
"%d MHz\n", freq_mhz);
}
i2c_pnx->adapter->algo = &pnx_algorithm;
alg_data = i2c_pnx->adapter->algo_data;
init_timer(&alg_data->mif.timer);
alg_data->mif.timer.function = i2c_pnx_timeout;
alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
/* Register I/O resource */
if (!request_mem_region(alg_data->base, I2C_PNX_REGION_SIZE,
pdev->name)) {
dev_err(&pdev->dev,
"I/O region 0x%08x for I2C already in use.\n",
alg_data->base);
ret = -ENODEV;
goto out_drvdata;
}
if (!(alg_data->ioaddr =
(u32)ioremap(alg_data->base, I2C_PNX_REGION_SIZE))) {
dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
ret = -ENOMEM;
goto out_release;
}
i2c_pnx->set_clock_run(pdev);
/*
* Clock Divisor High This value is the number of system clocks
* the serial clock (SCL) will be high.
* For example, if the system clock period is 50 ns and the maximum
* desired serial period is 10000 ns (100 kHz), then CLKHI would be
* set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
* programmed into CLKHI will vary from this slightly due to
* variations in the output pad's rise and fall times as well as
* the deglitching filter length.
*/
tmp = ((freq_mhz * 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
iowrite32(tmp, I2C_REG_CKH(alg_data));
iowrite32(tmp, I2C_REG_CKL(alg_data));
iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
ret = -ENODEV;
goto out_unmap;
}
init_completion(&alg_data->mif.complete);
ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
0, pdev->name, i2c_pnx->adapter);
if (ret)
goto out_clock;
/* Register this adapter with the I2C subsystem */
i2c_pnx->adapter->dev.parent = &pdev->dev;
ret = i2c_add_adapter(i2c_pnx->adapter);
if (ret < 0) {
dev_err(&pdev->dev, "I2C: Failed to add bus\n");
goto out_irq;
}
dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
i2c_pnx->adapter->name, alg_data->base, alg_data->irq);
return 0;
out_irq:
free_irq(alg_data->irq, alg_data);
out_clock:
i2c_pnx->set_clock_stop(pdev);
out_unmap:
iounmap((void *)alg_data->ioaddr);
out_release:
release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
out_drvdata:
platform_set_drvdata(pdev, NULL);
out:
return ret;
}
static int __devinit i2c_pnx_probe(struct platform_device *pdev)
{
unsigned long tmp;
int ret = 0;
struct i2c_pnx_algo_data *alg_data;
unsigned long freq;
struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
if (!i2c_pnx || !i2c_pnx->name) {
dev_err(&pdev->dev, "%s: no platform data supplied\n",
__func__);
ret = -EINVAL;
goto out;
}
alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
if (!alg_data) {
ret = -ENOMEM;
goto err_kzalloc;
}
platform_set_drvdata(pdev, alg_data);
strlcpy(alg_data->adapter.name, i2c_pnx->name,
sizeof(alg_data->adapter.name));
alg_data->adapter.dev.parent = &pdev->dev;
alg_data->adapter.algo = &pnx_algorithm;
alg_data->adapter.algo_data = alg_data;
alg_data->adapter.nr = pdev->id;
alg_data->i2c_pnx = i2c_pnx;
alg_data->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(alg_data->clk)) {
ret = PTR_ERR(alg_data->clk);
goto out_drvdata;
}
init_timer(&alg_data->mif.timer);
alg_data->mif.timer.function = i2c_pnx_timeout;
alg_data->mif.timer.data = (unsigned long)alg_data;
/* */
if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
pdev->name)) {
dev_err(&pdev->dev,
"I/O region 0x%08x for I2C already in use.\n",
i2c_pnx->base);
ret = -ENODEV;
goto out_clkget;
}
alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
if (!alg_data->ioaddr) {
dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
ret = -ENOMEM;
goto out_release;
}
ret = clk_enable(alg_data->clk);
if (ret)
goto out_unmap;
freq = clk_get_rate(alg_data->clk);
/*
*/
tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
if (tmp > 0x3FF)
tmp = 0x3FF;
iowrite32(tmp, I2C_REG_CKH(alg_data));
iowrite32(tmp, I2C_REG_CKL(alg_data));
iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
ret = -ENODEV;
goto out_clock;
}
init_completion(&alg_data->mif.complete);
ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
0, pdev->name, alg_data);
if (ret)
goto out_clock;
/* */
ret = i2c_add_numbered_adapter(&alg_data->adapter);
if (ret < 0) {
dev_err(&pdev->dev, "I2C: Failed to add bus\n");
goto out_irq;
}
dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
return 0;
out_irq:
free_irq(i2c_pnx->irq, alg_data);
out_clock:
clk_disable(alg_data->clk);
out_unmap:
iounmap(alg_data->ioaddr);
out_release:
release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
out_clkget:
clk_put(alg_data->clk);
out_drvdata:
kfree(alg_data);
err_kzalloc:
platform_set_drvdata(pdev, NULL);
out:
return ret;
}
