bool RITQueue_PutPending(uint8_t elementpos)
{
bool ret = false;
uint8_t i;
//EnterCriticalSection
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
if (RITQueue_IsEmpty() == false)
{
if (elementpos < maxElements)
{
pvObjList[elementpos].pending = 1;
pvObjList[elementpos].countretry++;
ret = true;
}
}
else
{
//printf("LISTA VAZIA!!!!! \n");
}
//LeaveCriticalSection
ENABLE_INTERRUPTS();
return ret;
}
/**
\brief Request a new (free) packet buffer.
Component throughout the protocol stack can call this function is they want to
get a new packet buffer to start creating a new packet.
\note Once a packet has been allocated, it is up to the creator of the packet
to free it using the openqueue_freePacketBuffer() function.
\returns A pointer to the queue entry when it could be allocated, or NULL when
it could not be allocated (buffer full or not synchronized).
*/
OpenQueueEntry_t* openqueue_getFreePacketBuffer(uint8_t creator) {
uint8_t i;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
// refuse to allocate if we're not in sync
if (ieee154e_isSynch()==FALSE && creator > COMPONENT_IEEE802154E){
ENABLE_INTERRUPTS();
return NULL;
}
// if you get here, I will try to allocate a buffer for you
// walk through queue and find free entry
for (i=0;i<QUEUELENGTH;i++) {
if (openqueue_vars.queue[i].owner==COMPONENT_NULL) {
openqueue_vars.queue[i].creator=creator;
openqueue_vars.queue[i].owner=COMPONENT_OPENQUEUE;
ENABLE_INTERRUPTS();
return &openqueue_vars.queue[i];
}
}
ENABLE_INTERRUPTS();
return NULL;
}
/*
* Verifica se existe algum frame pendente
*/
bool RITQueue_ExistFramePending(void)
{
bool ret = false;
uint8_t i;
//EnterCriticalSection
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
for (i = 0; i < maxElements; i++)
{
if (pvObjList[i].pending)
{
if (pvObjList[i].countretry < 3)
{
ret = true;
break;
}
else //REMOVO O ELEMENTO QUE JA ESTA A TEMPOS AQUI
{
RITQueue_Free(i);
}
}
}
if (coappending)
ret = true;
//LeaveCriticalSection
ENABLE_INTERRUPTS();
return ret;
}
/**
\brief Indicate the transmission of a packet.
*/
void schedule_indicateTx(asn_t* asnTimestamp,
bool succesfullTx) {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
// increment usage statistics
if (schedule_vars.currentScheduleEntry->numTx==0xFF) {
schedule_vars.currentScheduleEntry->numTx/=2;
schedule_vars.currentScheduleEntry->numTxACK/=2;
}
schedule_vars.currentScheduleEntry->numTx++;
if (succesfullTx==TRUE) {
schedule_vars.currentScheduleEntry->numTxACK++;
}
// update last used timestamp
memcpy(&schedule_vars.currentScheduleEntry->lastUsedAsn, asnTimestamp, sizeof(asn_t));
// update this slot's backoff parameters
if (succesfullTx==TRUE) {
// reset backoffExponent
schedule_vars.currentScheduleEntry->backoffExponent = MINBE-1;
// reset backoff
schedule_vars.currentScheduleEntry->backoff = 0;
} else {
// increase the backoffExponent
if (schedule_vars.currentScheduleEntry->backoffExponent<MAXBE) {
schedule_vars.currentScheduleEntry->backoffExponent++;
}
// set the backoff to a random value in [0..2^BE]
schedule_vars.currentScheduleEntry->backoff =
openrandom_get16b()%(1<<schedule_vars.currentScheduleEntry->backoffExponent);
}
ENABLE_INTERRUPTS();
}
/**
\brief Free all the packet buffers owned by a specific module.
\param owner The identifier of the component, taken in COMPONENT_*.
*/
void openqueue_removeAllOwnedBy(uint8_t owner) {
uint8_t i;
uint8_t count=0;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
for (i=0;i<QUEUELENGTH;i++){
if (openqueue_vars.queue[i].owner==owner) {
count++;
openqueue_reset_entry(&(openqueue_vars.queue[i]));
}
}
ENABLE_INTERRUPTS();
#if ((ENABLE_DEBUG_RFF ==1) && (DBG_OPENQUEUE == 1))
{
uint8_t pos=0;
rffbuf[pos++]= RFF_OPENQUEUE_FREE;
rffbuf[pos++]= 0x03;
rffbuf[pos++]= owner;
rffbuf[pos++]= count;
openserial_printStatus(STATUS_RFF,(uint8_t*)&rffbuf,pos);
}
#endif
}
OpenQueueEntry_t* openqueue_macGetDataPacket(open_addr_t* toNeighbor) {
uint8_t i;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
if (toNeighbor->type==ADDR_64B) {
// a neighbor is specified, look for a packet unicast to that neigbhbor
for (i=0;i<QUEUELENGTH;i++) {
if (openqueue_vars.queue[i].owner==COMPONENT_RES_TO_IEEE802154E &&
packetfunctions_sameAddress(toNeighbor,&openqueue_vars.queue[i].l2_nextORpreviousHop)) {
ENABLE_INTERRUPTS();
return &openqueue_vars.queue[i];
}
}
} else if (toNeighbor->type==ADDR_ANYCAST) {
// anycast case: look for a packet which is either not created by RES
// or an KA (created by RES, but not broadcast)
for (i=0;i<QUEUELENGTH;i++) {
if (openqueue_vars.queue[i].owner==COMPONENT_RES_TO_IEEE802154E &&
( openqueue_vars.queue[i].creator!=COMPONENT_RES ||
(
openqueue_vars.queue[i].creator==COMPONENT_RES &&
packetfunctions_isBroadcastMulticast(&(openqueue_vars.queue[i].l2_nextORpreviousHop))==FALSE
)
)
) {
ENABLE_INTERRUPTS();
return &openqueue_vars.queue[i];
}
}
}
ENABLE_INTERRUPTS();
return NULL;
}
owerror_t openserial_printData(uint8_t* buffer, uint8_t length) {
uint8_t i;
uint8_t asn[5];
INTERRUPT_DECLARATION();
// retrieve ASN
ieee154e_getAsn(asn);// byte01,byte23,byte4
DISABLE_INTERRUPTS();
openserial_vars.outputBufFilled = TRUE;
outputHdlcOpen();
outputHdlcWrite(SERFRAME_MOTE2PC_DATA);
outputHdlcWrite(idmanager_getMyID(ADDR_16B)->addr_16b[1]);
outputHdlcWrite(idmanager_getMyID(ADDR_16B)->addr_16b[0]);
outputHdlcWrite(asn[0]);
outputHdlcWrite(asn[1]);
outputHdlcWrite(asn[2]);
outputHdlcWrite(asn[3]);
outputHdlcWrite(asn[4]);
for (i=0;i<length;i++){
outputHdlcWrite(buffer[i]);
}
outputHdlcClose();
ENABLE_INTERRUPTS();
return E_SUCCESS;
}
owerror_t openserial_printInfoErrorCritical(
char severity,
uint8_t calling_component,
uint8_t error_code,
errorparameter_t arg1,
errorparameter_t arg2
) {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
openserial_vars.outputBufFilled = TRUE;
outputHdlcOpen();
outputHdlcWrite(severity);
outputHdlcWrite(idmanager_getMyID(ADDR_16B)->addr_16b[0]);
outputHdlcWrite(idmanager_getMyID(ADDR_16B)->addr_16b[1]);
outputHdlcWrite(calling_component);
outputHdlcWrite(error_code);
outputHdlcWrite((uint8_t)((arg1 & 0xff00)>>8));
outputHdlcWrite((uint8_t) (arg1 & 0x00ff));
outputHdlcWrite((uint8_t)((arg2 & 0xff00)>>8));
outputHdlcWrite((uint8_t) (arg2 & 0x00ff));
outputHdlcClose();
ENABLE_INTERRUPTS();
return E_SUCCESS;
}
owerror_t idmanager_setMyID(open_addr_t* newID) {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
switch (newID->type) {
case ADDR_16B:
memcpy(&idmanager_vars.my16bID,newID,sizeof(open_addr_t));
break;
case ADDR_64B:
memcpy(&idmanager_vars.my64bID,newID,sizeof(open_addr_t));
break;
case ADDR_PANID:
memcpy(&idmanager_vars.myPANID,newID,sizeof(open_addr_t));
break;
case ADDR_PREFIX:
memcpy(&idmanager_vars.myPrefix,newID,sizeof(open_addr_t));
break;
case ADDR_128B:
//don't set 128b, but rather prefix and 64b
default:
openserial_printCritical(COMPONENT_IDMANAGER,ERR_WRONG_ADDR_TYPE,
(errorparameter_t)newID->type,
(errorparameter_t)1);
ENABLE_INTERRUPTS();
return E_FAIL;
}
ENABLE_INTERRUPTS();
return E_SUCCESS;
}
open_addr_t* idmanager_getMyID(uint8_t type) {
open_addr_t* res;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
switch (type) {
case ADDR_16B:
res= &idmanager_vars.my16bID;
break;
case ADDR_64B:
res= &idmanager_vars.my64bID;
break;
case ADDR_PANID:
res= &idmanager_vars.myPANID;
break;
case ADDR_PREFIX:
res= &idmanager_vars.myPrefix;
break;
case ADDR_128B:
// you don't ask for my full address, rather for prefix, then 64b
default:
openserial_printCritical(COMPONENT_IDMANAGER,ERR_WRONG_ADDR_TYPE,
(errorparameter_t)type,
(errorparameter_t)0);
res= NULL;
break;
}
ENABLE_INTERRUPTS();
return res;
}
void openserial_startInput() {
INTERRUPT_DECLARATION();
if (openserial_vars.inputBufFill>0) {
openserial_printError(COMPONENT_OPENSERIAL,ERR_INPUTBUFFER_LENGTH,
(errorparameter_t)openserial_vars.inputBufFill,
(errorparameter_t)0);
DISABLE_INTERRUPTS();
openserial_vars.inputBufFill=0;
ENABLE_INTERRUPTS();
}
uart_clearTxInterrupts();
uart_clearRxInterrupts(); // clear possible pending interrupts
uart_enableInterrupts(); // Enable USCI_A1 TX & RX interrupt
DISABLE_INTERRUPTS();
openserial_vars.busyReceiving = FALSE;
openserial_vars.mode = MODE_INPUT;
openserial_vars.reqFrameIdx = 0;
#ifdef FASTSIM
uart_writeBufferByLen_FASTSIM(
openserial_vars.reqFrame,
sizeof(openserial_vars.reqFrame)
);
openserial_vars.reqFrameIdx = sizeof(openserial_vars.reqFrame);
#else
uart_writeByte(openserial_vars.reqFrame[openserial_vars.reqFrameIdx]);
#endif
ENABLE_INTERRUPTS();
}
sRITqueue RITQueue_Get_Element(uint8_t pos)
{
sRITqueue elem;
//EnterCriticalSection
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
if (RITQueue_IsEmpty() == false)
{
if ( pos < maxElements)
{
elem = pvObjList[pos];
}
else
{
elem.frameType = 0;
RITQueue_ClearAddress(&elem.destaddr);
}
}
else
{
elem.frameType = 0;
RITQueue_ClearAddress(&elem.destaddr);
}
//LeaveCriticalSection
ENABLE_INTERRUPTS();
return elem;
}
bool RITQueue_Free(uint8_t elementpos)
{
bool ret = false;
uint8_t i;
//EnterCriticalSection
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
if (elementpos < maxElements)
{
RITQueue_ClearAddress(&pvObjList[elementpos].destaddr);
pvObjList[elementpos].timestamp = 0;
pvObjList[elementpos].msglength = 0;
pvObjList[elementpos].frameType = 0;
pvObjList[elementpos].pending = 0;
pvObjList[elementpos].numTargetParents = 0;
pvObjList[elementpos].countretry = 0;
pvObjList[elementpos].lasttxduration = 0;
pvObjList[elementpos].isBroadcastMulticast = 0;
if (numAvailableElements > 0)
numAvailableElements--;
ret = true;
}
//LeaveCriticalSection
ENABLE_INTERRUPTS();
return ret;
}
uint16_t output_buffer_index_write_increment() {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
openserial_vars.output_buffer_index_write=(openserial_vars.output_buffer_index_write+1)%SERIAL_OUTPUT_BUFFER_SIZE;
ENABLE_INTERRUPTS();
return openserial_vars.output_buffer_index_write;
}
void schedule_advanceSlot() {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
// advance to next active slot
schedule_vars.currentScheduleEntry = schedule_vars.currentScheduleEntry->next;
ENABLE_INTERRUPTS();
}
error_t openserial_printError(uint8_t calling_component, uint8_t error_code,
errorparameter_t arg1,
errorparameter_t arg2) {
leds_error_toggle();
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
openserial_vars.somethingInOutputBuffer=TRUE;
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'^'; //preamble
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'^';
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'^';
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'E'; //this is an error
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)((idmanager_getMyID(ADDR_16B))->addr_16b[1]);
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)((idmanager_getMyID(ADDR_16B))->addr_16b[0]);
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)calling_component; //component generating error
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)error_code; //error_code
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)((arg1 & 0xff00)>>8); //arg1
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t) (arg1 & 0x00ff);
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)((arg2 & 0xff00)>>8); //arg2
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t) (arg2 & 0x00ff);
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'$'; //postamble
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'$';
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'$';
ENABLE_INTERRUPTS();
return E_SUCCESS;
}
error_t openserial_printData(uint8_t* buffer, uint8_t length) {
uint8_t counter;
uint8_t asn[5];
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
openserial_vars.somethingInOutputBuffer=TRUE;
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'^'; //preamble
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'^';
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'^';
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'D'; //this is data
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)((idmanager_getMyID(ADDR_16B))->addr_16b[1]);
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)((idmanager_getMyID(ADDR_16B))->addr_16b[0]);
//asn to serial ..
asnWriteToSerial(asn);// byte01,byte23,byte4
openserial_vars.output_buffer[output_buffer_index_write_increment()]=asn[0];
openserial_vars.output_buffer[output_buffer_index_write_increment()]=asn[1];
openserial_vars.output_buffer[output_buffer_index_write_increment()]=asn[2];
openserial_vars.output_buffer[output_buffer_index_write_increment()]=asn[3];
openserial_vars.output_buffer[output_buffer_index_write_increment()]=asn[4];
for (counter=0; counter<length; counter++) {
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)buffer[counter];
}
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'$'; //postamble
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'$';
openserial_vars.output_buffer[output_buffer_index_write_increment()]=(uint8_t)'$';
ENABLE_INTERRUPTS();
return E_SUCCESS;
}
void idmanager_setIsDAGroot(bool newRole) {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
idmanager_vars.isDAGroot = newRole;
neighbors_updateMyDAGrankAndNeighborPreference();
ENABLE_INTERRUPTS();
}
/**
\brief Check whether I can send on this slot.
This function is called at the beginning of every TX slot.
If the slot is *not* a shared slot, it always return TRUE.
If the slot is a shared slot, it decrements the backoff counter and returns
TRUE only if it hits 0.
Note that the backoff counter is global, not per slot.
\returns TRUE if it is OK to send on this slot, FALSE otherwise.
*/
bool schedule_getOkToSend() {
bool returnVal;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
if (schedule_vars.currentScheduleEntry->shared==FALSE) {
// non-shared slot: backoff does not apply
returnVal = TRUE;
} else {
// non-shared slot: check backoff before answering
// decrement backoff
if (schedule_vars.backoff>0) {
schedule_vars.backoff--;
}
// only return TRUE if backoff hit 0
if (schedule_vars.backoff==0) {
returnVal = TRUE;
} else {
returnVal = FALSE;
}
}
ENABLE_INTERRUPTS();
return returnVal;
}
uint8_t openserial_getInputBuffer(uint8_t* bufferToWrite, uint8_t maxNumBytes) {
uint8_t numBytesWritten;
uint8_t inputBufFillLevel;
INTERRUPT_DECLARATION();
//<<<<<<<<<<<<<<<<<<<<<<<
DISABLE_INTERRUPTS();
inputBufFillLevel = openserial_vars.inputBufFillLevel;
ENABLE_INTERRUPTS();
//>>>>>>>>>>>>>>>>>>>>>>>
if (maxNumBytes<inputBufFillLevel-1) {
openserial_printError(
COMPONENT_OPENSERIAL,
ERR_GETDATA_ASKS_TOO_FEW_BYTES,
(errorparameter_t)maxNumBytes,
(errorparameter_t)inputBufFillLevel-1
);
numBytesWritten = 0;
} else {
numBytesWritten = inputBufFillLevel-1;
//<<<<<<<<<<<<<<<<<<<<<<<
DISABLE_INTERRUPTS();
memcpy(bufferToWrite,&(openserial_vars.inputBuf[1]),numBytesWritten);
ENABLE_INTERRUPTS();
//>>>>>>>>>>>>>>>>>>>>>>>
}
return numBytesWritten;
}
void idmanager_setIsBridge(bool newRole) {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
idmanager_vars.isBridge = newRole;
ENABLE_INTERRUPTS();
}
bool idmanager_getIsBridge() {
bool res;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
res=idmanager_vars.isBridge;
ENABLE_INTERRUPTS();
return res;
}
void schedule_syncSlotOffset(slotOffset_t targetSlotOffset) {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
while (schedule_vars.currentScheduleEntry->slotOffset!=targetSlotOffset) {
schedule_advanceSlot();
}
ENABLE_INTERRUPTS();
}
// this is the elapsed time in this period (now - previous val)
PORT_TIMER_WIDTH radiotimer_getValue() {
PORT_TIMER_WIDTH x;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
x= sctimer_getValue()-abstimer_vars.radiotimer_overflow_previousVal;
ENABLE_INTERRUPTS();
return x;
}
/**
\brief Get the channel offset of the current schedule entry.
\returns The channel offset of the current schedule entry.
*/
channelOffset_t schedule_getChannelOffset() {
channelOffset_t res;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
res= schedule_vars.currentScheduleEntry->channelOffset;
ENABLE_INTERRUPTS();
return res;
}
/**
\brief Get the type of the current schedule entry.
\returns The type of the current schedule entry.
*/
cellType_t schedule_getType() {
cellType_t res;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
res= schedule_vars.currentScheduleEntry->type;
ENABLE_INTERRUPTS();
return res;
}
bool idmanager_getIsDAGroot() {
bool res;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
res=idmanager_vars.isDAGroot;
ENABLE_INTERRUPTS();
return res;
}
void radiotimer_cancel() {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
abstimer_vars.isArmed[ABSTIMER_SRC_RADIOTIMER_COMPARE] = FALSE;
abstimer_reschedule();
ENABLE_INTERRUPTS();
}
uint16_t output_buffer_index_read_increment() {
uint16_t temp_openserial_output_buffer_index_read=0;
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
openserial_vars.output_buffer_index_read=(openserial_vars.output_buffer_index_read+1)%SERIAL_OUTPUT_BUFFER_SIZE;
temp_openserial_output_buffer_index_read = openserial_vars.output_buffer_index_read;
ENABLE_INTERRUPTS();
return temp_openserial_output_buffer_index_read;
}
/**
\brief Indicate the reception of a packet.
*/
void schedule_indicateRx(asn_t* asnTimestamp) {
INTERRUPT_DECLARATION();
DISABLE_INTERRUPTS();
// increment usage statistics
schedule_vars.currentScheduleEntry->numRx++;
// update last used timestamp
memcpy(&(schedule_vars.currentScheduleEntry->lastUsedAsn), asnTimestamp, sizeof(asn_t));
ENABLE_INTERRUPTS();
}
