/** * @brief Initializes the CEC mode according to the specified * parameters in the CEC_InitTypeDef and creates the associated handle . * @param hcec: CEC handle * @retval HAL status */ HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec) { /* Check the CEC handle allocation */ if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL)) { return HAL_ERROR; } /* Check the parameters */ assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); assert_param(IS_CEC_BIT_TIMING_ERROR_MODE(hcec->Init.TimingErrorFree)); assert_param(IS_CEC_BIT_PERIOD_ERROR_MODE(hcec->Init.PeriodErrorFree)); assert_param(IS_CEC_ADDRESS(hcec->Init.OwnAddress)); if(hcec->gState == HAL_CEC_STATE_RESET) { /* Allocate lock resource and initialize it */ hcec->Lock = HAL_UNLOCKED; /* Init the low level hardware : GPIO, CLOCK */ HAL_CEC_MspInit(hcec); } hcec->gState = HAL_CEC_STATE_BUSY; /* Disable the Peripheral */ __HAL_CEC_DISABLE(hcec); /* Write to CEC Control Register */ MODIFY_REG(hcec->Instance->CFGR, CEC_CFGR_FIELDS, hcec->Init.TimingErrorFree | hcec->Init.PeriodErrorFree); /* Write to CEC Own Address Register */ MODIFY_REG(hcec->Instance->OAR, CEC_OAR_OA, hcec->Init.OwnAddress); /* Configure the prescaler to generate the required 50 microseconds time base.*/ MODIFY_REG(hcec->Instance->PRES, CEC_PRES_PRES, 50U * (HAL_RCC_GetPCLK1Freq()/1000000U) - 1U); /* Enable the following CEC Interrupt */ __HAL_CEC_ENABLE_IT(hcec, CEC_IT_IE); /* Enable the CEC Peripheral */ __HAL_CEC_ENABLE(hcec); hcec->ErrorCode = HAL_CEC_ERROR_NONE; hcec->gState = HAL_CEC_STATE_READY; hcec->RxState = HAL_CEC_STATE_READY; return HAL_OK; }
/** * @brief Initializes the CEC peripheral according to the specified * parameters in the CEC_InitStruct. * @param CEC_InitStruct: pointer to an CEC_InitTypeDef structure that * contains the configuration information for the specified * CEC peripheral. * @retval None */ void CEC_Init(CEC_InitTypeDef* CEC_InitStruct) { uint16_t tmpreg = 0; /* Check the parameters */ assert_param(IS_CEC_BIT_TIMING_ERROR_MODE(CEC_InitStruct->CEC_BitTimingMode)); assert_param(IS_CEC_BIT_PERIOD_ERROR_MODE(CEC_InitStruct->CEC_BitPeriodMode)); /*---------------------------- CEC CFGR Configuration -----------------*/ /* Get the CEC CFGR value */ tmpreg = CEC->CFGR; /* Clear BTEM and BPEM bits */ tmpreg &= CFGR_CLEAR_Mask; /* Configure CEC: Bit Timing Error and Bit Period Error */ tmpreg |= (uint16_t)(CEC_InitStruct->CEC_BitTimingMode | CEC_InitStruct->CEC_BitPeriodMode); /* Write to CEC CFGR register*/ CEC->CFGR = tmpreg; }