static void parse_general_features(struct drm_i915_private *dev_priv, struct bdb_header *bdb) { struct drm_device *dev = dev_priv->dev; struct bdb_general_features *general; general = find_section(bdb, BDB_GENERAL_FEATURES); if (general) { dev_priv->int_tv_support = general->int_tv_support; dev_priv->int_crt_support = general->int_crt_support; dev_priv->lvds_use_ssc = general->enable_ssc; if (IS_I85X(dev)) dev_priv->lvds_ssc_freq = general->ssc_freq ? 66 : 48; else if (IS_GEN5(dev) || IS_GEN6(dev)) dev_priv->lvds_ssc_freq = general->ssc_freq ? 100 : 120; else dev_priv->lvds_ssc_freq = general->ssc_freq ? 100 : 96; } }
static unsigned long i915_stolen_to_physical(struct drm_i915_private *dev_priv) { struct pci_dev *pdev = dev_priv->drm.pdev; struct i915_ggtt *ggtt = &dev_priv->ggtt; struct resource *r; u32 base; /* Almost universally we can find the Graphics Base of Stolen Memory * at register BSM (0x5c) in the igfx configuration space. On a few * (desktop) machines this is also mirrored in the bridge device at * different locations, or in the MCHBAR. * * On 865 we just check the TOUD register. * * On 830/845/85x the stolen memory base isn't available in any * register. We need to calculate it as TOM-TSEG_SIZE-stolen_size. * */ base = 0; if (INTEL_GEN(dev_priv) >= 3) { u32 bsm; pci_read_config_dword(pdev, INTEL_BSM, &bsm); base = bsm & INTEL_BSM_MASK; } else if (IS_I865G(dev_priv)) { u32 tseg_size = 0; u16 toud = 0; u8 tmp; pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0), I845_ESMRAMC, &tmp); if (tmp & TSEG_ENABLE) { switch (tmp & I845_TSEG_SIZE_MASK) { case I845_TSEG_SIZE_512K: tseg_size = KB(512); break; case I845_TSEG_SIZE_1M: tseg_size = MB(1); break; } } pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), I865_TOUD, &toud); base = (toud << 16) + tseg_size; } else if (IS_I85X(dev_priv)) { u32 tseg_size = 0; u32 tom; u8 tmp; pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0), I85X_ESMRAMC, &tmp); if (tmp & TSEG_ENABLE) tseg_size = MB(1); pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 1), I85X_DRB3, &tmp); tom = tmp * MB(32); base = tom - tseg_size - ggtt->stolen_size; } else if (IS_845G(dev_priv)) { u32 tseg_size = 0; u32 tom; u8 tmp; pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0), I845_ESMRAMC, &tmp); if (tmp & TSEG_ENABLE) { switch (tmp & I845_TSEG_SIZE_MASK) { case I845_TSEG_SIZE_512K: tseg_size = KB(512); break; case I845_TSEG_SIZE_1M: tseg_size = MB(1); break; } } pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0), I830_DRB3, &tmp); tom = tmp * MB(32); base = tom - tseg_size - ggtt->stolen_size; } else if (IS_I830(dev_priv)) { u32 tseg_size = 0; u32 tom; u8 tmp; pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0), I830_ESMRAMC, &tmp); if (tmp & TSEG_ENABLE) { if (tmp & I830_TSEG_SIZE_1M) tseg_size = MB(1); else tseg_size = KB(512); } pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0), I830_DRB3, &tmp); tom = tmp * MB(32); base = tom - tseg_size - ggtt->stolen_size; } if (base == 0) return 0; /* make sure we don't clobber the GTT if it's within stolen memory */ if (INTEL_GEN(dev_priv) <= 4 && !IS_G33(dev_priv) && !IS_G4X(dev_priv)) { struct { u32 start, end; } stolen[2] = { { .start = base, .end = base + ggtt->stolen_size, }, { .start = base, .end = base + ggtt->stolen_size, }, };
static unsigned long i915_stolen_to_physical(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; u32 base; /* Almost universally we can find the Graphics Base of Stolen Memory * at offset 0x5c in the igfx configuration space. On a few (desktop) * machines this is also mirrored in the bridge device at different * locations, or in the MCHBAR. * * On 865 we just check the TOUD register. * * On 830/845/85x the stolen memory base isn't available in any * register. We need to calculate it as TOM-TSEG_SIZE-stolen_size. * */ base = 0; if (INTEL_INFO(dev)->gen >= 3) { /* Read Graphics Base of Stolen Memory directly */ pci_read_config_dword(dev->pdev, 0x5c, &base); base &= ~((1<<20) - 1); #if 0 } else if (IS_I865G(dev)) { u16 toud = 0; /* * FIXME is the graphics stolen memory region * always at TOUD? Ie. is it always the last * one to be allocated by the BIOS? */ pci_bus_read_config_word(dev->pdev->bus, PCI_DEVFN(0, 0), I865_TOUD, &toud); base = toud << 16; } else if (IS_I85X(dev)) { u32 tseg_size = 0; u32 tom; u8 tmp; pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0), I85X_ESMRAMC, &tmp); if (tmp & TSEG_ENABLE) tseg_size = MB(1); pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 1), I85X_DRB3, &tmp); tom = tmp * MB(32); base = tom - tseg_size - dev_priv->gtt.stolen_size; } else if (IS_845G(dev)) { u32 tseg_size = 0; u32 tom; u8 tmp; pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0), I845_ESMRAMC, &tmp); if (tmp & TSEG_ENABLE) { switch (tmp & I845_TSEG_SIZE_MASK) { case I845_TSEG_SIZE_512K: tseg_size = KB(512); break; case I845_TSEG_SIZE_1M: tseg_size = MB(1); break; } } pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0), I830_DRB3, &tmp); tom = tmp * MB(32); base = tom - tseg_size - dev_priv->gtt.stolen_size; } else if (IS_I830(dev)) { u32 tseg_size = 0; u32 tom; u8 tmp; pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0), I830_ESMRAMC, &tmp); if (tmp & TSEG_ENABLE) { if (tmp & I830_TSEG_SIZE_1M) tseg_size = MB(1); else tseg_size = KB(512); } pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0), I830_DRB3, &tmp); tom = tmp * MB(32); base = tom - tseg_size - dev_priv->gtt.stolen_size; #endif } if (base == 0) return 0; /* make sure we don't clobber the GTT if it's within stolen memory */ if (INTEL_INFO(dev)->gen <= 4 && !IS_G33(dev) && !IS_G4X(dev)) { struct { u32 start, end; } stolen[2] = { { .start = base, .end = base + dev_priv->gtt.stolen_size, }, { .start = base, .end = base + dev_priv->gtt.stolen_size, }, };