/** * @brief Configures the main internal regulator output voltage. * @param VoltageScaling: specifies the regulator output voltage to achieve * a tradeoff between performance and power consumption. * This parameter can be one of the following values: * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode, * the maximum value of fHCLK is 168 MHz. It can be extended to * 180 MHz by activating the over-drive mode. * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode, * the maximum value of fHCLK is 144 MHz. It can be extended to, * 168 MHz by activating the over-drive mode. * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 3 mode, * the maximum value of fHCLK is 120 MHz. * @note To update the system clock frequency(SYSCLK): * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig(). * - Call the HAL_RCC_OscConfig() to configure the PLL. * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale. * - Set the new system clock frequency using the HAL_RCC_ClockConfig(). * @note The scale can be modified only when the HSI or HSE clock source is selected * as system clock source, otherwise the API returns HAL_ERROR. * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits * value in the PWR_CR1 register are not taken in account. * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 1 or 2. * @note The new voltage scale is active only when the PLL is ON. * @retval HAL Status */ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) { uint32_t tickstart = 0U; assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); /* Enable PWR RCC Clock Peripheral */ __HAL_RCC_PWR_CLK_ENABLE(); /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) { /* Disable the main PLL */ __HAL_RCC_PLL_DISABLE(); /* Get Start Tick */ tickstart = HAL_GetTick(); /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) { return HAL_TIMEOUT; } } /* Set Range */ __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling); /* Enable the main PLL */ __HAL_RCC_PLL_ENABLE(); /* Get Start Tick */ tickstart = HAL_GetTick(); /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) { return HAL_TIMEOUT; } } /* Get Start Tick */ tickstart = HAL_GetTick(); while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET)) { if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE) { return HAL_TIMEOUT; } } } else { return HAL_ERROR; } return HAL_OK; }
/** * @brief Configures the voltage scaling range. * @note During voltage scaling configuration, the system clock is stopped * until the regulator is stabilized (VOSF = 0). This must be taken * into account during application developement, in case a critical * reaction time to interrupt is needed, and depending on peripheral * used (timer, communication,...). * * @param PWR_VoltageScaling: specifies the voltage scaling range. * This parameter can be: * @arg PWR_VoltageScaling_Range1: Voltage Scaling Range 1 (VCORE = 1.8V). * @arg PWR_VoltageScaling_Range2: Voltage Scaling Range 2 (VCORE = 1.5V). * @arg PWR_VoltageScaling_Range3: Voltage Scaling Range 3 (VCORE = 1.2V) * @retval None */ void PWR_VoltageScalingConfig(uint32_t PWR_VoltageScaling) { uint32_t tmp = 0; /* Check the parameters */ assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(PWR_VoltageScaling)); tmp = PWR->CR; tmp &= CR_VOS_MASK; tmp |= PWR_VoltageScaling; PWR->CR = tmp & 0xFFFFFFF3; }
/** * @brief Configure the main internal regulator output voltage. * @param VoltageScaling: specifies the regulator output voltage to achieve * a tradeoff between performance and power consumption. * This parameter can be one of the following values: * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode, * typical output voltage at 1.2 V, * system frequency up to 80 MHz. * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode, * typical output voltage at 1.0 V, * system frequency up to 26 MHz. * @note When moving from Range 1 to Range 2, the system frequency must be decreased to * a value below 26 MHz before calling HAL_PWREx_ControlVoltageScaling() API. * When moving from Range 2 to Range 1, the system frequency can be increased to * a value up to 80 MHz after calling HAL_PWREx_ControlVoltageScaling() API. * @note When moving from Range 2 to Range 1, the API waits for VOSF flag to be * cleared before returning the status. If the flag is not cleared within * 50 microseconds, HAL_TIMEOUT status is reported. * @retval HAL Status */ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) { uint32_t wait_loop_index = 0; assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); /* If Set Range 1 */ if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) { if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE1) { /* Set Range 1 */ MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); /* Wait until VOSF is cleared */ wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000)); while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))) { wait_loop_index--; } if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) { return HAL_TIMEOUT; } } } else { if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE2) { /* Set Range 2 */ MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2); /* No need to wait for VOSF to be cleared for this transition */ } } return HAL_OK; }
/** * @brief Configures the main internal regulator output voltage. * @param VoltageScaling: specifies the regulator output voltage to achieve * a tradeoff between performance and power consumption. * This parameter can be one of the following values: * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode, * the maximum value of fHCLK = 168 MHz. * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode, * the maximum value of fHCLK = 144 MHz. * @note When moving from Range 1 to Range 2, the system frequency must be decreased to * a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API. * When moving from Range 2 to Range 1, the system frequency can be increased to * a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API. * @retval HAL Status */ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) { uint32_t tickstart = 0U; assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); /* Enable PWR RCC Clock Peripheral */ __HAL_RCC_PWR_CLK_ENABLE(); /* Set Range */ __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling); /* Get Start Tick*/ tickstart = HAL_GetTick(); while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET)) { if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE) { return HAL_TIMEOUT; } } return HAL_OK; }