void usart_setup(const usart_dev *dev, uint32_t baudRate, uint16_t wordLength,
uint16_t stopBits, uint16_t parity, uint16_t mode, uint16_t hardwareFlowControl)
{
/* Check the parameters */
assert_param(IS_USART_ALL_PERIPH(dev->USARTx));
assert_param(IS_USART_BAUDRATE(baud));
assert_param(IS_USART_STOPBITS(stopbits));
assert_param(IS_USART_PARITY(parity));
assert_param(IS_USART_WORD_LENGTH(wordLength));
assert_param(IS_USART_MODE(mode));
assert_param(IS_USART_HARDWARE_FLOW_CONTROL(hardwareFlowControl));
memset(dev->state, 0, sizeof(*dev->state));
dev->state->txbusy = 0;
dev->state->callback = 0;
/* Disable USARTx */
usart_disable(dev);
rb_init(dev->txrb, USART_TX_BUF_SIZE, dev->state->tx_buf);
rb_init(dev->rxrb, USART_RX_BUF_SIZE, dev->state->rx_buf);
/* Enables the USART's 8x oversampling mode. */
USART_OverSampling8Cmd(dev->USARTx, ENABLE);
USART_ClockInitTypeDef USART_InitClock;
USART_ClockStructInit(&USART_InitClock);
USART_ClockInit(dev->USARTx, &USART_InitClock);
USART_InitTypeDef USART_config;
USART_StructInit(&USART_config);
USART_config.USART_BaudRate = baudRate;
USART_config.USART_WordLength = wordLength;
USART_config.USART_StopBits = stopBits;
USART_config.USART_Parity = parity;
USART_config.USART_Mode = mode;
USART_config.USART_HardwareFlowControl = hardwareFlowControl;
USART_Init(dev->USARTx, &USART_config);
dev->USARTx->CR1 &= ~(USART_MASK_IDLEIE | USART_MASK_RXNEIE | USART_MASK_TCEIE | USART_MASK_TXEIE | USART_MASK_PEIE);
dev->USARTx->CR2 &= ~(USART_MASK2_LBDIE);
dev->USARTx->CR3 &= ~(USART_MASK3_CTSIE | USART_MASK3_EIE);
if(mode & USART_Mode_Rx) { /* Enable Rx request */
USART_ClearFlag(dev->USARTx, USART_FLAG_RXNE);
dev->USARTx->CR1 |= USART_MASK_RXNEIE;
}
if(mode & USART_Mode_Tx) {
USART_ClearFlag(dev->USARTx, USART_FLAG_TC);
}
enable_nvic_irq(dev->irq, UART_INT_PRIORITY);
}
void usart_setup(usart_dev *dev, uint32_t baudRate, uint16_t wordLength,
uint16_t stopBits, uint16_t parity, uint16_t mode,
uint16_t hardwareFlowControl, uint32_t tx_timeout)
{
/* Check the parameters */
assert_param(IS_USART_ALL_PERIPH(dev->USARTx));
assert_param(IS_USART_BAUDRATE(baud));
assert_param(IS_USART_STOPBITS(stopbits));
assert_param(IS_USART_PARITY(parity));
assert_param(IS_USART_WORD_LENGTH(wordLength));
assert_param(IS_USART_MODE(mode));
assert_param(IS_USART_HARDWARE_FLOW_CONTROL(hardwareFlowControl));
dev->tx_timeout = tx_timeout;
dev->txbusy = 0;
dev->usetxrb = 1;
dev->use_timeout = 0;
/* Disable USARTx */
USART_Cmd(dev->USARTx, DISABLE);
/* Enables the USART's 8x oversampling mode. */
USART_OverSampling8Cmd(dev->USARTx, ENABLE);
USART_ClockInitTypeDef USART_InitClock;
USART_ClockStructInit(&USART_InitClock);
USART_ClockInit(dev->USARTx, &USART_InitClock);
USART_InitTypeDef USART_config;
USART_StructInit(&USART_config);
USART_config.USART_BaudRate = baudRate;
USART_config.USART_WordLength = wordLength;
USART_config.USART_StopBits = stopBits;
USART_config.USART_Parity = parity;
USART_config.USART_Mode = mode;
USART_config.USART_HardwareFlowControl = hardwareFlowControl;
USART_Init(dev->USARTx, &USART_config);
NVIC_InitTypeDef NVIC_InitStructure;
/* Configure the NVIC Preemption Priority Bits */
//NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
/* Enable the USART Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = dev->irq;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
USART_ITConfig(dev->USARTx, USART_IT_PE, DISABLE);
USART_ITConfig(dev->USARTx, USART_IT_IDLE, DISABLE);
USART_ITConfig(dev->USARTx, USART_IT_LBD, DISABLE);
if (IS_USART_1236_PERIPH(dev->USARTx))
USART_ITConfig(dev->USARTx, USART_IT_CTS, DISABLE);
USART_ITConfig(dev->USARTx, USART_IT_ERR, DISABLE);
/* Enable USART2 Rx request */
USART_ITConfig(dev->USARTx, USART_IT_RXNE, ENABLE);
USART_ClearFlag(dev->USARTx, USART_FLAG_RXNE);
USART_ITConfig(dev->USARTx, USART_IT_TC, DISABLE);
USART_ITConfig(dev->USARTx, USART_IT_TXE, ENABLE);
USART_ClearFlag(dev->USARTx, USART_FLAG_TC);
/*
USART_ITConfig(dev->USARTx, USART_IT_RXNE, ENABLE);
USART_ITConfig(dev->USARTx, USART_IT_PE, ENABLE);
USART_ITConfig(dev->USARTx, USART_IT_ERR, ENABLE);
*/
}