void IOPMaster(UNSIGNED argc, VOID *argv) { STATUS status; int ch = 0; int i; unsigned long pci_id; /* Access argc and argv just to avoid compilation warnings. */ status = (STATUS) argc + (STATUS) argv; printf("\n\r"); printf("Executing the System Code....\n\r"); /* Initilaize the Hardware */ #ifdef INCLUDE_ODYSSEY if ((status = Init_Hardware()) != NU_SUCCESS) printf("Error in init %d\r\n", status); #else init_galileo(); #endif INCLUDE_ODYSSEY /* Spawn the rest of the tasks and initialize */ Init_System(&System_Memory); /* Lower the Priority of this task */ NU_Change_Priority( (NU_TASK *)&IOPMaster_Task, 250 ); /* Now this task will be active with lowest priority and can be used to * any cleanup required */ for(;;){ NU_Sleep(500); Cleanup_System(); /* rlw: can we implement erc91 functionality here? */ } }
void StartTask(UNSIGNED , VOID *) { Status status = Init_Hardware(); TraceLevel[TRACE_SSD] = TRACE_L3; #if 0 // All levels set to 0 by default TraceLevel[TRACE_SSD1] = TRACE_L3; //TraceLevel[TRACE_MESSENGER1] = TRACE_L2; //TraceLevel[TRACE_DDM_MGR] = TRACE_L2; //TraceLevel[TRACE_DDM] = TRACE_L2; //TraceLevel[TRACE_HEAP1] = TRACE_L1; //TraceLevel[TRACE_PTS] = TRACE_ALL_LVL; #endif // start the OS Oos::Initialize(); } // StartTask
void Core::InitHardware() { Init_Hardware(); std::cout << "Core: hardware initialization:\n"; Buttons = new GButton*[9]; Leds = new GLed*[2]; for (int i = 0; i < 9; i++) { Buttons[i] = new GButton(ButtonPins[i], true); } for (int i = 0; i < 2; i++) { Leds[i] = new GLed(LedPins[i], false); } SetIndicatorLed(Leds[1]); std::cout<<"Core: hardware inited\n"; //start thread hardwareThread = new thread(Update_Hardware); std::cout<<"Core: hardware thread started\n"; }
//------------------------------------------------------ // MAIN //------------------------------------------------------ int main(void) { // Инициализация Init_Hardware(); NVIC_SetPriority(PendSV_IRQn, 0xff); NVIC_SetPriority(SysTick_IRQn, 0xff); uint8_t current_min_priority = 0; uint8_t current_priority = 0; eTask_Create(&eTask_Element[0], Thread_A, &stack_a[63], 64, &vA); eTask_Create(&eTask_Element[1], Thread_B, &stack_b[63], 64, &vB); eStart_Schedule(); while(1) { } return 0; }
void main(void) { Init_Hardware(); g_iTimer=0; while(1) Test_SL030(); }
extern "C" void *MSL_Initialize(void *first_available_memory) { #ifdef _ODYSSEY Init_Hardware(); Init_Address(); // The system heap must be initialized first, before any other static initializers. // Build a list of reserved memory. int nReserved=3 + (gSizeReserved? 1 :0); // Pci slave memory is reserved aPaRes[0] = memmaps.paSlave; aCbRes[0] = memmaps.cbSlave; // 1MB from zero belongs to boot rom aPaRes[1]=0; aCbRes[1]=0x00100000; // Operating system code aPaRes[2]=PA_P(_ftext); aCbRes[2]=((char*)first_available_memory - _ftext); // Any reserved memory if (gSizeReserved) { aPaRes[3]=PA_P(first_available_memory); aCbRes[3]=gSizeReserved; } // Copy memmap fragment list to static array so there is room to expand. bcopy(&memmaps.aPa[0], &aPa[1], memmaps.nFragment * sizeof(aPa[0])); bcopy(&memmaps.aCb[0], &aCb[1], memmaps.nFragment * sizeof(aCb[0])); // Pci slave memory is 1st fragment. aPa[0]=memmaps.paSlave; aCb[0]=memmaps.cbSlave; OsHeap_Initialize(memmaps.nFragment+1, aPa, aCb, nReserved, aPaRes, aCbRes, ((bootblock.b_cbHeap && bootblock.b_cbHeap != 0xDEADDEAD)? bootblock.b_cbHeap : gSize_small_heap)); #else // eval // Pci slave memory is 1st fragment. aPa[0]=PA_P((U32)first_available_memory + gSizeReserved); aCb[0]=gSize_small_heap * 3; // Available memory is 2nd fragment aPa[1]=aPa[0] + aCb[0]; aCb[1]=gSize_total_memory - aPa[1]; // Build a list of reserved memory. int nReserved=3 + (gSizeReserved? 1 :0); // Pci slave memory is reserved aPaRes[0] = aPa[0]; aCbRes[0] = aCb[0]; // 1MB from zero belongs to boot rom aPaRes[1]=0; aCbRes[1]=0x00100000; // Operating system code aPaRes[2]=PA_P(_ftext); aCbRes[2]=((char*)first_available_memory - _ftext); // Any reserved memory if (gSizeReserved) { aPaRes[3]=PA_P(first_available_memory); aCbRes[3]=gSizeReserved; } OsHeap_Initialize(2, aPa, aCb, nReserved, aPaRes, aCbRes, gSize_small_heap); #endif __call_static_initializers(__static_init); // Some memory left over for debugging. return first_available_memory; }
void IOPMaster(UNSIGNED argc, VOID *argv) { STATUS status; int ch = 0; int i; unsigned long pci_id; /* Access argc and argv just to avoid compilation warnings. */ status = (STATUS) argc + (STATUS) argv; printf("\n\r"); printf("Executing the System Code....\n\r"); /* Initilaize the Hardware */ #ifdef INCLUDE_ODYSSEY #if 0 if ((status = Init_Hardware()) != NU_SUCCESS) printf("Error in init %d\r\n", status); gt_init(); gt_initdma(0); gt_initdma(1); board_type = memmaps.aBoardType[getSlotNumber()]; init_buf(get_slotno()); #else init_galileo(); /* enable the Switches */ *((U8 *)(0xBC0F8000)) = 0; a_id = b_id = c_id = d_id = e_id = f_id = h_id = 0; /* Init the E bridge */ printf("Initializing the Bridge E...."); pci_id = get_pci_id(0, BRIDGE_21154_ID, 0); if ( pci_id ) { bridge_init(pci_id, PCI_G_NUM, PCI_E_NUM, PCI_E_SUB, 0xFFFFFFFF, 0); printf("OK\n\r"); e_id = pci_id; } else { printf("Fail\n\r"); goto done; } /* Init the F bridge */ printf("Initializing the Bridge F...."); pci_id = get_pci_id(0, BRIDGE_21154_ID, 1); if ( pci_id ) { bridge_init(pci_id, PCI_G_NUM, PCI_F_NUM, PCI_F_SUB, 0xFFFFFFFF, 0); printf("OK\n\r"); f_id = pci_id; } else { printf("Fail\n\r"); goto done; } /* Init the H bridge */ printf("Initializing the Bridge H...."); pci_id = get_pci_id(PCI_F_NUM, BRIDGE_21154_ID, 0); if ( pci_id ) { bridge_init(pci_id, PCI_F_NUM, PCI_H_NUM, PCI_H_SUB, 0xFFFFFFFF, 0); printf("OK\n\r"); h_id = pci_id; } else { printf("Fail\n\r"); goto done; } /* Init the C bridge */ printf("Initializing the Bridge C...."); pci_id = get_pci_id(PCI_F_NUM, BRIDGE_21154_ID, 1); if ( pci_id ) { bridge_init(pci_id, PCI_F_NUM, PCI_C_NUM, PCI_C_SUB, 0xFFFFFFFF, 0); printf("OK\n\r"); c_id = pci_id; } else { printf("Fail\n\r"); goto done; } /* Init the D bridge */ printf("Initializing the Bridge D...."); pci_id = get_pci_id(PCI_F_NUM, BRIDGE_21154_ID, 2); if ( pci_id ) { bridge_init(pci_id, PCI_F_NUM, PCI_D_NUM, PCI_D_SUB, 0xFFFFFFFF, 0); printf("OK\n\r"); d_id = pci_id; } else { printf("Fail\n\r"); goto done; } /* Init the A bridge */ printf("Initializing the Bridge A...."); pci_id = get_pci_id(PCI_H_NUM, BRIDGE_21154_ID, 0); if ( pci_id ) { bridge_init(pci_id, PCI_H_NUM, PCI_A_NUM, PCI_A_SUB, 0xFFFFFFFF, 0); printf("OK\n\r"); a_id = pci_id; } else { printf("Fail\n\r"); goto done; } /* Init the B bridge */ printf("Initializing the Bridge B...."); pci_id = get_pci_id(PCI_H_NUM, BRIDGE_21154_ID, 1); if ( pci_id ) { bridge_init(pci_id, PCI_H_NUM, PCI_B_NUM, PCI_B_SUB, 0xFFFFFFFF, 0); printf("OK\n\r"); b_id = pci_id; } else { printf("Fail\n\r"); goto done; } #endif #else init_galileo(); #endif INCLUDE_ODYSSEY done: /* Spawn the rest of the tasks and initialize */ Init_System(&System_Memory); /* Lower the Priority of this task */ NU_Change_Priority( (NU_TASK *)&IOPMaster_Task, 250 ); /* Now this task will be active with lowest priority and can be used to * any cleanup required */ for(;;){ NU_Sleep(500); Cleanup_System(); /* rlw: can we implement erc91 functionality here? */ } }