static bool udd_ctrl_interrupt(void) { if (!Is_udd_endpoint_interrupt(0)) return false; // No interrupt events on control endpoint // Search event on control endpoint if (Is_udd_setup_received(0)) { // SETUP packet received udd_ctrl_setup_received(); return true; } if (Is_udd_in_sent(0)) { // IN packet sent udd_ctrl_in_sent(); return true; } if (Is_udd_bank0_received(0)) { // OUT packet received udd_ctrl_out_received(); return true; } if (Is_udd_stall(0)) { // STALLed udd_ack_stall(0); return true; } return false; }
//! \brief Waits a SETUP packet and load data in main_setup_packet[] static void main_usb_wait_setup_packet(void) { while (!Is_udd_setup_received(0)); // SETUP packet received Assert(8 == udd_byte_count(0)); uint8_t *ptr = (uint8_t *) & udd_get_endpoint_fifo_access(0,8); for (uint8_t i = 0; i < 8; i++) { ((uint8_t*) &main_setup_packet)[i] = *ptr++; } udd_ack_setup_received(0); }
static bool udd_ctrl_interrupt(void) { if (!Is_udd_endpoint_interrupt(0)) { return false; // No interrupt events on control endpoint } dbg_print("0: "); // By default disable overflow and underflow interrupt udd_disable_nak_in_interrupt(0); udd_disable_nak_out_interrupt(0); // Search event on control endpoint if (Is_udd_setup_received(0)) { dbg_print("stup "); // SETUP packet received udd_ctrl_setup_received(); return true; } if (Is_udd_in_send(0) && Is_udd_in_send_interrupt_enabled(0)) { dbg_print("in "); // IN packet sent udd_ctrl_in_sent(); return true; } if (Is_udd_out_received(0)) { dbg_print("out "); // OUT packet received udd_ctrl_out_received(); return true; } if (Is_udd_nak_out(0)) { dbg_print("nako "); // Overflow on OUT packet udd_ack_nak_out(0); udd_ctrl_overflow(); return true; } if (Is_udd_nak_in(0)) { dbg_print("naki "); // Underflow on IN packet udd_ack_nak_in(0); udd_ctrl_underflow(); return true; } dbg_print("n%x ", (int)UHDP_ARRAY(UOTGHS_DEVEPTISR[0], 0)); return false; }
static bool udd_ctrl_interrupt(void) { if (!Is_udd_endpoint_interrupt(0)) return false; // No interrupt events on control endpoint // By default disable overflow and underflow interrupt udd_disable_nak_in_interrupt(0); udd_disable_nak_out_interrupt(0); // Search event on control endpoint if (Is_udd_setup_received(0)) { // SETUP packet received udd_ctrl_setup_received(); return true; } if (Is_udd_in_send(0) && Is_udd_in_send_interrupt_enabled(0)) { // IN packet sent udd_ctrl_in_sent(); return true; } if (Is_udd_out_received(0)) { // OUT packet received udd_ctrl_out_received(); return true; } if (Is_udd_nak_out(0)) { // Overflow on OUT packet udd_ack_nak_out(0); udd_ctrl_overflow(); return true; } if (Is_udd_nak_in(0)) { // Underflow on IN packet udd_ack_nak_in(0); udd_ctrl_underflow(); return true; } return false; }