int __attribute__((section(".init"))) _init(void)
{
OldSetGsCrt = GetSyscallHandler(__NR_SetGsCrt);
j_SetGsCrt = MAKE_J(OldSetGsCrt);
SetSyscall(__NR_SetGsCrt, KSEG0(HookSetGsCrt));
return 0;
}
int __attribute__((section(".init"))) _init(void)
{
#ifdef _HOOK_9
/* hook syscall */
OldSetupThread = GetSyscallHandler(__NR_SetupThread);
j_SetupThread = MAKE_J(OldSetupThread);
SetSyscall(__NR_SetupThread, KSEG0(HookSetupThread));
#endif
return 0;
}
// =============================================================================
// spal_GdbStep
// -----------------------------------------------------------------------------
// =============================================================================
PROTECTED VOID spal_GdbStep (UINT32 nAddr, VOLATILE UINT32 * spal_GdbRegs)
{
UINT32 nNewAddr;
#ifdef SPAL_ROMULATOR
BOOL flashWriteEnable = 0;
#endif
if (spal_GdbRegs[37] & 0x01)
nNewAddr=spal_Gdb16Step(nAddr, spal_GdbRegs);
else
nNewAddr=spal_Gdb32Step(nAddr, spal_GdbRegs);
// Take special action if the instruction to change
// is in flash or in Rom
#ifdef SPAL_ROMULATOR
if (nNewAddr & REG_CS0_BASE)
{
// This address is in flash
flashWriteEnable = spal_EbcFlashWriteEnabled();
spal_EbcFlashWriteEnable(TRUE);
}
#endif // SPAL_ROMULATOR
#ifdef FPGA
// Special Rom
// Unlock
hwp_memBridge->Rom_Patch[0] = MEM_BRIDGE_PATCH_ENABLE;
#else
if ((nNewAddr & 0x0FF00000) == REG_INT_ROM_BASE)
{
// This instruction is in internal ROM
// We need to copy the whole line to patch
// it. The line being patched become writtable
UINT32 wordIdx = 0;
// Copy Rom line into patch memory
for (wordIdx = 0 ; wordIdx<4; wordIdx++)
{
*((UINT32*)(KSEG0(REG_INT_SRAM_BASE)) + 4*SPAL_GDB_PATCH_NUMBER + wordIdx) =
*((UINT32*)(KSEG0(((nNewAddr & MEM_BRIDGE_BLOCK_ADDR_MASK)| REG_INT_ROM_BASE))) + wordIdx);
}
// Enable patch
hwp_memBridge->Rom_Patch[SPAL_GDB_PATCH_NUMBER] = MEM_BRIDGE_PATCH_ENABLE
| (nNewAddr & MEM_BRIDGE_BLOCK_ADDR_MASK);
}
#endif
if (nNewAddr & 0x01)
{
spal_Gdb16EndStep(nNewAddr);
}
else
{
spal_Gdb32EndStep(nNewAddr);
}
spal_InvalidateCache();
#ifdef SPAL_ROMULATOR
// Reprotect flash
if (nNewAddr & REG_CS0_BASE)
{
// This address was in flash
spal_EbcFlashWriteEnable(flashWriteEnable);
}
#endif // SPAL_ROMULATOR
#ifdef FPGA
// Special Rom
// Lock
hwp_memBridge->Rom_Patch[0] = MEM_BRIDGE_PATCH_DISABLE;
#endif
}
// =============================================================================
// spal_GdbSetBreakpoint
// -----------------------------------------------------------------------------
/// Manage the setting of a breakpoint when asked by the GDB server. This basi-
/// cally means to squash the current opcode by the break opcode. The opcode
/// is memorized by the GDB server for it to be restored.
// =============================================================================
PROTECTED VOID spal_GdbSetBreakpoint(VOLATILE UINT32* regs)
{
UINT32 addr = regs[SPAL_GDB_CMDPARAM_OFF];
#ifdef SPAL_ROMULATOR
BOOL flashWriteEnable = 0;
// Take special action if the instruction to change
// is in flash or in
if (addr & REG_CS0_BASE)
{
// This address is in flash
flashWriteEnable = spal_EbcFlashWriteEnabled();
spal_EbcFlashWriteEnable(TRUE);
}
#endif // SPAL_ROMULATOR
#ifdef FPGA
// Special Rom
// Unlock
hwp_memBridge->Rom_Patch[0] = MEM_BRIDGE_PATCH_ENABLE;
#else
if ((addr & 0x0FF00000) == REG_INT_ROM_BASE)
{
// This instruction is in internal ROM
// We need to copy the whole line to patch
// it. The line being patched become writtable
UINT32 wordIdx = 0;
// Copy Rom line into patch memory
for (wordIdx = 0 ; wordIdx<4; wordIdx++)
{
*((UINT32*)(KSEG0(REG_INT_SRAM_BASE)) + 4*SPAL_GDB_PATCH_NUMBER + wordIdx) =
*((UINT32*)(KSEG0(((addr & MEM_BRIDGE_BLOCK_ADDR_MASK)| REG_INT_ROM_BASE))) + wordIdx);
}
// Enable patch
hwp_memBridge->Rom_Patch[SPAL_GDB_PATCH_NUMBER] = MEM_BRIDGE_PATCH_ENABLE
| (addr & MEM_BRIDGE_BLOCK_ADDR_MASK);
}
#endif
if(addr & 1) //MIPS16
{
*(UINT16*)(addr&~1) = SPAL_GDB_16_OPCODE_STEP;
}
else //MIPS32
{
*(VOLATILE UINT32*)(addr) = SPAL_GDB_OPCODE_STEP;
}
// Take special action if the instruction to change
// is in flash or in
#ifdef SPAL_ROMULATOR
if (addr & REG_CS0_BASE)
{
// Reprotect flash
// This address was in flash
spal_EbcFlashWriteEnable(flashWriteEnable);
}
#endif // SPAL_ROMULATOR
#ifdef FPGA
// Special Rom
// Lock
hwp_memBridge->Rom_Patch[0] = MEM_BRIDGE_PATCH_DISABLE;
#else
// We need to keep the patch enabled until the breakpoint is removed.
#endif
}