static void MT9P015_output_window(kal_bool pv_size, kal_uint16 dummy_pixel, kal_uint16 dummy_line)
{
kal_uint16 hactive, vactive, line_length, frame_height;
kal_uint8 inc;
if (pv_size)
{
inc = 3;
hactive = MT9P015_IMAGE_SENSOR_PV_HACTIVE;
vactive = MT9P015_IMAGE_SENSOR_PV_VACTIVE;
line_length = MT9P015_PV_PERIOD_PIXEL_NUMS + dummy_pixel;
frame_height = MT9P015_PV_PERIOD_LINE_NUMS + dummy_line;
}
else
{
inc = 1;
hactive = MT9P015_IMAGE_SENSOR_FULL_HACTIVE;
vactive = MT9P015_IMAGE_SENSOR_FULL_VACTIVE;
line_length = MT9P015_FULL_PERIOD_PIXEL_NUMS + dummy_pixel;
frame_height = MT9P015_FULL_PERIOD_LINE_NUMS + dummy_line;
}
MT9P015_write_cmos_sensor(0x0104, 0x01);
/* config line length */
if (line_length != MT9P015_sensor.line_length)
{
MT9P015_sensor.line_length = line_length;
MT9P015_write_cmos_sensor(0x0342, line_length >> 8); /* line_length_pck */
MT9P015_write_cmos_sensor(0x0343, line_length);
}
static void MT9P015_write_shutter(kal_uint16 course)
{
if (!course) course = 1; /* avoid 0 */
MT9P015_write_cmos_sensor(0x0104, 0x01); /* grouped_parameter_hold */
MT9P015_write_cmos_sensor(0x0202, course >> 8); /* course_integration_time */
MT9P015_write_cmos_sensor(0x0203, course);
MT9P015_write_cmos_sensor(0x0104, 0x00);
}
static void MT9P015_array_window(kal_uint16 startx, kal_uint16 starty, kal_uint16 width, kal_uint16 height)
{
const kal_uint16 endx = startx + width - 1;
const kal_uint16 endy = starty + height - 1;
MT9P015_write_cmos_sensor(0x0344, startx >> 8); /* x_addr_start */
MT9P015_write_cmos_sensor(0x0345, startx);
MT9P015_write_cmos_sensor(0x0346, starty >> 8); /* y_addr_start */
MT9P015_write_cmos_sensor(0x0347, starty);
MT9P015_write_cmos_sensor(0x0348, endx >> 8); /* x_addr_end */
MT9P015_write_cmos_sensor(0x0349, endx);
MT9P015_write_cmos_sensor(0x034A, endy >> 8); /* y_addr_end */
MT9P015_write_cmos_sensor(0x034B, endy);
}
inline static void MT9P015_set_mirror(kal_uint8 mirror)
{
kal_uint8 sensor_mirror = 0;
if (MT9P015_sensor.mirror == mirror) return;
MT9P015_sensor.mirror = mirror;
switch (MT9P015_sensor.mirror)
{
case IMAGE_H_MIRROR:
sensor_mirror = 1;
break;
case IMAGE_V_MIRROR:
sensor_mirror = 2;
break;
case IMAGE_HV_MIRROR:
sensor_mirror = 3;
break;
default:
break;
}
MT9P015_write_cmos_sensor(0x0101, sensor_mirror); /* image_orientation */
}
/*************************************************************************
* FUNCTION
* MT9P015_set_clock
*
* DESCRIPTION
* This function set sensor vt clock and op clock
*
* PARAMETERS
* clk: vt clock
*
* RETURNS
* None
*
* LOCAL AFFECTED
*
*************************************************************************/
static void MT9P015_set_clock(kal_uint32 clk)
{
static const kal_uint8 clk_setting[][6] =
{
{0x08,0x01,0x02,0x20,0x08,0x02}, /* MCLK: 48M, VT CLK: 96M, PCLK: 48M */
//{0x08,0x01,0x02,0x20,0x08,0x02}, /* MCLK: 48M, VT CLK: 96M, PCLK: 48M */
//{0x06,0x01,0x03,0x24,0x08,0x01}, /* MCLK: 48M, VT CLK: 96M, PCLK: 72M */
//{0x04,0x01,0x0d,0x60,0x08,0x01}, /* MCLK: 52M, VT CLK: 96M, PCLK: 48M */
{0x05,0x01,0x03,0x28,0x08,0x01}, /* MCLK: 48M, VT CLK: 128M, PCLK: 80M */
//{0x06,0x01,0x04,0x3C,0x08,0x01}, /* MCLK: 48M, VT CLK: 120M, PCLK: 90M */
//{0x06,0x01,0x04,0x3C,0x0A,0x01}, /* MCLK: 48M, VT CLK: 120M, PCLK: 72M */
//{0x05,0x01,0x0d,0xa0,0x08,0x01}, /* MCLK: 52M, VT CLK: 128M, PCLK: 80M */
};
kal_uint8 i;
if (MT9P015_sensor.vt_clk == clk) return;
MT9P015_sensor.vt_clk = clk;
switch (MT9P015_sensor.vt_clk)
{
case 96000000:
i = 0;
break;
case 128000000:
i = 1;
break;
default:
ASSERT(0);
}
/* pclk = mclk * pll_multipler / (pre_pll_div * op_sys_clk_div * op_pix_clk_div * row_speed[10:8]) */
/* vtclk =mclk * pll_multipler / (pre_pll_div * vt_sys_div * vt_pix_clk_div * row_speed[2:0]) */
MT9P015_write_cmos_sensor(0x0100, 0x00); /* standby */
MT9P015_write_cmos_sensor(0x0301, clk_setting[i][0]); /* vt_pix_clk_div, (Internal used to control the timing of the pixel array) */
MT9P015_write_cmos_sensor(0x0303, clk_setting[i][1]); /* vt_sys_div (For SIMA) */
MT9P015_write_cmos_sensor(0x0305, clk_setting[i][2]); /* pre_pll_div */
MT9P015_write_cmos_sensor(0x0307, clk_setting[i][3]); /* pll_multipler */
MT9P015_write_cmos_sensor(0x0309, clk_setting[i][4]); /* op_pix_clk_div (Pixel clock) */
MT9P015_write_cmos_sensor(0x030B, clk_setting[i][5]); /* op_sys_clk_div */
mdelay(1); /* allow PLL to lock */
}
