static void mvneta_conf_mbus_windows(struct mvneta_port *pp) { const struct mbus_dram_target_info *dram; u32 win_enable; u32 win_protect; int i; dram = mvebu_mbus_dram_info(); for (i = 0; i < 6; i++) { mvreg_write(pp, MVNETA_WIN_BASE(i), 0); mvreg_write(pp, MVNETA_WIN_SIZE(i), 0); if (i < 4) mvreg_write(pp, MVNETA_WIN_REMAP(i), 0); } win_enable = 0x3f; win_protect = 0; for (i = 0; i < dram->num_cs; i++) { const struct mbus_dram_window *cs = dram->cs + i; mvreg_write(pp, MVNETA_WIN_BASE(i), (cs->base & 0xffff0000) | (cs->mbus_attr << 8) | dram->mbus_dram_target_id); mvreg_write(pp, MVNETA_WIN_SIZE(i), (cs->size - 1) & 0xffff0000); win_enable &= ~(1 << i); win_protect |= 3 << (2 * i); } mvreg_write(pp, MVNETA_BASE_ADDR_ENABLE, win_enable); }
static void mvneta_conf_mbus_windows(struct mvneta_port *priv) { const struct mbus_dram_target_info *dram = mvebu_mbus_dram_info(); u32 win_enable, win_protect; int i; for (i = 0; i < 6; i++) { writel(0, priv->reg + MVNETA_WIN_BASE(i)); writel(0, priv->reg + MVNETA_WIN_SIZE(i)); if (i < 4) writel(0, priv->reg + MVNETA_WIN_REMAP(i)); } win_enable = 0x3f; win_protect = 0; for (i = 0; i < dram->num_cs; i++) { const struct mbus_dram_window *cs = dram->cs + i; writel((cs->base & 0xffff0000) | (cs->mbus_attr << 8) | dram->mbus_dram_target_id, priv->reg + MVNETA_WIN_BASE(i)); writel((cs->size - 1) & 0xffff0000, priv->reg + MVNETA_WIN_SIZE(i)); win_enable &= ~(1 << i); win_protect |= 3 << (2 * i); } writel(win_enable, priv->reg + MVNETA_BASE_ADDR_ENABLE); }
/* * Not like A380, in Armada3700, there are two layers of decode windows for GBE: * First layer is: GbE Address window that resides inside the GBE unit, * Second layer is: Fabric address window which is located in the NIC400 * (South Fabric). * To simplify the address decode configuration for Armada3700, we bypass the * first layer of GBE decode window by setting the first window to 4GB. */ static void mvneta_bypass_mbus_windows(struct mvneta_port *pp) { /* * Set window size to 4GB, to bypass GBE address decode, leave the * work to MBUS decode window */ mvreg_write(pp, MVNETA_WIN_SIZE(0), MVNETA_WIN_SIZE_MASK); /* Enable GBE address decode window 0 by set bit 0 to 0 */ clrbits_le32(pp->base + MVNETA_BASE_ADDR_ENABLE, MVNETA_BASE_ADDR_ENABLE_BIT); /* Set GBE address decode window 0 to full Access (read or write) */ setbits_le32(pp->base + MVNETA_PORT_ACCESS_PROTECT, MVNETA_PORT_ACCESS_PROTECT_WIN0_RW); }