// initialize module vector ONLY.
am_status_t Log::initialize()
throw()
{
am_status_t status = AM_SUCCESS;
ScopeLock scopeLock(*lockPtr);
if (!initialized) {
try {
moduleList = new std::vector<Module>;
// init ALL MODULE
moduleList->push_back(Module(ALL_LOG));
allModule = ALL_MODULES;
(*moduleList)[allModule].level = LOG_ERROR;
// init REMOTE MODULE
moduleList->push_back(Module(REMOTE_LOG));
remoteModule = allModule+1;
(*moduleList)[remoteModule].level =
static_cast<Level>(LOG_AUTH_REMOTE|LOG_AUTH_LOCAL);
initialized = true;
status = AM_SUCCESS;
} catch (std::exception&) {
if (moduleList) {
delete moduleList;
moduleList = NULL;
}
status = AM_FAILURE;
} catch (...) {
status = AM_FAILURE;
}
}
return status;
}
void ModuleManager::loadModules(){
//_logger->info("Loading modules from EEPROM");
_modules[0] = Module(NEW_MODULE_ID, 255);
_activeModules = EEPROM.read(0);
//_logger->info("Active modules number: " + (String)_activeModules); //TODO: setup logging correctly
if (_activeModules > MAX_MODULES_NUMBER){
_activeModules = MAX_MODULES_NUMBER;
}
for (byte i = 1; i <= _activeModules; i++){
_modules[i] = Module(EEPROM.read(1 + 2 * i),EEPROM.read(2 + 2 * i));
//_logger->info("Module " + (String)i + " initialized with the following values: " + (String)_modules[i].getAddr() + " " + (String)_modules[i].getType()); //TODO: setup logging correctly
}
}
void Compiler::Visit(ModuleRootNode* node)
{
module_ = Module();
buildStandardLibrary();
for (auto child : node->children()) {
child->Accept(this);
}
auto main = module_.functionTable.find("main");
if (main == module_.functionTable.end()) {
throw "No function 'main' in module";
}
module_.entryPoint = module_.instructions.size();
Instruction saveReturnAddress;
saveReturnAddress.opcode = PUSHI;
saveReturnAddress.arg1 = module_.instructions.size() + 3;
module_.instructions.push_back(saveReturnAddress);
Instruction pushJmpAddress;
pushJmpAddress.opcode = PUSHI;
pushJmpAddress.arg1 = main->second.offset;
module_.instructions.push_back(pushJmpAddress);
Instruction call;
call.opcode = JUMP;
module_.instructions.push_back(call);
Instruction halt;
halt.opcode = HLT;
module_.instructions.push_back(halt);
}
void circuits( SD sd, Signal Init, Signal Clock,
Signal w, Signal x, Signal y, Signal z )
{
Module( (sd, "circuits"), (Init, Clock), (w, x, y, z) );
// Insert your declarations for any auxiliary Signals here
Signal W, X, Y, Z;
// Insert your DFFs here
Dff( SD("1b"), ( Init, W, Clock, Zero ), w );
Dff( SD("2b"), ( Zero, X, Clock, Init ), x );
Dff( SD("3b"), ( Init, Y, Clock, Zero ), y );
Dff( SD("4b"), ( Zero, Z, Clock, Init ), z );
// Insert your combinational logic here (Not, And, Or gates)
Signal notx, noty, notz;
Not ( SD(sd,"1d"), x, notx );
Not ( SD(sd,"2d"), y, noty );
Not ( SD(sd,"3d"), z, notz );
Signal and1, and2, and3, and4;
And ( SD(sd,"1e"), (notx, noty), and1 );
And ( SD(sd,"2e"), (x, notz), and2 );
And ( SD(sd,"3e"), (w, y), and3 );
And ( SD(sd,"4e"), (noty, notz), and4 );
Or ( SD(sd,"1f"), (and1, and1), W );
Or ( SD(sd,"2f"), (and2, and3), X );
Or ( SD(sd,"3f"), (z, z), Y );
Or ( SD(sd,"4f"), (and4, and4), Z );
}
// Make sure there is no return keyword between the call to this function and
// the call to Raise() or Warn().
void rbSFML::PrepareErrorStream()
{
VALUE SFML = Module();
VALUE flag = rb_cv_get(SFML, "@@raise_exceptions");
if( RTEST( flag ) )
sf::err().rdbuf( globalErrorStream.rdbuf() );
}
TanModule::TanModule(int taille_entree,int taille_sortie){
_taille_entree = taille_entree; _taille_sortie = taille_sortie;
Module(taille_sortie, taille_sortie);
sortie.reset(new Vector(_taille_sortie));
delta.reset(new Vector(_taille_sortie));
}
void setup() {
size(wide, high);
coswave = new float[width];
for (int i = 0; i < width; i++) {
float amount = map(i, 0, width, 0, G_PI);
coswave[i] = fabs(cos(amount));
}
// Array 2D
maxDistance = dist(width / 2, height / 2, width, height);
for (int y = 0; y < height; y++) {
for (int x = 0; x < width; x++) {
float distance = dist(width / 2, height / 2, x, y);
distances[x][y] = distance / maxDistance * 255;
}
}
spacer = 10;
strokeWeight(6);
// Array Objects
int wideCount = width / unit;
int highCount = height / unit;
count = wideCount * highCount;
mods = new Module[count];
int index = 0;
for (int y = 0; y < highCount; y++) {
for (int x = 0; x < wideCount; x++) {
mods[index++] = Module(x*unit, y*unit, unit / 2, unit / 2, random(0.05, 0.8), unit);
}
}
}
void alu(SD(sd),
const Signals& A,
const Signals& B,
const Signal& Cin,
const Signal& Ainvert,
const Signal& Binvert,
const Signal& Unsgn,
const Signals& Op,
const Signals& Res,
const Signal& C,
const Signal& V)
{
Module((sd, "32 Bit ALU"),
(A,B,Cin,Ainvert,Binvert,Unsgn,Op),
(Res,C,V)
);
Signal Cout(NUM_BITS);
Signal lessIn;
Signal lessOut;
Signal notV;
Signal notMSB;
Signal notUnsgn;
Signal lessJunk(NUM_BITS-1);
Signal set;
Signal setIntrm(3);
Signal Prod1;
Signal Prod2;
oneBitALU(SD(sd, "1d"), A[0], B[0], Cin, lessIn, Ainvert, Binvert, Op,
Res[0], Cout[0], lessJunk[0]);
for (int i = 1; i < NUM_BITS-1; ++i)
oneBitALU(SD(sd,"1d"), A[i], B[i], Cout[i-1], Zero, Ainvert, Binvert, Op,
Res[i], Cout[i], lessJunk[i]);
oneBitALU(SD(sd,"1d"), A[NUM_BITS-1], B[NUM_BITS-1], Cout[NUM_BITS-2], Zero,
Ainvert, Binvert, Op, Res[NUM_BITS-1], C, lessOut);
Not(SD(sd, "1d"), V, notV);
Not(SD(sd, "1d"), Res[NUM_BITS-1], notMSB);
Not(SD(sd, "1d"), Unsgn, notUnsgn);
And(SD(sd, "1d"), (notUnsgn, notV, Res[NUM_BITS-1]), setIntrm[0]);
And(SD(sd, "1d"), (notUnsgn, V, notMSB), setIntrm[1]);
And(SD(sd, "1d"), (Unsgn, V), setIntrm[2]);
Or(SD(sd, "1d"), setIntrm, set);
And(SD(sd, "1d"), (set, lessOut), lessIn);
Iand(SD(sd, "1d"), (Res[NUM_BITS-1]), (A[NUM_BITS-1],B[NUM_BITS-1]), Prod1);
Iand(SD(sd, "1d"), (A[NUM_BITS-1], B[NUM_BITS-1]), (Res[NUM_BITS-1]), Prod2);
Or(SD(sd, "1d"), (Prod1, Prod2), V);
}
ModuleManager::ModuleManager()
{
m_modules.emplace_back(Module("cellSysutil", {
{0x0BAE8772, wrap(cellVideoOutConfigure)},
{0xE558748D, wrap(cellVideoOutGetResolution)},
{0x887572D5, wrap(cellVideoOutGetState)}
}));
}
void InstructionBlock::GenerateCode()
{
auto ir_builder = Module()->IrBuilder();
ir_builder->SetInsertPoint(entry_basic_block);
module->GenerateIncInstructionCount();
instruction->GenerateCode(this);
}
ClangTidyASTConsumerFactory::ClangTidyASTConsumerFactory(
ClangTidyContext &Context)
: Context(Context), CheckFactories(new ClangTidyCheckFactories) {
for (ClangTidyModuleRegistry::iterator I = ClangTidyModuleRegistry::begin(),
E = ClangTidyModuleRegistry::end();
I != E; ++I) {
std::unique_ptr<ClangTidyModule> Module(I->instantiate());
Module->addCheckFactories(*CheckFactories);
}
}
status_t
Device::InitDevice()
{
RecursiveLocker _(sLock);
if ((fNode->Flags() & NODE_FLAG_DEVICE_REMOVED) != 0) {
// TODO: maybe the device should be unlinked in devfs, too
return ENODEV;
}
if ((fNode->Flags() & NODE_FLAG_WAITING_FOR_DRIVER) != 0)
return B_BUSY;
if (fInitialized++ > 0) {
fNode->InitDriver();
// acquire another reference to our parent as well
return B_OK;
}
status_t status = get_module(ModuleName(), (module_info**)&fDeviceModule);
if (status == B_OK) {
// our parent always has to be initialized
status = fNode->InitDriver();
}
if (status < B_OK) {
fInitialized--;
return status;
}
if (Module()->init_device != NULL)
status = Module()->init_device(fNode->DriverData(), &fDeviceData);
if (status < B_OK) {
fNode->UninitDriver();
fInitialized--;
put_module(ModuleName());
fDeviceModule = NULL;
fDeviceData = NULL;
}
return status;
}
Module Module::GetProviding(std::string name)
{
#if defined(_WIN32)
try
{
Module psapi(L"Psapi.dll");
auto EnumProcessModules = (BOOL WINAPI (*)(HANDLE, HMODULE*, DWORD, LPDWORD))psapi["EnumProcessModules"];
auto GetModuleFileNameExW = (DWORD WINAPI (*)(HANDLE, HMODULE, LPWSTR, DWORD))psapi["GetModuleFileNameExW"];
HANDLE process = GetCurrentProcess();
DWORD bytes_needed = 0;
EnumProcessModules(process, nullptr, 0, &bytes_needed);
size_t n_modules = bytes_needed / sizeof(HMODULE);
std::vector<HMODULE> modules(n_modules);
EnumProcessModules(process, modules.data(), modules.size()*sizeof(HMODULE), &bytes_needed);
for (auto m: modules)
{
Module module(m);
if (module.Probe(name))
{
wchar_t filename[MAX_PATH];
GetModuleFileNameExW(process, m, filename, MAX_PATH);
//LOG(Info, "Symbol \"" << name.c_str() << "\" was found in \"" << filename << "\""); // FIXME: global object dependency failure
return module;
}
}
}
catch (std::exception& e)
{
//LOG(Error, "Module enumeration has failed: " << e.what()); // FIXME: global object dependency failure
}
#else
void* m = dlopen(0, RTLD_NOW|RTLD_GLOBAL);
if (dlsym(m, name.c_str()) != nullptr)
{
return Module(m);
}
#endif
return Module();
}
void circuits( SD sd, Signal Init, Signal Clock,
Signal w, Signal x, Signal y, Signal z )
{
Module( (sd, "circuits"), (Init, Clock), (w, x, y, z) );
// Insert your declarations for any auxiliary Signals here
// Insert your DFFs here
// Insert your combinational logic here (Not, And, Or gates)
}
Module Process::isInjected(HMODULE hmodule)
{
MEMORY_BASIC_INFORMATION mem_basic_info = { 0 };
SYSTEM_INFO sys_info = getSystemInfo();
for (SIZE_T mem = 0; mem < (SIZE_T)sys_info.lpMaximumApplicationAddress; mem += mem_basic_info.RegionSize)
{
mem_basic_info = memBasicInfo((const void*)mem);
if ((mem_basic_info.AllocationProtect & PAGE_EXECUTE_WRITECOPY) &&
(mem_basic_info.Protect & (PAGE_EXECUTE | PAGE_EXECUTE_READ |
PAGE_EXECUTE_READWRITE | PAGE_EXECUTE_WRITECOPY)))
{
if ((HMODULE)mem_basic_info.AllocationBase == hmodule)
return Module(hmodule, *this);
}
}
return Module(); // access denied or not found
}
std::string rbSFML::Message()
{
sf::err().rdbuf( std::cerr.rdbuf() );
if( RTEST( rb_cv_get( Module(), "@@raise_exceptions" ) ) )
{
std::string message = globalErrorStream.str();
globalErrorStream.str( "" );
if( !message.empty() )
message.erase( message.end() - 1 ); // Remove '\n' from end.
return message;
}
return "";
}
void
Device::UninitDevice()
{
RecursiveLocker _(sLock);
if (fInitialized-- > 1) {
fNode->UninitDriver();
return;
}
TRACE(("uninit driver for node %p\n", this));
if (Module()->uninit_device != NULL)
Module()->uninit_device(fDeviceData);
fDeviceModule = NULL;
fDeviceData = NULL;
put_module(ModuleName());
fNode->UninitDriver();
}
void Division ()
{
float c;
int fac_output, module_output,fac_input,A,B;
printf ("Enter A , please\n");
scanf ("%d",&A);
printf ("Enter B, please\n");
scanf ("%d",&B);
fac_input=A;
c = factorial(fac_input)/Module(A,B);
printf("%0.2f",c);
}
void circuits( SD sd, Signal Init, Signal Clock,
Signal w, Signal x, Signal y, Signal z )
{
Module( (sd, "circuits"), (Init, Clock), (w, x, y, z) );
// Insert your declarations for any auxiliary Signals here
Signal notw, notx, noty, notz, W, X, Y, Z;
// Insert your DFFs here
Dff (SD(sd,"2g"), (Init, W, Clock, Zero), w);
Dff (SD(sd,"3g"), (Zero, X, Clock, Init), x);
Dff (SD(sd,"4g"), (Init, Y, Clock, Zero), y);
Dff (SD(sd,"5g"), (Zero, Z, Clock, Init), z);
// Insert your combinational logic here (Not, And, Or gates)
Not (SD(sd,"2b"), w, notw);
Not (SD(sd,"3b"), x, notx);
Not (SD(sd,"4b"), y, noty);
Not (SD(sd,"5b"), z, notz);
// W = wx + yz + wy'
Signal wfirst, wsecond, wthird;
And (SD(sd, "2c"), (w, x), wfirst);
And (SD(sd, "3c"), (y, z), wsecond);
And (SD(sd, "4c"), (w, noty), wthird);
Or (SD(sd, "5c"), (wfirst, wsecond, wthird), W);
// X = xz' + wz + wy
Signal xfirst, xsecond, xthird;
And (SD(sd, "2d"), (x, notz), xfirst);
And (SD(sd, "3d"), (w, z), xsecond);
And (SD(sd, "4d"), (w, y), xthird);
Or (SD(sd, "6d"), (xfirst, xsecond, xthird), X);
// Y = y'z + xy + wy'
Signal yfirst, ysecond, ythird;
And (SD(sd, "2e"), (noty, z), yfirst);
And (SD(sd, "3e"), (x, y), ysecond);
And (SD(sd, "4e"), (w, noty), ythird);
Or (SD(sd, "5e"), (yfirst, ysecond, ythird), Y);
// Z = wx + w'z' + x'y'z
Signal zfirst, zsecond, zthird;
And (SD(sd, "2f"), (w, x), zfirst);
And (SD(sd, "3f"), (notw, notz), zsecond);
And (SD(sd, "4f"), (notx, noty, z), zthird);
Or (SD(sd, "5f"), (zfirst, zsecond, zthird), Z);
}
void circuit( SD sd, Signal a, Signal b, Signal c, Signal d, Signal F )
{
Module( (sd, "circuit"), (a, b, c, d), (F) );
Signal notb, notc, notd;
Signal and1, and2; // Intermediate objects
Not ( SD(sd,"2a"), b, notb ); // NOT gates
Not ( SD(sd,"3a"), c, notc );
Not ( SD(sd,"4a"), d, notd );
And ( SD(sd,"2c"), (a, notb), and1 ); // AND gates
And ( SD(sd,"3c"), (b, notc, notd), and2 );
Or ( SD(sd,"2e"), (and1, and2), F ); // OR gate
}
std::pair<std::string, Module> loadModule(std::vector<std::string> elements)
{
return std::make_pair(elements[0],
std::move(
Module(
static_cast<ModuleTypes::ModuleType>(std::stoi(elements[1])), // Convert integer to enum (No run time type check..)
std::stoi(elements[2]),
std::stoi(elements[3]),
std::stoi(elements[4]),
std::stoi(elements[5]),
std::stoi(elements[6]),
std::stoi(elements[7]),
std::stoi(elements[8]))
)
);
}
void ModuleManager::moduleCleanUp(){
// This function will check for removed modules, and after several unsuccessfull retries will remove them from the list
pingAll();
for (byte i = 1; i <= _activeModules; i++){
if (_modules[i].getRetries() > MAX_PING_RETRIES){
//_logger->info("Deleting module number " + (String)i + " with address " + (String)_modules[i].getAddr() + " because it did not responded more than 10 times");
for (byte j = i; j <= _activeModules - 1; j++){
_modules[j + 1].setAddr(j + I2C_MIN_ADDR); // This will assure that the address is set in the module too
_modules[j] = Module(j + I2C_MIN_ADDR, _modules[j + 1].getType());
}
_activeModules--;
}
}
// Will save the new modules to EEPROM
saveModules();
}
void
ImageSymbolLoader::Instrument
(
IMG img
)
{
string ImageName = IMG_Name(img);
string ImageNameExt = Basename(ImageName);
ADDRINT Base = IMG_StartAddress(img);
MemRange Module(Base, IMG_SizeMapped(img));
Symbol::RefreshSymbolByIMG(img);
cerr << "[pintool] Module " << MemRangeToString(Module) << " "
<< ImageNameExt << " "
<< Symbol::SymbolInfoForModuleAtAddress(Base)
<< endl;
}
ResourceString :: ResourceString (ULONG Id) : psz ("(string load error)")
{
SavedId = Id;
if (DosGetResource (Module(), RT_STRING, Id/16+1, &BlockPointer))
return;
psz = PSZ (BlockPointer) + sizeof(USHORT);
USHORT Index = USHORT (Id % 16);
while (Index--)
{
psz += * PUCHAR (psz);
psz ++;
}
psz ++;
}
Module Process::isInjected(const Library& lib)
{
MEMORY_BASIC_INFORMATION mem_basic_info = { 0 };
SYSTEM_INFO sys_info = getSystemInfo();
for (SIZE_T mem = 0; mem < (SIZE_T)sys_info.lpMaximumApplicationAddress; mem += mem_basic_info.RegionSize)
{
mem_basic_info = memBasicInfo((const void*)mem);
if ((mem_basic_info.AllocationProtect & PAGE_EXECUTE_WRITECOPY) &&
(mem_basic_info.Protect & (PAGE_EXECUTE | PAGE_EXECUTE_READ |
PAGE_EXECUTE_READWRITE | PAGE_EXECUTE_WRITECOPY)))
{
Module module((HMODULE)mem_basic_info.AllocationBase, *this);
if (boost::iequals(module.mappedFilename(*this), lib.ntFilename()))
return module;
}
}
return Module(); // access denied or not found
}
void circuits( SD sd, Signal w, Signal x, Signal y, Signal z,
Signal Present, Signal a, Signal b, Signal c, Signal d, Signal e,
Signal f, Signal g )
{
Module( (sd, "circuits"), (w, x, y, z), (Present, a, b, c, d, e, f, g) );
Signal notz, notw,notx, noty;
Signal and1, and2, and3, and4, and5, and6, and7, and8, and9, and10, and11,and12, and13,and14;
Not(SD(sd, "e1-f8"), z, notz);
Not(SD(sd, "g1-h8"), w, notw);
Not(SD(sd, "i1-j8"), x, notx);
Not(SD(sd, "k1-l8"), y, noty);
And(SD(sd,"ab-be"), (y, z, notw), and1);
And(SD(sd,"cb-de"), (noty, notz, x, notw), and2);
And(SD(sd,"eb-fe"), (w, notx, noty), and3);
And(SD(sd,"gb-he"), (notw, x), and4);
And(SD(sd,"ib-je"), (w,notx,noty), and5);
And(SD(sd,"kb-le"), (y,z,notw), and6);
And(SD(sd,"mb-ne"), (w,notx,noty), and7);
And(SD(sd,"ob-pe"), (noty,notz,notw,x), and8);
And(SD(sd,"qb-re"), (y,z,notw,x), and9);
And(SD(sd,"sb-te"), (noty,notz,w,notx), and10);
And(SD(sd,"ub-ve"), (notw, x,y,z), and11);
And(SD(sd,"wb-xe"), (w,notx,noty,z),and12);
Or(SD(sd,"bg-cl"), (and1, and2, and3), Present);
Or(SD(sd,"dg-el"), (and4,and5),a);
Or(SD(sd,"fg-gl"), (and6,and7),b);
Or(SD(sd,"hg-il"), (One, One),c );
Or(SD(sd,"jg-kl"), (and8,and9,and10),d);
Or(SD(sd,"lg-ml"), (and11,and12),e);
Or(SD(sd,"og-pl"), (One, One), f);
Or(SD(sd,"sg-tl"), (One, One), g);
}
/**
* Attaches to the target process.
*
* @param tids The thread IDs of the threads that belong to the target process.
*
* @return A NaviError code that describes whether the operation was successful
* or not.
*/
NaviError GdbSystem::attachToProcess() {
std::vector < Thread > tids;
NaviError attachResult = cpu->attach(tids, this);
if (attachResult) {
msglog->log(LOG_VERBOSE, "Error: Couldn't attach to GDB server (Code: %d)",
attachResult);
} else {
unsigned int activeThread;
cpu->getActiveThread(activeThread, this);
setActiveThread(activeThread);
// The module constructor parameters are an optimistic over-approximation
// since
// Gdb can not provide us with better info about the executable image.
processStart(Module("", "", 0, 0xFFFFFFFF),
Thread(activeThread, SUSPENDED));
}
return attachResult;
}
void circuits( SD sd, Signal w, Signal x, Signal y, Signal z,
Signal Present, Signal a, Signal b, Signal c, Signal d, Signal e,
Signal f, Signal g )
{
Module( (sd, "circuits"), (w, x, y, z), (Present, a, b, c, d, e, f, g) );
Signal notw, notx, noty, notz;
Signal and1, and2, and3, and4, and5, and6, and7, and8, and9, and10, and11, and12, and13, and14, and15;
Not (SD(sd,"1a"), w, notw);
Not (SD(sd,"1b"), x, notx);
Not (SD(sd,"1c"), y, noty);
Not (SD(sd,"1d"), z, notz);
And (SD(sd,"2a"), (notw, noty, notz), and1);
And (SD(sd,"2b"), (notw,noty,z), and2);
And (SD(sd,"2c"), (notw,x,y), and3);
And (SD(sd,"2d"), (w,notx,noty,z), and4);
And (SD(sd,"2e"), (w,notx,y,notz), and5);
And (SD(sd,"2f"), (notw,notx,noty), and6);
And (SD(sd,"2g"), (notw,y,z), and7);
And (SD(sd,"2h"), (w,noty), and8);
And (SD(sd,"2i"), (notw,notx), and9);
And (SD(sd,"2j"), (notw,y,notz), and10);
And (SD(sd,"2m"), (y,notz), and11);
And (SD(sd,"2n"), (notw,x,notz), and12);
And (SD(sd,"2o"), (notw,notx,y), and13);
And (SD(sd,"2p"), (One,One), and14);
Or (SD(sd,"3a"), (and1,and2,and3,and4,and5), Present);
Or (SD(sd,"3b"), (w,y,and6), a);
Or (SD(sd,"3c"), (w,noty,and7), b);
Or (SD(sd,"3d"), (and14), c);
Or (SD(sd,"3e"), (and8,and9,and10), d);
Or (SD(sd,"3f"), (and11,and6), e);
Or (SD(sd,"3g"), (noty,w,and12), f);
Or (SD(sd,"3h"), (w,and12,and13), g);
}
// same as addModule but with no locking
Log::ModuleId Log::pAddModule(const std::string& name)
throw()
{
ModuleId module = 0;
try {
for (module = 0; module < moduleList->size(); ++module) {
if ((*moduleList)[module].name == name) {
break;
}
}
if (module == moduleList->size()) {
moduleList->push_back(Module(name));
// The initial level defaults to the current level for ALL_MODULES.
(*moduleList)[module].level = (*moduleList)[ALL_MODULES].level;
}
}
catch (...) {
log(ALL_MODULES, LOG_ERROR,
"Could not add module %s. Unknown exception caught.", name.c_str());
}
return module;
}
static HRESULT _ShowHTMLDialog(
HWND hwndParent,
IMoniker* pMk,
VARIANT* pvarArgIn = NULL,
WCHAR* pchOptions = NULL,
VARIANT* pvarArgOut = NULL)
{
HRESULT hr = S_OK;
try
{
CModule Module("MSHTML.DLL");
if (Module.GetHandle() == NULL)
{
return E_FAIL;
}
SHOWHTMLDIALOGFN* fnShowHTMLDialog =
(SHOWHTMLDIALOGFN*)Module.GetProcAddress("ShowHTMLDialog");
if (fnShowHTMLDialog == NULL)
{
return E_FAIL;
}
hr = (*fnShowHTMLDialog)(hwndParent, pMk, pvarArgIn, pchOptions, pvarArgOut);
if (FAILED(hr))
{
return hr;
}
}
catch (...)
{
return E_FAIL;
}
return hr;
}
