/*****************************************************************************
** Function name: I2C_MstInit
**
** Descriptions: I2C port initialization routine
**
** parameters: None
** Returned value: None
**
*****************************************************************************/
void I2C_MstInit( LPC_I2C_TypeDef *I2Cx, uint32_t div, uint32_t cfg, uint32_t dutycycle )
{
/* For master mode plus, if desired I2C clock is 1MHz (SCL high time + SCL low time).
If CCLK is 36MHz, MasterSclLow and MasterSclHigh are 0s,
SCL high time = (ClkDiv+1) * (MstSclHigh + 2 )
SCL low time = (ClkDiv+1) * (MstSclLow + 2 )
Pre-divider should be 8.
If fast mode, e.g. communicating with a temp sensor, Max I2C clock is set to 400KHz.
Pre-divider should be 11. */
I2Cx->DIV = div;
I2Cx->CFG &= ~(CFG_MSTENA);
msttxrdy = mstrxrdy = 0;
I2Cx->MSTTIME = TIM_MSTSCLLOW(dutycycle) | TIM_MSTSCLHIGH(dutycycle);
#if I2C_INTERRUPT
I2Cx->INTENSET |= (STAT_MSTARBLOSS | STAT_MSTSSERR);
NVIC_DisableIRQ(I2C_IRQn);
NVIC_ClearPendingIRQ(I2C_IRQn);
#if NMI_ENABLED
NMI_Init( I2C_IRQn );
#else
NVIC_EnableIRQ(I2C_IRQn);
#endif
#endif
I2Cx->CFG |= cfg;
return;
}
/******************************************************************************
** Function name: init_wkt
**
** Descriptions: Initialize timer, select clock source, set timer interval,
** install timer interrupt handler
**
** parameters: clock source and timer interval
** Returned value: None
**
******************************************************************************/
void init_wkt(uint32_t clkSrc, uint32_t timerInterval)
{
LPC_SYSCON->SYSAHBCLKCTRL |= (0x1 << 9);
LPC_SYSCON->PRESETCTRL &= ~(0x1 << 9);
LPC_SYSCON->PRESETCTRL |= (0x1 << 9);
if ( clkSrc & WKT_CLKSEL )
{
LPC_WKT->CTRL |= WKT_CLKSEL;
}
else
{
LPC_WKT->CTRL &= ~WKT_CLKSEL;
}
LPC_WKT->COUNT = timerInterval;
/* Enable the WKT Interrupt */
#if NMI_ENABLED
NVIC_DisableIRQ( WKT_IRQn );
NMI_Init( WKT_IRQn );
#else
NVIC_EnableIRQ(WKT_IRQn);
#endif
return;
}
void mrtInit(uint32_t delay)
{
Factor_us=__SYSTEM_CLOCK/1000000UL;
/* Enable clock to MRT and reset the MRT peripheral */
LPC_SYSCON->SYSAHBCLKCTRL |= (0x1<<10);
LPC_SYSCON->PRESETCTRL &= ~(0x1<<7);
LPC_SYSCON->PRESETCTRL |= (0x1<<7);
mrt_counter = 0;
LPC_MRT->Channel[0].INTVAL = delay;
LPC_MRT->Channel[0].INTVAL |= 0x1UL<<31;
LPC_MRT->Channel[0].CTRL = MRT_REPEATED_MODE|MRT_INT_ENA;
// timer 1 for us delay with down counter
LPC_MRT->Channel[1].CTRL = MRT_ONE_SHOT_INT;
/* Enable the MRT Interrupt */
#if NMI_ENABLED
NVIC_DisableIRQ( MRT_IRQn );
NMI_Init( MRT_IRQn );
#else
NVIC_EnableIRQ(MRT_IRQn);
#endif
INIT_US_TIMER;
return;
}
/******************************************************************************
** Function name: init_timer
**
** Descriptions: Initialize timer, set timer interval, reset timer,
** install timer interrupt handler
**
** parameters: timer interval
** Returned value: None
**
******************************************************************************/
void init_mrt(uint32_t TimerInterval)
{
/* Enable clock to MRT and reset the MRT peripheral */
LPC_SYSCON->SYSAHBCLKCTRL |= (0x1<<10);
LPC_SYSCON->PRESETCTRL &= ~(0x1<<7);
LPC_SYSCON->PRESETCTRL |= (0x1<<7);
mrt_counter = 0;
LPC_MRT->Channel[0].INTVAL = TimerInterval;
LPC_MRT->Channel[0].INTVAL |= 0x1UL<<31;
LPC_MRT->Channel[0].CTRL = MRT_REPEATED_MODE|MRT_INT_ENA;
/* Enable the MRT Interrupt */
#if NMI_ENABLED
NVIC_DisableIRQ( MRT_IRQn );
NMI_Init( MRT_IRQn );
#else
NVIC_EnableIRQ(MRT_IRQn);
#endif
return;
}
/*****************************************************************************
** Function name: UARTInit
**
** Descriptions: Initialize UART port, setup pin select,
** clock, parity, stop bits, FIFO, etc.
**
** parameters: UART baudrate
** Returned value: None
**
*****************************************************************************/
void UARTInit(LPC_USART_TypeDef *UARTx, uint32_t baudrate)
{
uint32_t UARTSysClk;
UARTTxEmpty = 1;
UARTClock_Init( UARTx );
UARTSysClk = SystemCoreClock/LPC_SYSCON->UARTCLKDIV;
UARTx->CFG = DATA_LENG_8|PARITY_NONE|STOP_BIT_1; /* 8 bits, no Parity, 1 Stop bit */
// UARTx->CFG = DATA_LENG_7|PARITY_NONE|STOP_BIT_1; /* 7 bits, no Parity, 1 Stop bit */
// UARTx->CFG = DATA_LENG_8|PARITY_NONE|STOP_BIT_2; /* 8 bits, no Parity, 2 Stop bit */
// UARTx->CFG = DATA_LENG_8|PARITY_EVEN|STOP_BIT_1; /* 8 bits, even Parity, 1 Stop bit */
// UARTx->CFG = DATA_LENG_8|PARITY_ODD|STOP_BIT_1; /* 8 bits, odd Parity, 1 Stop bit */
#if ADDR_DETECT_EN
/* Without two boards connected, the simpliest test is, on the PC side, set to 8 bits,
even parity. on the board side, set to 9 bit, ADDR_DET is set. When data is received
and 9th bit is one, if ADDR_DET is set in CTRL, grab the data as address detected. */
/* Overwrite above UART CFG register. */
UARTx->CFG = DATA_LENG_9|PARITY_NONE|STOP_BIT_1; /* 9 bits, Parity doesn't apply, 1 Stop bit */
UARTx->CTRL = ADDR_DET;
#endif
if ( !LPC_SYSCON->UARTCLKDIV )
{
/* UART clock divider for FDR is disabled. need to know why? */
while ( 1 );
}
else
{
UARTx->BRG = UARTSysClk/16/baudrate-1; /* baud rate */
/*
Integer divider:
BRG = UARTSysClk/(Baudrate * 16) - 1
Frational divider:
FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1) where FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
*/
/* (1) The easist way is set SUB value to 256, -1 encoded, thus SUB register is 0xFF.
(2) In ADD register value, depending on the value of UartSysClk, baudrate, BRG register value, and SUB register value, be careful
about the order of multiplyer and divider and make sure any multiplyer doesn't exceed 32-bit boundary and any divider doesn't get
down below one(integer 0).
(3) ADD should be always less than SUB. */
LPC_SYSCON->UARTFRGDIV = 0xFF;
LPC_SYSCON->UARTFRGMULT = (((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) / (baudrate * (UARTx->BRG + 1))) - (LPC_SYSCON->UARTFRGDIV + 1);
}
#if FLOWCTRL_ENABLE
FlowControlInit(UARTx);
#endif
UARTx->STAT = CTS_DELTA | DELTA_RXBRK; /* Clear all status bits. */
/* Enable the UART Interrupt. */
if (UARTx == LPC_USART0) {
#if NMI_ENABLED
NVIC_DisableIRQ( UART0_IRQn );
NMI_Init( UART0_IRQn );
#else
NVIC_EnableIRQ(UART0_IRQn);
#endif
}
else if (UARTx == LPC_USART1) {
#if NMI_ENABLED
NVIC_DisableIRQ( UART1_IRQn );
NMI_Init( UART1_IRQn );
#else
NVIC_EnableIRQ(UART1_IRQn);
#endif
}
else if (UARTx == LPC_USART2) {
#if NMI_ENABLED
NVIC_DisableIRQ( UART2_IRQn );
NMI_Init( UART2_IRQn );
#else
NVIC_EnableIRQ(UART2_IRQn);
#endif
}
#if TX_INTERRUPT
UARTx->INTENSET = RXRDY | TXRDY | DELTA_RXBRK; /* Enable UART interrupt */
#else
UARTx->INTENSET = RXRDY | DELTA_RXBRK;
UARTx->INTENCLR = TXRDY;
#endif
#if ERROR_INTERRUPT
UARTx->INTENSET = (FRM_ERR|OVRN_ERR|PAR_ERR|RXNOISE);
#endif
#if TX_DISABLE
UARTx->CTRL |= TXDIS;
UARTx->INTENSET = TXINT_DIS;
#endif
UARTx->CFG |= UART_EN;
return;
}
/*****************************************************************************
** Function name: SPI_Init
**
** Descriptions: SPI port initialization routine
**
** parameters: None
** Returned value: None
**
*****************************************************************************/
void SPI_Init( LPC_SPI_TypeDef *SPIx, uint32_t div, uint32_t cfg, uint32_t dly )
{
/* Set up clock and power for SSP1 module, M3 clock is all we need for LSPI */
if ( SPIx == LPC_SPI0 )
{
/* Enable SPI clock */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<11);
/* Peripheral reset control to SPI, a "1" bring it out of reset. */
LPC_SYSCON->PRESETCTRL &= ~(0x1<<0);
LPC_SYSCON->PRESETCTRL |= (0x1<<0);
}
else if ( SPIx == LPC_SPI1 )
{
/* Enable SPI clock */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
/* Peripheral reset control to SPI, a "1" bring it out of reset. */
LPC_SYSCON->PRESETCTRL &= ~(0x1<<1);
LPC_SYSCON->PRESETCTRL |= (0x1<<1);
}
if ( cfg & CFG_MASTER )
{
/* divider and delay registers are for master mode only. */
SPIx->DIV = div;
SPIx->DLY = dly;
}
SPIx->CFG = (cfg & ~CFG_ENABLE);
/* For now, txrdy and rxrdy are shared by both SPI0 and SPI1. Only one
running at a time. */
rxrdy = txrdy = 0;
#if SPI_INTERRUPT
#if STALL_ENABLE
SPIx->INTENSET = STAT_RXRDY | STAT_TXRDY | STAT_RXOVERRUN | STAT_CLKSTALL
| STAT_SELNASSERT | STAT_SELNDEASSERT;
#else
// SPIx->INTENSET = STAT_RXRDY | STAT_TXRDY | STAT_RXOVERRUN | STAT_TXUNDERRUN
// | STAT_SELNASSERT | STAT_SELNDEASSERT;
SPIx->INTENSET = STAT_RXRDY | STAT_TXRDY | STAT_RXOVERRUN;
#endif
if ( SPIx == LPC_SPI0 )
{
NVIC_DisableIRQ(SPI0_IRQn);
NVIC_ClearPendingIRQ(SPI0_IRQn);
#if NMI_ENABLED
NMI_Init( SPI0_IRQn );
#else
NVIC_EnableIRQ(SPI0_IRQn);
#endif
}
else if ( SPIx == LPC_SPI1 )
{
NVIC_DisableIRQ(SPI1_IRQn);
NVIC_ClearPendingIRQ(SPI1_IRQn);
#if NMI_ENABLED
NMI_Init( SPI1_IRQn );
#else
NVIC_EnableIRQ(SPI1_IRQn);
#endif
}
#else
SPIx->INTENCLR = STAT_RXRDY | STAT_TXRDY | STAT_RXOVERRUN | STAT_TXUNDERRUN
| STAT_SELNASSERT | STAT_SELNDEASSERT;
#endif
SPIx->CFG |= CFG_ENABLE;
return;
}
/******************************************************************************
** Function name: init_timer
**
** Descriptions: Initialize timer, set timer interval, reset timer,
** install timer interrupt handler
**
** parameters: timer number and timer interval
** Returned value: None
**
******************************************************************************/
void init_timer16(uint8_t timer_num, uint32_t TimerInterval)
{
uint32_t i;
if ( timer_num == 0 )
{
/* Some of the I/O pins need to be clearfully planned if
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7);
LPC_CT16B0->MR0 = TimerInterval;
LPC_CT16B0->MR1 = TimerInterval;
#if TIMER_MATCH
for ( i = 0; i < 4; i++ )
{
timer16_0_counter[i] = 0;
}
set_timer16_match(timer_num, 0x07, 0);
LPC_CT16B0->EMR &= ~(0xFF<<4);
LPC_CT16B0->EMR |= ((0x3<<4)|(0x3<<6)|(0x3<<8));
#else
for ( i = 0; i < 4; i++ )
{
timer16_0_capture[i] = 0;
}
set_timer16_capture(timer_num, 0);
/* Capture 0 and 2 on rising edge, interrupt enable. */
LPC_CT16B0->CCR = (0x5<<0)|(0x5<<6);
#endif
LPC_CT16B0->MCR = (0x3<<0)|(0x3<<3); /* Interrupt and Reset on MR0 and MR1 */
/* Enable the TIMER0 Interrupt */
#if NMI_ENABLED
NVIC_DisableIRQ(CT16B0_IRQn);
NMI_Init( CT16B0_IRQn );
#else
NVIC_EnableIRQ(CT16B0_IRQn);
#endif
}
else if ( timer_num == 1 )
{
/* Some of the I/O pins need to be clearfully planned if
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<8);
LPC_CT16B1->MR0 = TimerInterval;
LPC_CT16B1->MR1 = TimerInterval;
#if TIMER_MATCH
for ( i = 0; i < 4; i++ )
{
timer16_1_counter[i] = 0;
}
set_timer16_match(timer_num, 0x07, 0);
LPC_CT16B1->EMR &= ~(0xFF<<4);
LPC_CT16B1->EMR |= ((0x3<<4)|(0x3<<6)|(0x3<<8));
#else
for ( i = 0; i < 4; i++ )
{
timer16_1_capture[i] = 0;
}
set_timer16_capture(timer_num, 0);
/* Capture 0 and 1 on rising edge, interrupt enable. */
LPC_CT16B1->CCR = (0x5<<0)|(0x5<<3);
#endif
LPC_CT16B1->MCR = (0x3<<0)|(0x3<<3); /* Interrupt and Reset on MR0 and MR1 */
/* Enable the TIMER1 Interrupt */
#if NMI_ENABLED
NVIC_DisableIRQ(CT16B1_IRQn);
NMI_Init( CT16B1_IRQn );
#else
NVIC_EnableIRQ(CT16B1_IRQn);
#endif
}
return;
}
/******************************************************************************
** Function name: init_timer
**
** Descriptions: Initialize timer, set timer interval, reset timer,
** install timer interrupt handler
**
** parameters: timer number and timer interval
** Returned value: None
**
******************************************************************************/
void init_timer32(uint8_t timer_num, uint32_t TimerInterval)
{
volatile uint32_t i;
if ( timer_num == 0 )
{
/* Some of the I/O pins need to be clearfully planned if
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<9);
LPC_CT32B0->MR0 = TimerInterval;
#if MATCH
for ( i = 0; i < 4; i++ )
{
timer32_0_counter[i] = 0;
}
set_timer32_match(timer_num, 0x0F, 0);
LPC_CT32B0->EMR &= ~(0xFF<<4);
LPC_CT32B0->EMR |= ((0x3<<4)|(0x3<<6)|(0x3<<8)|(0x3<<10)); /* MR0/1/2/3 Toggle */
LPC_CT32B0->MCR = 3; /* Interrupt and Reset on MR0 */
#endif
#if CAPTURE
for ( i = 0; i < 4; i++ )
{
timer32_0_capture[i] = 0;
}
set_timer32_capture(timer_num, 0 );
/* Capture 0 on rising edge, interrupt enable. */
LPC_CT32B0->CCR = (0x5<<0)|(0x5<<6);
#endif
/* Enable the TIMER0 Interrupt */
#if NMI_ENABLED
NVIC_DisableIRQ( TIMER_32_0_IRQn );
NMI_Init( TIMER_32_0_IRQn );
#else
NVIC_EnableIRQ(TIMER_32_0_IRQn);
#endif
}
else if ( timer_num == 1 )
{
/* Some of the I/O pins need to be clearfully planned if
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<10);
LPC_CT32B1->MR0 = TimerInterval;
#if MATCH
for ( i = 0; i < 4; i++ )
{
timer32_1_counter[i] = 0;
}
set_timer32_match(timer_num, 0x0F, 0);
LPC_CT32B1->EMR &= ~(0xFF<<4);
LPC_CT32B1->EMR |= ((0x3<<4)|(0x3<<6)|(0x3<<8)|(0x3<<10)); /* MR0/1/2 Toggle */
LPC_CT32B1->MCR = 3; /* Interrupt and Reset on MR0 */
#endif
#if CAPTURE
for ( i = 0; i < 4; i++ )
{
timer32_1_capture[i] = 0;
}
set_timer32_capture(timer_num, 0 );
/* Capture 0 on rising edge, interrupt enable. */
LPC_CT32B1->CCR = (0x5<<0)|(0x5<<3);
#endif
/* Enable the TIMER1 Interrupt */
#if NMI_ENABLED
NVIC_DisableIRQ( TIMER_32_1_IRQn );
NMI_Init( TIMER_32_1_IRQn );
#else
NVIC_EnableIRQ(TIMER_32_1_IRQn);
#endif
}
return;
}
