DWORD GetStdClass32WindowProc( INT iClass )
{
if( iClass >= 0 && iClass < NUMEL(vaStdClassThunkWindowProc) ) {
WOW32ASSERT( vaStdClassThunkWindowProc[iClass].Proc32 != (DWORD)0 );
return vaStdClassThunkWindowProc[iClass].Proc32;
}
else {
return (DWORD)NULL;
}
}
DWORD IsStdClassThunkWindowProc(DWORD Proc16, PINT piClass) {
INT i;
for (i = 0; i < NUMEL(vaStdClassThunkWindowProc); i++) {
if (Proc16 == vaStdClassThunkWindowProc[i].Proc16) {
*piClass = i;
return vaStdClassThunkWindowProc[i].Proc32;
}
}
return (DWORD)NULL;
}
int init_DAC()
{
GPIO_InitTypeDef gpinit[1] = {{0}};
gpinit->GPIO_Pin = GPIO_Pin_4;
gpinit->GPIO_Mode = GPIO_Mode_AIN;
gpinit->GPIO_Speed = GPIO_Speed_50MHz;
gpinit->GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOA, gpinit);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
DAC_DeInit();
DAC_InitTypeDef dac[1];
dac->DAC_Trigger = DAC_Trigger_T6_TRGO;
dac->DAC_WaveGeneration = DAC_WaveGeneration_None;
dac->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bits11_0;
dac->DAC_OutputBuffer = DAC_OutputBuffer_Enable;
DAC_Init(DAC_Channel_1, dac);
DAC_Cmd(DAC_Channel_1, ENABLE);
DMA_DeInit(DMA1_Stream5);
DMA_InitTypeDef dma[1];
dma->DMA_Channel = DMA_Channel_7;
dma->DMA_PeripheralBaseAddr = (uint32_t) &DAC->DHR12L1;
dma->DMA_Memory0BaseAddr = (uint32_t) buffer;
dma->DMA_DIR = DMA_DIR_MemoryToPeripheral;
dma->DMA_BufferSize = NUMEL(buffer);
dma->DMA_PeripheralInc = DMA_PeripheralInc_Disable;
dma->DMA_MemoryInc = DMA_MemoryInc_Enable;
dma->DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
dma->DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
dma->DMA_Mode = DMA_Mode_Circular;
dma->DMA_Priority = DMA_Priority_High;
dma->DMA_FIFOMode = DMA_FIFOMode_Disable;
dma->DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
dma->DMA_MemoryBurst = DMA_MemoryBurst_Single;
dma->DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream5, dma);
DMA_ITConfig(DMA1_Stream5, DMA_IT_TC, ENABLE);
DMA_ITConfig(DMA1_Stream5, DMA_IT_HT, ENABLE);
NVIC_InitTypeDef nvic[1];
nvic->NVIC_IRQChannel = DMA1_Stream5_IRQn;
nvic->NVIC_IRQChannelPreemptionPriority = 7;
nvic->NVIC_IRQChannelSubPriority = 7;
nvic->NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(nvic);
DMA_Cmd(DMA1_Stream5, ENABLE);
DAC_DMACmd(DAC_Channel_1, ENABLE);
TIM_DeInit(TIM6);
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 1749;
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);
TIM_SelectOutputTrigger(TIM6, TIM_TRGOSource_Update);
TIM_Cmd(TIM6, ENABLE);
return 0;
}
