VOID
NbInitSmuClockGating (
IN NB_CLK_GATING_CTRL *NbClkGatingCtrl,
IN GNB_PLATFORM_CONFIG *Gnb
)
{
BOOLEAN Smu_Lclk_Gating;
BOOLEAN Smu_Sclk_Gating;
SMUx73_STRUCT SMUx73;
UINT32 Value;
Smu_Lclk_Gating = NbClkGatingCtrl->Smu_Lclk_Gating;
Smu_Sclk_Gating = NbClkGatingCtrl->Smu_Sclk_Gating;
//SMUx6F
Value = 0x006001F0;
NbSmuIndirectWrite (SMUx6F_ADDRESS, AccessS3SaveWidth32, &Value, Gnb->StdHeader);
//SMUx71
Value = 0x007001F0;
NbSmuIndirectWrite (SMUx71_ADDRESS, AccessS3SaveWidth32, &Value, Gnb->StdHeader);
//SMUx73
NbSmuIndirectRead (SMUx73_ADDRESS, AccessWidth16, &SMUx73.Value, Gnb->StdHeader);
SMUx73.Field.DisLclkGating = Smu_Lclk_Gating ? 0 : 1;
SMUx73.Field.DisSclkGating = Smu_Sclk_Gating ? 0 : 1;
NbSmuIndirectWrite (SMUx73_ADDRESS, AccessS3SaveWidth16, &SMUx73.Value, Gnb->StdHeader);
}
VOID
NbInitLclkDeepSleep (
IN GNB_PLATFORM_CONFIG *Gnb
)
{
SMUx1B_STRUCT SMUx1B;
SMUx1D_STRUCT SMUx1D;
UINT32 LclkDpSlpEn;
IDS_HDT_CONSOLE (GNB_TRACE, "NbInitLclkDeepSleep Enter\n");
LclkDpSlpEn = GnbBuildOptions.LclkDeepSleepEn ? 1 : 0;
NbSmuIndirectRead (SMUx1B_ADDRESS, AccessWidth16, &SMUx1B.Value, Gnb->StdHeader);
NbSmuIndirectRead (SMUx1D_ADDRESS, AccessWidth16, &SMUx1D.Value, Gnb->StdHeader);
SMUx1B.Field.LclkDpSlpDiv = 5;
SMUx1B.Field.LclkDpSlpMask = (GfxLibIsControllerPresent (Gnb->StdHeader) ? (0xFF) : 0xEF);
SMUx1B.Field.RampDis = 0;
SMUx1D.Field.LclkDpSlpHyst = 0xf;
SMUx1D.Field.LclkDpSlpEn = LclkDpSlpEn;
IDS_HDT_CONSOLE (GNB_TRACE, " LCLK Deep Sleep [%s]\n", (LclkDpSlpEn != 0) ? "Enabled" : "Disabled");
NbSmuIndirectWrite (SMUx1B_ADDRESS, AccessS3SaveWidth16, &SMUx1B.Value, Gnb->StdHeader);
NbSmuIndirectWrite (SMUx1D_ADDRESS, AccessS3SaveWidth16, &SMUx1D.Value, Gnb->StdHeader);
IDS_HDT_CONSOLE (GNB_TRACE, "NbInitLclkDeepSleep Exit\n");
}
AGESA_STATUS
NbFmInitLclkDpmRcActivity (
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
PP_FUSE_ARRAY *PpFuseArray;
INT8 Index;
UINTN LclkState;
Status = AGESA_SUCCESS;
IDS_HDT_CONSOLE (GNB_TRACE, "NbFmInitLclkDpmRcActivity F14 Enter\n");
PpFuseArray = GnbLocateHeapBuffer (AMD_PP_FUSE_TABLE_HANDLE, StdHeader);
if (PpFuseArray != NULL) {
UINT32 ActivityThreshold [8];
UINT16 SamplingPeriod [10];
UINT8 LclkScalingDid [4];
UINT8 LclkScalingVid [4];
UINT32 LclkDpmValid;
UINT32 MainPllVcoKHz;
LibAmdMemFill (&ActivityThreshold[0], 0, sizeof (ActivityThreshold), StdHeader);
LibAmdMemFill (&SamplingPeriod[0], 0, sizeof (SamplingPeriod), StdHeader);
MainPllVcoKHz = GfxLibGetMainPllFreq (StdHeader) * 100;
LclkDpmValid = 0;
LclkState = 7;
for (Index = 3; Index >= 0; Index--) {
if (PpFuseArray->LclkDpmValid [Index] != 0) {
// Set valid DPM state
LclkDpmValid |= (1 << (LclkState));
// Set LCLK scaling DID
LclkScalingDid [7 - LclkState] = PpFuseArray->LclkDpmDid [Index];
// Set LCLK scaling VID
LclkScalingVid [7 - LclkState] = PpFuseArray->LclkDpmVid [Index];
// Set sampling period
SamplingPeriod [LclkState] = 0xC350;
// Changed from 0xC350 to 0x1388 for DPM 0
if (Index == 0) {
SamplingPeriod [LclkState] = 0x1388;
}
// Set activity threshold from BKDG:
// Raising -- ActivityThreshold [LclkState] = ((102 * (GfxLibCalculateClk (LclkScalingDid [7 - LclkState], MainPllVcoKHz) / 100)) - 10) / 10;
// Lowering -- ActivityThreshold [LclkState] |= (((407 * (GfxLibCalculateClk (LclkScalingDid [7 - LclkState], MainPllVcoKHz) / 100)) + 99) / 10) << 16;
// For ON specific enable LCLK DPM :
ActivityThreshold [LclkState] = LclkDpmActivityThresholdTable [Index];
IDS_HDT_CONSOLE (GNB_TRACE, "Fused State Index:%d LCLK DPM State [%d]: LclkScalingDid - 0x%x, ActivityThreshold - 0x%x, SamplingPeriod - 0x%x\n",
Index, LclkState, LclkScalingDid [7 - LclkState], ActivityThreshold [LclkState], SamplingPeriod [LclkState]
);
LclkState--;
}
}
if (LclkState != 7) {
SMUx33_STRUCT SMUx33;
SMUx0B_x8434_STRUCT SMUx0B_x8434;
FCRxFF30_01E4_STRUCT FCRxFF30_01E4;
UINT8 CurrentUnit;
UINT16 FinalUnit;
UINT16 FinalPeriod;
UINT32 Freq;
UINT32 FreqDelta;
UINT32 Value;
ASSERT (LclkScalingDid [0] != 0);
FreqDelta = 0xffffffff;
FinalPeriod = 0;
FinalUnit = 0;
Freq = (65535 * 100 * 100) / GfxLibCalculateClk (LclkScalingDid [0], MainPllVcoKHz);
for (CurrentUnit = 0; CurrentUnit < 16; CurrentUnit++) {
UINT32 CurrentFreqDelta;
UINT32 CurrentPeriod;
UINT32 Temp;
Temp = GnbLibPowerOf (4, CurrentUnit);
CurrentPeriod = Freq / Temp;
if (CurrentPeriod <= 0xFFFF) {
CurrentFreqDelta = Freq - Temp * CurrentPeriod;
if (FreqDelta > CurrentFreqDelta) {
FinalUnit = CurrentUnit;
FinalPeriod = (UINT16) CurrentPeriod;
FreqDelta = CurrentFreqDelta;
}
}
}
//Process to enablement LCLK DPM States
NbSmuIndirectRead (SMUx33_ADDRESS, AccessWidth32, &SMUx33.Value, StdHeader);
SMUx33.Field.BusyCntSel = 0x3;
SMUx33.Field.LclkActMonUnt = FinalUnit;
SMUx33.Field.LclkActMonPrd = FinalPeriod;
NbSmuIndirectWrite (SMUx33_ADDRESS, AccessS3SaveWidth32, &SMUx33.Value, StdHeader);
SMUx0B_x8434.Value = 0;
SMUx0B_x8434.Field.LclkDpmType = 0x1;
SMUx0B_x8434.Field.LclkDpmEn = 0x1;
SMUx0B_x8434.Field.LclkTimerPeriod = 0x0C350;
SMUx0B_x8434.Field.LclkTimerPrescalar = 0x1;
NbSmuRcuRegisterWrite (
SMUx0B_x8434_ADDRESS,
&SMUx0B_x8434.Value,
1,
TRUE,
StdHeader
);
NbSmuRcuRegisterWrite (
0x84AC,
&LclkDpmCacTable[0],
sizeof (LclkDpmCacTable) / sizeof (UINT32),
TRUE,
StdHeader
);
// Program activity threshold
IDS_HDT_CONSOLE (GNB_TRACE, "ActivityThreshold[4] - 0x%x ActivityThreshold[5] - 0x%x ActivityThreshold[6] - 0x%x ActivityThreshold[7] - 0x%x\n",
ActivityThreshold[4], ActivityThreshold[5], ActivityThreshold[6], ActivityThreshold [7]
);
NbSmuRcuRegisterWrite (
SMUx0B_x8470_ADDRESS,
&ActivityThreshold[4],
4,
TRUE,
StdHeader
);
// Program sampling period
for (Index = 0; Index < (sizeof (SamplingPeriod) / sizeof (SamplingPeriod[0])); Index = Index + 2) {
UINT16 Temp;
Temp = SamplingPeriod[Index];
SamplingPeriod[Index] = SamplingPeriod[Index + 1];
SamplingPeriod[Index + 1] = Temp;
}
IDS_HDT_CONSOLE (GNB_TRACE, "SamplingPeriod[4] - 0x%x SamplingPeriod[5] - 0x%x SamplingPeriod[6] - 0x%x SamplingPeriod[7] - 0x%x \n",
SamplingPeriod[4], SamplingPeriod[5], SamplingPeriod[6], SamplingPeriod[7]
);
NbSmuRcuRegisterWrite (
SMUx0B_x8440_ADDRESS,
(UINT32*) &SamplingPeriod[4],
2,
TRUE,
StdHeader
);
// Program LCK scaling DID
NbSmuRcuRegisterWrite (
SMUx0B_x848C_ADDRESS,
(UINT32*) &LclkScalingDid[0],
1,
TRUE,
StdHeader
);
// Program LCK scaling VID
NbSmuRcuRegisterWrite (
SMUx0B_x8498_ADDRESS,
(UINT32*) &LclkScalingVid[0],
1,
TRUE,
StdHeader
);
// Program valid LCLK DPM states
LclkDpmValid = NbFmDpmStateBootupInit (LclkDpmValid, StdHeader);
NbSmuRcuRegisterWrite (
SMUx0B_x8490_ADDRESS,
&LclkDpmValid,
1,
TRUE,
StdHeader
);
//Setup Activity Monitor Coefficients
Value = (0x24 << SMUx35_DownTrendCoef_OFFSET) | (0x24 << SMUx35_UpTrendCoef_OFFSET);
NbSmuIndirectWrite (SMUx35_ADDRESS, AccessS3SaveWidth32, &Value, StdHeader);
Value = (0x22 << SMUx35_DownTrendCoef_OFFSET) | (0x22 << SMUx35_UpTrendCoef_OFFSET);
for (Index = SMUx37_ADDRESS; Index <= SMUx51_ADDRESS; Index = Index + 2) {
NbSmuIndirectWrite (Index, AccessS3SaveWidth32, &Value, StdHeader);
}
// Enable LCLK DPM as voltage client
NbSmuSrbmRegisterRead (FCRxFF30_01E4_ADDRESS, &FCRxFF30_01E4.Value, StdHeader);
FCRxFF30_01E4.Field.VoltageChangeEn = 0x1;
NbSmuSrbmRegisterWrite (FCRxFF30_01E4_ADDRESS, &FCRxFF30_01E4.Value, TRUE, StdHeader);
// Start LCLK service
NbSmuServiceRequest (0x8, TRUE, StdHeader);
}
} else {
IDS_HDT_CONSOLE (GNB_TRACE, " ERROR! Cannot locate fuse table\n");
Status = AGESA_ERROR;
}
IDS_HDT_CONSOLE (GNB_TRACE, "NbFmInitLclkDpmRcActivity F14 Exit [0x%x]\n", Status);
return Status;
}
