示例#1
0
void OMAP_GPIO_183(void)
{
	u32 i2c_2_sda;
	
			i2c_2_sda = __raw_readw(OMAP2_L4_IO_ADDRESS(0x480021c0));
			i2c_2_sda = i2c_2_sda & ~(0x7 << 0);
		//	i2c_2_sda = i2c_2_sda |(1<<8)|(1<<4)|(1<<3)|(4<<0);
			i2c_2_sda = i2c_2_sda |(1<<8)|(4<<0);
			__raw_writew(i2c_2_sda,OMAP2_L4_IO_ADDRESS(0x480021c0));
}
示例#2
0
void OMAP_GPIO_168(void)
{
	u32 i2c_2_scl;
	
			i2c_2_scl = __raw_readw(OMAP2_L4_IO_ADDRESS(0x480021be));
			i2c_2_scl = i2c_2_scl & ~(0x7 << 0);
		//	i2c_2_scl = i2c_2_scl |(1<<8)|(1<<4)|(1<<3)|(4<<0);
			i2c_2_scl = i2c_2_scl |(1<<8)|(4<<0);
			__raw_writew(i2c_2_scl,OMAP2_L4_IO_ADDRESS(0x480021be));
}
示例#3
0
文件: io.c 项目: 15-712/linux-2.6
/*
 * Initialize asm_irq_base for entry-macro.S
 */
static inline void omap_irq_base_init(void)
{
	if (cpu_is_omap24xx())
		omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
	else if (cpu_is_omap34xx())
		omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
	else if (cpu_is_omap44xx())
		omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
	else
		pr_err("Could not initialize omap_irq_base\n");
}
示例#4
0
文件: io.c 项目: 01org/prd
void __init dra7xx_init_early(void)
{
	omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
	omap2_control_base_init();
	omap4_pm_init_early();
	omap2_prcm_base_init();
	dra7xxx_check_revision();
	dra7xx_powerdomains_init();
	dra7xx_clockdomains_init();
	dra7xx_hwmod_init();
	omap_hwmod_init_postsetup();
	omap_clk_soc_init = dra7xx_dt_clk_init;
}
示例#5
0
/*
 * Initialize asm_irq_base for entry-macro.S
 */
static inline void omap_irq_base_init(void)
{
	extern void __iomem *omap_irq_base;

#ifdef MULTI_OMAP2
	if (cpu_is_omap24xx())
		omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
	else if (cpu_is_omap34xx() || cpu_is_ti81xx())
		omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
	else if (cpu_is_omap44xx())
		omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
	else
		pr_err("Could not initialize omap_irq_base\n");
#endif
}
int detect_usb()
{
    u32 value;
    int i=0;
    u32 usb2phy;
    //OTG_INTERFSEL PHY interface is 12-pin, 8-bit SDR ULPI
    __raw_writel(0x1,OMAP2_L4_IO_ADDRESS(0x4a0a0000 + (0xb40c)));
    __raw_writel(~PHY_PD, OMAP2_L4_IO_ADDRESS(0x4a000000 + (0x2300)));
    usb2phy=__raw_readl(OMAP2_L4_IO_ADDRESS(0x4a100000 + (0x620)));
    if(usb2phy&0x40000000 ){            //ROM code disable detectcharger function
        __raw_writel(0,OMAP2_L4_IO_ADDRESS(0x4a100000 + (0x620)));     //enable the detect charger fuction
    }
    while(1){
        value=__raw_readl(OMAP2_L4_IO_ADDRESS(0x4a100000 + (0x620)));
        usb2phy=value;
        value&=0xE00000;value=value>>21;
        i++;
        if(value!=0)
            break;
               
        if(i>=20000000 || i<0)
            break;
    }
    //printk("%s : usb2phy =0x%x value=0x%x i=%d\n",__func__,usb2phy,value,i);
    switch(value){
        case PHY_DETECT_PC:
            printk("%s : Source is PC\n",__func__);
        break;
        case PHY_DETECT_DEDICATED_CHARGER:
            printk("%s : Source is Dedicated charger\n",__func__);
        break;
        case PHY_DETECT_HOST_CHARGER:
            printk("%s : USB   HOST charger\n",__func__);
        break;
        case PHY_DETECT_INTERRUPT:
            printk("%s : INTERRUPT \n",__func__);
        break;
        case PHY_DETECT_UNKNOW_ERROE:
            printk("%s : Unknown error \n",__func__);
        break;
        case PHY_DETECT_NO_CONTACT:
            printk("%s : No contact \n",__func__);
        break;
        default:
            value=__raw_readl(OMAP2_L4_IO_ADDRESS(0x4a100000 + (0x620)));  
  
            //work around,need to fixed
            //This will happen when boot by usb apapter without d+/d- shorter
            if(value==0x80260)
                value=PHY_DETECT_UNKNOW_ERROE;
            printk("%s Detect Error:",__func__);
        break;
    }
    //OTG_INTERFSEL PHY Embedded PHY interface is 8-bit, UTMI+
    __raw_writel(0x0,OMAP2_L4_IO_ADDRESS(0x4a0a0000 + (0xb40c)));
    __raw_writel(PHY_PD, OMAP2_L4_IO_ADDRESS(0x4a000000 + (0x2300)));
    return value;
}
示例#7
0
文件: io.c 项目: Aircell/asp-kernel
void omap_writel(u32 v, u32 pa)
{
	if (cpu_class_is_omap1())
		__raw_writel(v, OMAP1_IO_ADDRESS(pa));
	else
		__raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
}
示例#8
0
文件: omap-smp.c 项目: 03199618/linux
/*
 * Initialise the CPU possible map early - this describes the CPUs
 * which may be present or become present in the system.
 */
static void __init omap4_smp_init_cpus(void)
{
	unsigned int i = 0, ncores = 1, cpu_id;

	/* Use ARM cpuid check here, as SoC detection will not work so early */
	cpu_id = read_cpuid_id() & CPU_MASK;
	if (cpu_id == CPU_CORTEX_A9) {
		/*
		 * Currently we can't call ioremap here because
		 * SoC detection won't work until after init_early.
		 */
		scu_base =  OMAP2_L4_IO_ADDRESS(scu_a9_get_base());
		BUG_ON(!scu_base);
		ncores = scu_get_core_count(scu_base);
	} else if (cpu_id == CPU_CORTEX_A15) {
		ncores = OMAP5_CORE_COUNT;
	}

	/* sanity check */
	if (ncores > nr_cpu_ids) {
		pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
			ncores, nr_cpu_ids);
		ncores = nr_cpu_ids;
	}

	for (i = 0; i < ncores; i++)
		set_cpu_possible(i, true);
}
示例#9
0
static int omap2_iommu_enable(struct omap_iommu *obj)
{
	u32 l, pa;

	/*
	 * HACK: without this, we blow imprecise external abort on uEVM
	 * followed by L3 bus exception spew
	 */

	if (cpu_is_omap54xx()) {
		pr_info("omap2_iommu_enable: doing Benelli reset HACK\n");
		__raw_writel(3, OMAP2_L4_IO_ADDRESS(0x4AE06910));

		/* We need some ugly wait here as reread or mb() are not
		 * sufficient... */
		mdelay(500);
	}

	if (!obj->iopgd || !IS_ALIGNED((u32)obj->iopgd,  SZ_16K))
		return -EINVAL;

	pa = virt_to_phys(obj->iopgd);
	if (!IS_ALIGNED(pa, SZ_16K))
		return -EINVAL;

	l = iommu_read_reg(obj, MMU_REVISION);
	dev_info(obj->dev, "%s: version %d.%d\n", obj->name,
		 (l >> 4) & 0xf, l & 0xf);

	iommu_write_reg(obj, pa, MMU_TTB);

	__iommu_set_twl(obj, true);

	return 0;
}
示例#10
0
/* Write into a register in a CM instance */
void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
{
	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
	       part == OMAP4430_INVALID_PRCM_PARTITION ||
	       !_cm_bases[part]);
	__raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
}
示例#11
0
/* Read a register in a CM instance */
u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)
{
	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
	       part == OMAP4430_INVALID_PRCM_PARTITION ||
	       !_cm_bases[part]);
	return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
}
示例#12
0
文件: io.c 项目: 01org/prd
void __init omap5_init_early(void)
{
	omap2_set_globals_tap(OMAP54XX_CLASS,
			      OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
	omap2_control_base_init();
	omap4_pm_init_early();
	omap2_prcm_base_init();
	omap5xxx_check_revision();
	omap54xx_voltagedomains_init();
	omap54xx_powerdomains_init();
	omap54xx_clockdomains_init();
	omap54xx_hwmod_init();
	omap_hwmod_init_postsetup();
	omap_clk_soc_init = omap5xxx_dt_clk_init;
}
示例#13
0
/*
 * Initialise the CPU possible map early - this describes the CPUs
 * which may be present or become present in the system.
 */
void __init smp_init_cpus(void)
{
	unsigned int i, ncores;

	/*
	 * Currently we can't call ioremap here because
	 * SoC detection won't work until after init_early.
	 */
	scu_base =  OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE);
	BUG_ON(!scu_base);

	ncores = scu_get_core_count(scu_base);

	/* sanity check */
	if (ncores > NR_CPUS) {
		printk(KERN_WARNING
		       "OMAP4: no. of cores (%d) greater than configured "
		       "maximum of %d - clipping\n",
		       ncores, NR_CPUS);
		ncores = NR_CPUS;
	}

	for (i = 0; i < ncores; i++)
		set_cpu_possible(i, true);

	set_smp_cross_call(gic_raise_softirq);
}
示例#14
0
文件: omap-smp.c 项目: 5victor/linux
/*
 * Initialise the CPU possible map early - this describes the CPUs
 * which may be present or become present in the system.
 */
void __init smp_init_cpus(void)
{
	unsigned int i, ncores;

	/*
	 * Currently we can't call ioremap here because
	 * SoC detection won't work until after init_early.
	 */
	scu_base =  OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE);
	BUG_ON(!scu_base);

	ncores = scu_get_core_count(scu_base);

	/* sanity check */
	if (ncores > nr_cpu_ids) {
		pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
			ncores, nr_cpu_ids);
		ncores = nr_cpu_ids;
	}

	for (i = 0; i < ncores; i++)
		set_cpu_possible(i, true);

	set_smp_cross_call(gic_raise_softirq);
}
示例#15
0
文件: io.c 项目: Aircell/asp-kernel
u32 omap_readl(u32 pa)
{
	if (cpu_class_is_omap1())
		return __raw_readl(OMAP1_IO_ADDRESS(pa));
	else
		return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
}
示例#16
0
文件: wdt.c 项目: CSCLOG/beaglebone
int dsp_wdt_init(void)
{
	int ret = 0;

	dsp_wdt.sm_wdt = NULL;
	dsp_wdt.reg_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_WDT3_BASE);
	tasklet_init(&dsp_wdt.wdt3_tasklet, dsp_wdt_dpc, 0);

	dsp_wdt.fclk = clk_get(NULL, "wdt3_fck");

	if (dsp_wdt.fclk) {
		dsp_wdt.iclk = clk_get(NULL, "wdt3_ick");
		if (!dsp_wdt.iclk) {
			clk_put(dsp_wdt.fclk);
			dsp_wdt.fclk = NULL;
			ret = -EFAULT;
		}
	} else
		ret = -EFAULT;

	if (!ret)
		ret = request_irq(INT_34XX_WDT3_IRQ, dsp_wdt_isr, 0,
							"dsp_wdt", &dsp_wdt);

	/* Disable at this moment, it will be enabled when DSP starts */
	if (!ret)
		disable_irq(INT_34XX_WDT3_IRQ);

	return ret;
}
示例#17
0
文件: io.c 项目: 4atty/linux
void __init ti81xx_init_early(void)
{
	omap2_set_globals_tap(OMAP343X_CLASS,
			      OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
				  NULL);
	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
	omap3xxx_check_revision();
	ti81xx_check_features();
	omap3xxx_voltagedomains_init();
	omap3xxx_powerdomains_init();
	omap3xxx_clockdomains_init();
	omap3xxx_hwmod_init();
	omap_hwmod_init_postsetup();
	omap3xxx_clk_init();
}
示例#18
0
文件: io.c 项目: 383530895/linux
void __init omap4430_init_early(void)
{
	omap2_set_globals_tap(OMAP443X_CLASS,
			      OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
				  OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
			     OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
	omap_prm_base_init();
	omap_cm_base_init();
	omap4xxx_check_revision();
	omap4xxx_check_features();
	omap4_cm_init();
	omap4_pm_init_early();
	omap44xx_prm_init();
	omap44xx_voltagedomains_init();
	omap44xx_powerdomains_init();
	omap44xx_clockdomains_init();
	omap44xx_hwmod_init();
	omap_hwmod_init_postsetup();
	omap_l2_cache_init();
	omap_clk_soc_init = omap4xxx_dt_clk_init;
}
示例#19
0
文件: io.c 项目: 4atty/linux
void __init omap2430_init_early(void)
{
	omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
			       OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
				  NULL);
	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
	omap2xxx_check_revision();
	omap2xxx_prm_init();
	omap2xxx_cm_init();
	omap2xxx_voltagedomains_init();
	omap243x_powerdomains_init();
	omap243x_clockdomains_init();
	omap2430_hwmod_init();
	omap_hwmod_init_postsetup();
	omap2430_clk_init();
}
示例#20
0
文件: io.c 项目: 383530895/linux
void __init omap2420_init_early(void)
{
	omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
			       OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
				  NULL);
	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
	omap2xxx_check_revision();
	omap2xxx_prm_init();
	omap2xxx_cm_init();
	omap2xxx_voltagedomains_init();
	omap242x_powerdomains_init();
	omap242x_clockdomains_init();
	omap2420_hwmod_init();
	omap_hwmod_init_postsetup();
	omap_clk_soc_init = omap2420_dt_clk_init;
	rate_table = omap2420_rate_table;
}
示例#21
0
文件: control.c 项目: 0-T-0/ps4-linux
/*
 * Clears the scratchpad contents in case of cold boot-
 * called during bootup
 */
void omap3_clear_scratchpad_contents(void)
{
	u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET;
	void __iomem *v_addr;
	u32 offset = 0;

	v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM);
	if (omap3xxx_prm_clear_global_cold_reset()) {
		for ( ; offset <= max_offset; offset += 0x4)
			writel_relaxed(0x0, (v_addr + offset));
	}
}
示例#22
0
文件: io.c 项目: 01org/prd
void __init omap3_init_early(void)
{
	omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
			       OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
	/* XXX: remove these once OMAP3 is DT only */
	if (!of_have_populated_dt()) {
		omap2_set_globals_control(
			OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE));
		omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
		omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
				     NULL);
	}
	omap2_control_base_init();
	omap3xxx_check_revision();
	omap3xxx_check_features();
	omap2_prcm_base_init();
	/* XXX: remove these once OMAP3 is DT only */
	if (!of_have_populated_dt()) {
		omap3xxx_prm_init(NULL);
		omap3xxx_cm_init(NULL);
	}
	omap3xxx_voltagedomains_init();
	omap3xxx_powerdomains_init();
	omap3xxx_clockdomains_init();
	omap3xxx_hwmod_init();
	omap_hwmod_init_postsetup();
	if (!of_have_populated_dt()) {
		omap3_control_legacy_iomap_init();
		if (soc_is_am35xx())
			omap_clk_soc_init = am35xx_clk_legacy_init;
		else if (cpu_is_omap3630())
			omap_clk_soc_init = omap36xx_clk_legacy_init;
		else if (omap_rev() == OMAP3430_REV_ES1_0)
			omap_clk_soc_init = omap3430es1_clk_legacy_init;
		else
			omap_clk_soc_init = omap3430_clk_legacy_init;
	}
}
示例#23
0
/*
 * Clears the scratchpad contents in case of cold boot-
 * called during bootup
 */
void omap3_clear_scratchpad_contents(void)
{
	u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET;
	u32 *v_addr;
	u32 offset = 0;
	v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM);
	if (prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) &
		OMAP3430_GLOBAL_COLD_RST) {
		for ( ; offset <= max_offset; offset += 0x4)
			__raw_writel(0x0, (v_addr + offset));
		prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST, OMAP3430_GR_MOD,
			OMAP3_PRM_RSTST_OFFSET);
	}
}
示例#24
0
void __init omap3_init_early(void)
{
	omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
			       OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
				  NULL);
	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
	omap3xxx_check_revision();
	omap3xxx_check_features();
	omap3xxx_prm_init();
	omap3xxx_cm_init();
	omap3xxx_voltagedomains_init();
	omap3xxx_powerdomains_init();
	omap3xxx_clockdomains_init();
	omap3xxx_hwmod_init();
	omap_hwmod_init_postsetup();
	omap_clk_init = omap3xxx_clk_init;
#ifdef CONFIG_IPIPE
	disable_hlt();
#endif
}
示例#25
0
文件: control.c 项目: 24hours/linux
/*
 * Clears the scratchpad contents in case of cold boot-
 * called during bootup
 */
void omap3_clear_scratchpad_contents(void)
{
	u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET;
	void __iomem *v_addr;
	u32 offset = 0;
	v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM);
	if (omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) &
	    OMAP3430_GLOBAL_COLD_RST_MASK) {
		for ( ; offset <= max_offset; offset += 0x4)
			writel_relaxed(0x0, (v_addr + offset));
		omap2_prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST_MASK,
					   OMAP3430_GR_MOD,
					   OMAP3_PRM_RSTST_OFFSET);
	}
}
示例#26
0
文件: io.c 项目: 12zz/linux
void __init ti816x_init_early(void)
{
	omap2_set_globals_tap(TI816X_CLASS,
			      OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
	omap2_control_base_init();
	omap3xxx_check_revision();
	ti81xx_check_features();
	omap2_prcm_base_init();
	omap3xxx_voltagedomains_init();
	omap3xxx_powerdomains_init();
	ti816x_clockdomains_init();
	dm816x_hwmod_init();
	omap_hwmod_init_postsetup();
	omap_clk_soc_init = dm816x_dt_clk_init;
}
示例#27
0
文件: io.c 项目: 12zz/linux
void __init omap3_init_early(void)
{
	omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
			       OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
	omap2_control_base_init();
	omap3xxx_check_revision();
	omap3xxx_check_features();
	omap2_prcm_base_init();
	omap3xxx_voltagedomains_init();
	omap3xxx_powerdomains_init();
	omap3xxx_clockdomains_init();
	omap3xxx_hwmod_init();
	omap_hwmod_init_postsetup();
}
示例#28
0
文件: rproc.c 项目: yangxi/omap4m3
static void rproc_exit(void) {
  volatile unsigned int *r = OMAP2_L4_IO_ADDRESS(M3_RSTCTRL);
  printk(KERN_ALERT "rproc leaving\n");

  //Release the system, shutdown remote core.
  if (dummy_rproc != NULL){
    printk(KERN_ALERT "Reset Cortex M3 Core2,%x\n",*r);
    //Before we shutdown the main M3 core, have to turn off
    //the second M3 cores first.
    *r |= 0x2;
    printk(KERN_ALERT "RSTCTRL reg after reset %x\n",*r);
    printk(KERN_ALERT "Put rproc handle\n");
    rproc_put(dummy_rproc);
  }
}
示例#29
0
文件: io.c 项目: 4atty/linux
void __init omap5_init_early(void)
{
	omap2_set_globals_tap(OMAP54XX_CLASS,
			      OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
				  OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
			     OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
	omap_prm_base_init();
	omap_cm_base_init();
	omap5xxx_check_revision();
}
示例#30
0
文件: io.c 项目: 12zz/linux
void __init omap2430_init_early(void)
{
	omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
			       OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
	omap2_control_base_init();
	omap2xxx_check_revision();
	omap2_prcm_base_init();
	omap2xxx_voltagedomains_init();
	omap243x_powerdomains_init();
	omap243x_clockdomains_init();
	omap2430_hwmod_init();
	omap_hwmod_init_postsetup();
	omap_clk_soc_init = omap2430_dt_clk_init;
	rate_table = omap2430_rate_table;
}