示例#1
0
__s32 image_clk_init(__u32 sel)
{
	__u32 dram_pll;

	if (sel == 0) {
		h_debe0ahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_DEBE0);
		h_debe0mclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_DEBE0);
		h_debe0dramclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_SDRAM_DEBE0);

		/* NEW OSAL_clk reset */
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe0mclk, RST_INVALID);
#endif
		/* FIX CONNECT TO DRAM PLL */
		OSAL_CCMU_SetMclkSrc(h_debe0mclk, AW_SYS_CLK_PLL5P);

		dram_pll = OSAL_CCMU_GetSrcFreq(AW_SYS_CLK_PLL5P);
		if (dram_pll < 300000000)
			OSAL_CCMU_SetMclkDiv(h_debe0mclk, 1);
		else
			OSAL_CCMU_SetMclkDiv(h_debe0mclk, 2);

		OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_ON);
#ifdef CONFIG_ARCH_SUN4I
		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_OFF);
#endif
		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_ON);

		g_clk_status |= (CLK_DEBE0_AHB_ON | CLK_DEBE0_MOD_ON);
	} else if (sel == 1) {
		h_debe1ahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_DEBE1);
		h_debe1mclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_DEBE1);
		h_debe1dramclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_SDRAM_DEBE1);
#ifdef RESET_OSAL

		OSAL_CCMU_MclkReset(h_debe1mclk, RST_INVALID);
#endif
		/* FIX CONNECT TO DRAM PLL */
		OSAL_CCMU_SetMclkSrc(h_debe1mclk, AW_SYS_CLK_PLL5P);

		dram_pll = OSAL_CCMU_GetSrcFreq(AW_SYS_CLK_PLL5P);
		if (dram_pll < 300000000)
			OSAL_CCMU_SetMclkDiv(h_debe1mclk, 1);
		else
			OSAL_CCMU_SetMclkDiv(h_debe1mclk, 2);

		OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_ON);
#ifdef CONFIG_ARCH_SUN4I
		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_OFF);
#endif
		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_ON);

		g_clk_status |= (CLK_DEBE1_AHB_ON | CLK_DEBE1_MOD_ON);
	}
	return DIS_SUCCESS;
}
__s32 lcdc_clk_init(__u32 screen_id)
{
	DE_INF("lcd %d clk init\n", screen_id);
	if(screen_id == 0) {
		h_lcd0ahbclk   = OSAL_CCMU_OpenMclk(AHB_CLK_LCD0);
		h_lcd0ch0mclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH0);
		#if (!defined CONFIG_ARCH_SUN7I)
		h_lcd0ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH1);
		#else
		h_lcd0ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH1_S1);
		h_lcd0ch1mclk2 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH1_S2);
		#endif
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd0ch0mclk0, RST_INVAILD);
#endif
		OSAL_CCMU_SetMclkSrc(h_lcd0ch0mclk0, CLK_LCD_CH0_SRC);
		OSAL_CCMU_SetMclkSrc(h_lcd0ch1mclk1, CLK_LCD_CH1_SRC);
		OSAL_CCMU_SetMclkDiv(h_lcd0ch1mclk1, 10);
		OSAL_CCMU_SetMclkDiv(h_lcd0ch1mclk2, 10);


		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_OFF);
	}	else if(screen_id == 1)	{
		h_lcd1ahbclk   = OSAL_CCMU_OpenMclk(AHB_CLK_LCD1);
		h_lcd1ch0mclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH0);
		#if (!defined CONFIG_ARCH_SUN7I)
		h_lcd1ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH1);
		#else
		h_lcd1ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH1_S1);
		h_lcd1ch1mclk2 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH1_S2);
		#endif
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd1ch0mclk0, RST_INVAILD);
#endif
		OSAL_CCMU_SetMclkSrc(h_lcd1ch0mclk0, CLK_LCD_CH0_SRC);
		OSAL_CCMU_SetMclkSrc(h_lcd1ch1mclk1, CLK_LCD_CH1_SRC);
		OSAL_CCMU_SetMclkDiv(h_lcd1ch1mclk1, 10);
		OSAL_CCMU_SetMclkDiv(h_lcd1ch1mclk2, 10);


		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);
	}
	return DIS_SUCCESS;
}
示例#3
0
__s32 deu_clk_init(__u32 sel)
{
	__u32 pll_freq;
	__u32 mclk_div;

	DE_INF("deu %d clk init\n", sel);
	if(!sel) {
		h_deuahbclk0 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU0);
		h_deudramclk0 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU0);
		h_deumclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU0);


		OSAL_CCMU_SetMclkSrc(h_deumclk0, CLK_FE_SRC);	//FIX CONNECT TO  PLL10
		OSAL_CCMU_SetMclkDiv(h_deumclk0, 1);
		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);
		mclk_div = 1;
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
		OSAL_CCMU_SetMclkDiv(h_deumclk0, mclk_div);

		OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_deudramclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deudramclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_OFF);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_deumclk0, RST_INVAILD);
#endif
	}	else {
		h_deuahbclk1 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU1);
		h_deudramclk1 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU1);
		h_deumclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU1);

		OSAL_CCMU_SetMclkSrc(h_deumclk1, CLK_FE_SRC);	//FIX CONNECT TO PLL9
		OSAL_CCMU_SetMclkDiv(h_deumclk1, 1);
		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);
		mclk_div = 1;
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
		OSAL_CCMU_SetMclkDiv(h_deumclk1, mclk_div);

		OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_deudramclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deudramclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_OFF);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_deumclk1, RST_INVAILD);
#endif
	}
	return DIS_SUCCESS;
}
示例#4
0
__s32 drc_clk_init(__u32 sel)
{
	__u32 pll_freq;
	__u32 mclk_div;

	DE_INF("drc %d clk init\n", sel);
	if(!sel) {
		h_drcahbclk0 = OSAL_CCMU_OpenMclk(AHB_CLK_DRC0);
		h_drcdramclk0 = OSAL_CCMU_OpenMclk(DRAM_CLK_DRC0);
		h_drcmclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDRC0);

		OSAL_CCMU_SetMclkSrc(h_drcmclk0, CLK_BE_SRC);

		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
		mclk_div = 1;
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
		OSAL_CCMU_SetMclkDiv(h_drcmclk0, mclk_div);

		OSAL_CCMU_MclkOnOff(h_drcahbclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcahbclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_drcdramclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcdramclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_drcmclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcmclk0, CLK_OFF);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_drcmclk0, RST_INVAILD);
#endif
	}	else {
		h_drcahbclk1 = OSAL_CCMU_OpenMclk(AHB_CLK_DRC1);
		h_drcdramclk1 = OSAL_CCMU_OpenMclk(DRAM_CLK_DRC1);
		h_drcmclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDRC1);

		OSAL_CCMU_SetMclkSrc(h_drcmclk1, CLK_BE_SRC);

		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
		mclk_div = 1;
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
		OSAL_CCMU_SetMclkDiv(h_drcmclk1, mclk_div);

		OSAL_CCMU_MclkOnOff(h_drcahbclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcahbclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_drcdramclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcdramclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_drcmclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcmclk1, CLK_OFF);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_drcmclk1, RST_INVAILD);
#endif
	}
	return DIS_SUCCESS;
}
__s32 lcdc_clk_init(__u32 sel)
{
	if(sel == 0)
	{
		h_lcd0ahbclk   = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_LCD0);
		h_lcd0ch0mclk0 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD0CH0);
		h_lcd0ch1mclk1 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD0CH1_S1);
		h_lcd0ch1mclk2 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD0CH1_S2);
	
		OSAL_CCMU_SetMclkSrc(h_lcd0ch0mclk0, AW_SYS_CLK_PLL7);	//Default to Video Pll0
		OSAL_CCMU_SetMclkSrc(h_lcd0ch1mclk1, AW_SYS_CLK_PLL7);	//Default to Video Pll0
		//OSAL_CCMU_SetMclkSrc(h_lcd0ch1mclk2, AW_SYS_CLK_PLL7);	//Default to Video Pll0
		OSAL_CCMU_SetMclkDiv(h_lcd0ch1mclk2, 10);
		OSAL_CCMU_SetMclkDiv(h_lcd0ch1mclk1, 10);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd0ch0mclk0, RST_INVAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_OFF);

		g_clk_status |= CLK_LCDC0_AHB_ON;
	}
	else if(sel == 1)
	{
		h_lcd1ahbclk   = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_LCD1);
		h_lcd1ch0mclk0 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD1CH0);
		h_lcd1ch1mclk1 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD1CH1_S1);
		h_lcd1ch1mclk2 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD1CH1_S2);

		OSAL_CCMU_SetMclkSrc(h_lcd1ch0mclk0, AW_SYS_CLK_PLL7);	//Default to Video Pll0
		OSAL_CCMU_SetMclkSrc(h_lcd1ch1mclk1, AW_SYS_CLK_PLL7);	//Default to Video Pll0
		//OSAL_CCMU_SetMclkSrc(h_lcd1ch1mclk2, AW_SYS_CLK_PLL7);	//Default to Video Pll0
		OSAL_CCMU_SetMclkDiv(h_lcd1ch1mclk2, 10);
		OSAL_CCMU_SetMclkDiv(h_lcd1ch1mclk1, 10);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd1ch0mclk0, RST_INVAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk2, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk2, CLK_OFF);

		g_clk_status |= CLK_LCDC1_AHB_ON;
	}
	return DIS_SUCCESS; 
	
}
示例#6
0
__s32 deu_clk_init(__u32 sel)
{
    __u32 pll_freq;
    __u32 mclk_div;

    DE_INF("deu %d clk init\n", sel);
	if(!sel)
	{
	    h_deuahbclk0 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU0);
	    h_deudramclk0 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU0);
	    h_deumclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU0);

		OSAL_CCMU_MclkReset(h_deumclk0, RST_INVAILD);
		
		OSAL_CCMU_SetMclkSrc(h_deumclk0, SYS_CLK_PLL10);	//FIX CONNECT TO  PLL10
		OSAL_CCMU_SetMclkDiv(h_deumclk0, 1);
        pll_freq = OSAL_CCMU_GetSrcFreq(SYS_CLK_PLL10);
        mclk_div = 1;
        while((pll_freq / mclk_div) > 300000000)
        {
            mclk_div ++;
        }
		OSAL_CCMU_SetMclkDiv(h_deumclk0, mclk_div);
		
		OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_ON);

		g_deu_clk_status  |= (CLK_DEU0_AHB_ON | CLK_DEU0_MOD_ON);
	}
	else
	{
		h_deuahbclk1 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU1);
	    h_deudramclk1 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU1);
	    h_deumclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU1);

		OSAL_CCMU_MclkReset(h_deumclk1, RST_INVAILD);
		OSAL_CCMU_SetMclkSrc(h_deumclk1, SYS_CLK_PLL10);	//FIX CONNECT TO PLL10
		OSAL_CCMU_SetMclkDiv(h_deumclk1, 1);
        pll_freq = OSAL_CCMU_GetSrcFreq(SYS_CLK_PLL10);
        mclk_div = 1;
        while((pll_freq / mclk_div) > 300000000)
        {
            mclk_div ++;
        }
		OSAL_CCMU_SetMclkDiv(h_deumclk1, mclk_div);
		
		OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_ON);

		g_deu_clk_status  |= (CLK_DEU1_AHB_ON | CLK_DEU1_MOD_ON);
	}
	return DIS_SUCCESS;
}
示例#7
0
__s32 scaler_clk_init(__u32 sel)
{
	if(sel == 0)
	{
		h_defe0ahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_DEFE0);
		h_defe0dramclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_SDRAM_DEFE0);
		h_defe0mclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_DEFE0);
#ifdef RESET_OSAL
		
		OSAL_CCMU_MclkReset(h_defe0mclk, RST_INVAILD);
#endif
	
		OSAL_CCMU_SetMclkSrc(h_defe0mclk, AW_SYS_CLK_PLL7);	//FIX CONNECT TO VIDEO PLL1
		OSAL_CCMU_SetMclkDiv(h_defe0mclk, 1);
	
		OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_OFF);

		g_clk_status |= CLK_DEFE0_AHB_ON;
	}
	else if(sel == 1)
	{
		h_defe1ahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_DEFE1);
		h_defe1dramclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_SDRAM_DEFE1);
		h_defe1mclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_DEFE1);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_defe1mclk, RST_INVAILD);
#endif	
		OSAL_CCMU_SetMclkSrc(h_defe1mclk, AW_SYS_CLK_PLL7);	//FIX CONNECT TO VIDEO PLL1
		OSAL_CCMU_SetMclkDiv(h_defe1mclk, 1);
	
		OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_OFF);

		g_clk_status |= CLK_DEFE1_AHB_ON;
	}	
		return DIS_SUCCESS; 
}
__s32 dsi_clk_init(void)
{
	DE_INF("dsi clk init\n");
	h_dsiahbclk= OSAL_CCMU_OpenMclk(AHB_CLK_MIPIDSI);
	h_dsimclk_s= OSAL_CCMU_OpenMclk(MOD_CLK_MIPIDSIS);
	h_dsimclk_p = OSAL_CCMU_OpenMclk(MOD_CLK_MIPIDSIP);

	OSAL_CCMU_SetMclkSrc(h_dsimclk_s, CLK_DSI_SRC);
	OSAL_CCMU_SetMclkDiv(h_dsimclk_s, 1);
	OSAL_CCMU_SetMclkSrc(h_dsimclk_p, CLK_DSI_SRC);
	OSAL_CCMU_SetMclkDiv(h_dsimclk_p, 2);

	OSAL_CCMU_MclkOnOff(h_dsimclk_s, CLK_ON);
	OSAL_CCMU_MclkOnOff(h_dsimclk_s, CLK_OFF);
	OSAL_CCMU_MclkOnOff(h_dsimclk_p, CLK_ON);
	OSAL_CCMU_MclkOnOff(h_dsimclk_p, CLK_OFF);
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_dsimclk_s, RST_INVAILD);
	OSAL_CCMU_MclkReset(h_dsimclk_p, RST_INVAILD);
#endif

	return DIS_SUCCESS;
}
__s32 hdmi_clk_init(void)
{
	h_hdmiahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_HDMI);
	h_hdmimclk   = OSAL_CCMU_OpenMclk(AW_MOD_CLK_HDMI);
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_hdmimclk, RST_INVAILD);
#endif	
	OSAL_CCMU_SetMclkSrc(h_hdmimclk, AW_SYS_CLK_PLL7);
	OSAL_CCMU_SetMclkDiv(h_hdmimclk, 1);

	OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_ON);
	g_clk_status |= CLK_HDMI_AHB_ON;
        hdmi_clk_on();
	return DIS_SUCCESS;
}
示例#10
0
__s32 hdmi_clk_init(void)
{
	DE_INF("hdmi clk init\n");
	h_hdmiahbclk = OSAL_CCMU_OpenMclk(AHB_CLK_HDMI);
	h_hdmimclk   = OSAL_CCMU_OpenMclk(MOD_CLK_HDMI);
	h_hdmimclk_ddc = OSAL_CCMU_OpenMclk(MOD_CLK_HDMI_DDC);
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_hdmimclk, RST_INVAILD);
#endif
	OSAL_CCMU_SetMclkSrc(h_hdmimclk, SYS_CLK_PLL7);
	OSAL_CCMU_SetMclkDiv(h_hdmimclk, 1);

	OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_ON);
	OSAL_CCMU_MclkOnOff(h_hdmimclk_ddc, CLK_ON);
	g_clk_status |= CLK_HDMI_AHB_ON | CLK_HDMI_MOD_DDC_ON;

	return DIS_SUCCESS;
}
示例#11
0
__s32 hdmi_clk_init(void)
{
	h_hdmiahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_HDMI);
	h_hdmimclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_HDMI);
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_hdmimclk, RST_INVALID);
#endif
#ifdef CONFIG_ARCH_SUN4I
	OSAL_CCMU_SetMclkSrc(h_hdmimclk, AW_SYS_CLK_PLL7);
#else
	OSAL_CCMU_SetMclkSrc(h_hdmimclk, AW_SYS_CLK_PLL3);
#endif
	OSAL_CCMU_SetMclkDiv(h_hdmimclk, 1);

	OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_ON);
	g_clk_status |= CLK_HDMI_AHB_ON;

#ifdef CONFIG_ARCH_SUN5I
	OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_ON);
	g_clk_status |= CLK_HDMI_MOD_ON;
#endif

	return DIS_SUCCESS;
}
示例#12
0
//type==1: open ahb clk and image mclk
//type==2: open all clk except ahb clk and image mclk
//type==3: open all clk
__s32 BSP_disp_clk_on(__u32 type)
{
    if(type & 1)
    {
//AHB CLK
    	if((g_clk_status & CLK_DEFE0_AHB_ON) == CLK_DEFE0_AHB_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEFE1_AHB_ON) == CLK_DEFE1_AHB_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE0_AHB_ON) == CLK_DEBE0_AHB_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE1_AHB_ON) == CLK_DEBE1_AHB_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC0_AHB_ON) == CLK_LCDC0_AHB_ON)	//OK?? REG wont clear?
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC1_AHB_ON) == CLK_LCDC1_AHB_ON)	//OK?? REG wont clear?
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_HDMI_AHB_ON) == CLK_HDMI_AHB_ON)	
    	{
    		OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_ON);
    	}
    	//OSAL_CCMU_MclkOnOff(h_tveahbclk, CLK_ON);

//MODULE CLK
    	if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_ON);
    	}
        if((g_clk_status & CLK_HDMI_MOD_ON) == CLK_HDMI_MOD_ON)
        {
                OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_ON);
        }

	}
	
	if(type & 2)
	{
//DRAM CLK
    	if((g_clk_status & CLK_DEFE0_DRAM_ON) == CLK_DEFE0_DRAM_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEFE1_DRAM_ON) == CLK_DEFE1_DRAM_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE0_DRAM_ON) == CLK_DEBE0_DRAM_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE1_DRAM_ON) == CLK_DEBE1_DRAM_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_ON);
    	}
    	
//MODULE CLK
    	if((g_clk_status & CLK_DEFE0_MOD_ON) == CLK_DEFE0_MOD_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEFE1_MOD_ON) == CLK_DEFE1_MOD_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC0_MOD0_ON) == CLK_LCDC0_MOD0_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC0_MOD1_ON) == CLK_LCDC0_MOD1_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);
    		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC1_MOD0_ON) == CLK_LCDC1_MOD0_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC1_MOD1_ON) == CLK_LCDC1_MOD1_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);
    		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk2, CLK_ON);
    	}
    }
    
    if(type == 2)
    {
    	if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)
    	{
    		OSAL_CCMU_SetMclkDiv(h_debe0mclk, 2);
    	}
    	if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)
    	{
    		OSAL_CCMU_SetMclkDiv(h_debe1mclk, 2);
    	}
    }

	return DIS_SUCCESS;
}
示例#13
0
static __s32 disp_pll_set(__u32 sel, __s32 videopll_sel, __u32 pll_freq, __u32 tve_freq, __s32 pre_scale, 
					__u32 lcd_clk_div, __u32 hdmi_freq, __u32 pll_2x, __u32 type)
{
	__u32 videopll;
	__hdle h_lcdmclk0, h_lcdmclk1, h_lcdmclk2;
	__s32 pll_2x_req;
	__u32 lcdmclk1_div, lcdmclk2_div, hdmiclk_div;
	
	if(type == DISP_OUTPUT_TYPE_LCD)	//lcd panel
	{		
	    if(videopll_sel == 2)//sata pll, fix to 960M
	    {
	        videopll = AW_SYS_CLK_PLL7X2;
	    }
	    else//video pll0 or video pll1
	    {
    		pll_2x_req = (pll_freq>381000000)?1:0;
    		if(pll_2x_req)
    		{
    		    pll_freq /= 2;
    		}

	        //in 3M unit
	    	pll_freq = (pll_freq + 1500000)/3000000;
			pll_freq = pll_freq * 3000000;

    		videopll = 	(videopll_sel == 0)?AW_SYS_CLK_PLL3:AW_SYS_CLK_PLL7;	
    		OSAL_CCMU_SetSrcFreq(videopll,pll_freq);
    		if(pll_2x_req)
    		{
                videopll = (videopll == AW_SYS_CLK_PLL3)?AW_SYS_CLK_PLL3X2:AW_SYS_CLK_PLL7X2;
    		}
		}
		
		if(gpanel_info[sel].tcon_index == 0)	//tcon0 drive lcd panel
		{
			h_lcdmclk0 = (sel == 0)?h_lcd0ch0mclk0 : h_lcd1ch0mclk0;
			OSAL_CCMU_SetMclkSrc(h_lcdmclk0, videopll);
			TCON0_set_dclk_div(sel,lcd_clk_div);
		}
		else									//tcon1 drive lcd panel
		{
			h_lcdmclk1 = (sel == 0)?h_lcd0ch1mclk1 : h_lcd1ch1mclk1;
			h_lcdmclk2 = (sel == 0)?h_lcd0ch1mclk2 : h_lcd1ch1mclk2;
			OSAL_CCMU_SetMclkSrc(h_lcdmclk2, videopll);
			OSAL_CCMU_SetMclkSrc(h_lcdmclk1, videopll);
			OSAL_CCMU_SetMclkDiv(h_lcdmclk2, lcd_clk_div);
			OSAL_CCMU_SetMclkDiv(h_lcdmclk1, lcd_clk_div);
		}
	}
	else //tv/vga/hdmi
	{	    
	    __u32 pll_freq_used;
	    
		pll_2x_req = pll_2x;
		videopll = 	(videopll_sel == 0)?AW_SYS_CLK_PLL3:AW_SYS_CLK_PLL7;	
		OSAL_CCMU_SetSrcFreq(videopll,pll_freq);	//Set related Video Pll Frequency

		videopll = 	(videopll_sel == 0)?
			   		((pll_2x_req)?AW_SYS_CLK_PLL3X2: AW_SYS_CLK_PLL3):
					((pll_2x_req)?AW_SYS_CLK_PLL7X2: AW_SYS_CLK_PLL7);	

		pll_freq_used = pll_freq * (pll_2x_req + 1);

		lcdmclk2_div = (pll_freq_used + (tve_freq / 2)) / tve_freq;
		lcdmclk1_div = lcdmclk2_div*pre_scale;
		hdmiclk_div = (pll_freq_used + (hdmi_freq / 2)) / hdmi_freq;
		
		h_lcdmclk1 = (sel == 0)?h_lcd0ch1mclk1 : h_lcd1ch1mclk1;
		h_lcdmclk2 = (sel == 0)?h_lcd0ch1mclk2 : h_lcd1ch1mclk2;
		OSAL_CCMU_SetMclkSrc(h_lcdmclk2, videopll);
		OSAL_CCMU_SetMclkSrc(h_lcdmclk1, videopll);
		OSAL_CCMU_SetMclkDiv(h_lcdmclk2, lcdmclk2_div);
		OSAL_CCMU_SetMclkDiv(h_lcdmclk1, lcdmclk1_div);

		if(type == DISP_OUTPUT_TYPE_HDMI && gdisp.screen[sel].hdmi_index == 0)	//hdmi internal mode
		{
			OSAL_CCMU_SetMclkSrc(h_hdmimclk, videopll);
			OSAL_CCMU_SetMclkDiv(h_hdmimclk, hdmiclk_div);

            if(gdisp.init_para.hdmi_set_pll != NULL)
            {
    			if((videopll == AW_SYS_CLK_PLL3X2) || (videopll == AW_SYS_CLK_PLL3))
    			{
    			    gdisp.init_para.hdmi_set_pll(0, pll_freq);
    			}
    			else
    			{
    			    gdisp.init_para.hdmi_set_pll(1, pll_freq);
    			}
			}
			else
			{
			    DE_WRN("gdisp.init_para.hdmi_set_pll is NULL\n");
			}
		}
	}

	return DIS_SUCCESS;
}
示例#14
0
static __s32 disp_pll_set(__u32 screen_id, __s32 videopll_sel, __u32 pll_freq, __u32 tve_freq, __s32 pre_scale,
					__u32 lcd_clk_div, __u32 hdmi_freq, __u32 pll_2x, __u32 type)
{
	__u32 videopll;
	__hdle h_lcdmclk0, h_lcdmclk1;
	__s32 pll_2x_req;
	__u32 lcdmclk1_div, hdmiclk_div;

	if(type == DISP_OUTPUT_TYPE_LCD) {
		/* mipi pll */
		if(videopll_sel == 2)	{
			videopll = SYS_CLK_MIPIPLL;
			//pll_freq = ((pll_freq + 12000000)/ 24000000) * 24000000;
			//OSAL_CCMU_SetSrcFreq(AW_SYS_CLK_PLL6, pll_freq);
		}
		/* video pll0 or video pll1 */
		else {
			pll_2x_req = (pll_freq>600000000)?1:0;
			if(pll_2x_req) {
				pll_freq /= 2;
			}

			//in 3M unit
			pll_freq = (pll_freq + 1500000)/3000000;
			pll_freq = pll_freq * 3000000;

			videopll = 	(videopll_sel == 0)?SYS_CLK_PLL3:SYS_CLK_PLL7;
			OSAL_CCMU_SetSrcFreq(videopll,pll_freq);
			if(pll_2x_req) {
			  videopll = (videopll == SYS_CLK_PLL3)?SYS_CLK_PLL3X2:SYS_CLK_PLL7X2;
			}
		}

		if(gpanel_info[screen_id].tcon_index == 0)	{
			h_lcdmclk0 = (screen_id == 0)?h_lcd0ch0mclk0 : h_lcd1ch0mclk0;
			OSAL_CCMU_SetMclkSrc(h_lcdmclk0, videopll);
			tcon0_set_dclk_div(screen_id,lcd_clk_div);
			/* todo?  --dphy clk fix to 297/2M */
			if(gpanel_info[screen_id].lcd_if == LCD_IF_DSI)	{
			  OSAL_CCMU_SetMclkSrc(h_dsimclk_s, videopll);
			  OSAL_CCMU_SetMclkDiv(h_dsimclk_s, 1);
			  OSAL_CCMU_SetMclkSrc(h_dsimclk_p, SYS_CLK_PLL7);
			  OSAL_CCMU_SetMclkDiv(h_dsimclk_p, 1);
			}
		}
		else {
			h_lcdmclk1 = (screen_id == 0)?h_lcd0ch1mclk1 : h_lcd1ch1mclk1;
			OSAL_CCMU_SetMclkSrc(h_lcdmclk1, videopll);
			OSAL_CCMU_SetMclkDiv(h_lcdmclk1, lcd_clk_div);
		}
	}
	/*  tv/vga/hdmi */
	else {
		__u32 pll_freq_used;

		pll_2x_req = pll_2x;
		videopll = 	(videopll_sel == 0)?SYS_CLK_PLL3:SYS_CLK_PLL7;
		OSAL_CCMU_SetSrcFreq(videopll,pll_freq);	//Set related Video Pll Frequency

		videopll = 	(videopll_sel == 0)?
		((pll_2x_req)?SYS_CLK_PLL3X2: SYS_CLK_PLL3):
		((pll_2x_req)?SYS_CLK_PLL7X2: SYS_CLK_PLL7);

		pll_freq_used = pll_freq * (pll_2x_req + 1);

		lcdmclk1_div = (pll_freq_used + (tve_freq / 2)) / tve_freq;
		hdmiclk_div = (pll_freq_used + (hdmi_freq / 2)) / hdmi_freq;

		h_lcdmclk1 = (screen_id == 0)?h_lcd0ch1mclk1 : h_lcd1ch1mclk1;
		OSAL_CCMU_SetMclkSrc(h_lcdmclk1, videopll);
		OSAL_CCMU_SetMclkDiv(h_lcdmclk1, lcdmclk1_div);

		/* hdmi internal mode */
		if(type == DISP_OUTPUT_TYPE_HDMI && gdisp.screen[screen_id].hdmi_index == 0) {
			OSAL_CCMU_SetMclkSrc(h_hdmimclk, videopll);
			OSAL_CCMU_SetMclkDiv(h_hdmimclk, hdmiclk_div);

			if(gdisp.init_para.hdmi_set_pll != NULL) {
				if((videopll == SYS_CLK_PLL3X2) || (videopll == SYS_CLK_PLL3)) {
					gdisp.init_para.hdmi_set_pll(0, pll_freq);
				}	else {
					gdisp.init_para.hdmi_set_pll(1, pll_freq);
				}
			}	else {
				DE_WRN("gdisp.init_para.hdmi_set_pll is NULL\n");
			}
		}
	}

	return DIS_SUCCESS;
}
示例#15
0
//type==1: open ahb clk and image mclk
//type==2: open all clk except ahb clk and image mclk
//type==3: open all clk
__s32 bsp_disp_clk_on(__u32 type)
{
	if(type & 1) {
		/* AHB CLK */
		if((g_clk_status & CLK_DEFE0_AHB_ON) == CLK_DEFE0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEFE1_AHB_ON) == CLK_DEFE1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE0_AHB_ON) == CLK_DEBE0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE1_AHB_ON) == CLK_DEBE1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC0_AHB_ON) == CLK_LCDC0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC1_AHB_ON) == CLK_LCDC1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_HDMI_AHB_ON) == CLK_HDMI_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_DSI_AHB_ON) == CLK_DSI_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_dsiahbclk, CLK_ON);
		}
		//OSAL_CCMU_MclkOnOff(h_tveahbclk, CLK_ON);

		/* MODULE CLK */
		if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_ON);
		}
	}

	if(type & 2) {
		/* DRAM CLK */
		if((g_clk_status & CLK_DEFE0_DRAM_ON) == CLK_DEFE0_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEFE1_DRAM_ON) == CLK_DEFE1_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE0_DRAM_ON) == CLK_DEBE0_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE1_DRAM_ON) == CLK_DEBE1_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_ON);
		}

		/* MODULE CLK */
		if((g_clk_status & CLK_DEFE0_MOD_ON) == CLK_DEFE0_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEFE1_MOD_ON) == CLK_DEFE1_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC0_MOD0_ON) == CLK_LCDC0_MOD0_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC0_MOD1_ON) == CLK_LCDC0_MOD1_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC1_MOD0_ON) == CLK_LCDC1_MOD0_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC1_MOD1_ON) == CLK_LCDC1_MOD1_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);
		}
		if((g_clk_status & CLK_HDMI_MOD_ON) == CLK_HDMI_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_ON);
		}
		if((g_clk_status & CLK_HDMI_MOD_DDC_ON) == CLK_HDMI_MOD_DDC_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmimclk_ddc, CLK_ON);
		}
		if((g_clk_status & CLK_DSI_MOD_ON) == CLK_DSI_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_dsimclk_s, CLK_ON);
			OSAL_CCMU_MclkOnOff(h_dsimclk_p, CLK_ON);
		}
	}

	if(type == 2)	{
		if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)	{
			__u32 pll_freq;
			__u32 mclk_div;

			pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
			mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
			while((pll_freq / mclk_div) > 130000000) {
				mclk_div ++;
			}
#else
			while((pll_freq / mclk_div) > 300000000) {
				mclk_div ++;
			}
#endif
			OSAL_CCMU_SetMclkDiv(h_debe0mclk, mclk_div);
		}
		if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON) {
			__u32 pll_freq;
			__u32 mclk_div;

			pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
			mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
			while((pll_freq / mclk_div) > 130000000) {
				mclk_div ++;
			}
#else
			while((pll_freq / mclk_div) > 300000000) {
				mclk_div ++;
			}
#endif
			OSAL_CCMU_SetMclkDiv(h_debe1mclk, mclk_div);
		}
	}

	return DIS_SUCCESS;
}
示例#16
0
//type==1: close ahb clk and image mclk
//type==2: close all clk except ahb clk and image mclk
//type==3: close all clk
__s32 bsp_disp_clk_off(__u32 type)
{
	if(type & 1) {
		/* AHB CLK */
		if((g_clk_status & CLK_DEFE0_AHB_ON) == CLK_DEFE0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEFE1_AHB_ON) == CLK_DEFE1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE0_AHB_ON) == CLK_DEBE0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE1_AHB_ON) == CLK_DEBE1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC0_AHB_ON) == CLK_LCDC0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC1_AHB_ON) == CLK_LCDC1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_HDMI_AHB_ON) == CLK_HDMI_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DSI_AHB_ON) == CLK_DSI_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_dsiahbclk, CLK_OFF);
		}
		//OSAL_CCMU_MclkOnOff(h_tveahbclk, CLK_OFF);

		/* MODULE CLK */
		if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_OFF);
		}
	}

	if(type & 2) {
		/* DRAM CLK */
		if((g_clk_status & CLK_DEFE0_DRAM_ON) == CLK_DEFE0_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEFE1_DRAM_ON) == CLK_DEFE1_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE0_DRAM_ON) == CLK_DEBE0_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE1_DRAM_ON) == CLK_DEBE1_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_OFF);
		}

		/* MODULE CLK */
		if((g_clk_status & CLK_DEFE0_MOD_ON) == CLK_DEFE0_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEFE1_MOD_ON) == CLK_DEFE1_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC0_MOD0_ON) == CLK_LCDC0_MOD0_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC0_MOD1_ON) == CLK_LCDC0_MOD1_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC1_MOD0_ON) == CLK_LCDC1_MOD0_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC1_MOD1_ON) == CLK_LCDC1_MOD1_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);
		}
		if((g_clk_status & CLK_HDMI_MOD_ON) == CLK_HDMI_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_OFF);
		}
		if((g_clk_status & CLK_HDMI_MOD_DDC_ON) == CLK_HDMI_MOD_DDC_ON) {
			OSAL_CCMU_MclkOnOff(h_hdmimclk_ddc, CLK_OFF);
		}
		if((g_clk_status & CLK_DSI_MOD_ON) == CLK_DSI_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_dsimclk_s, CLK_OFF);
			OSAL_CCMU_MclkOnOff(h_dsimclk_p, CLK_OFF);
		}
	}

	if(type == 2)	{
		if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)	{
			OSAL_CCMU_SetMclkDiv(h_debe0mclk, 16);
		}
		if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)	{
			OSAL_CCMU_SetMclkDiv(h_debe1mclk, 16);
		}
	}

	return DIS_SUCCESS;
}
示例#17
0
__s32 image_clk_init(__u32 screen_id)
{
	__u32 pll_freq;
	__u32 mclk_div;

	DE_INF("image%d clk_init\n", screen_id);
	if(screen_id == 0) {
		h_debe0ahbclk = OSAL_CCMU_OpenMclk(AHB_CLK_DEBE0);
		h_debe0mclk = OSAL_CCMU_OpenMclk(MOD_CLK_DEBE0);
		h_debe0dramclk = OSAL_CCMU_OpenMclk(DRAM_CLK_DEBE0);

#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe0mclk, RST_INVAILD);
#endif
		OSAL_CCMU_SetMclkSrc(h_debe0mclk, CLK_BE_SRC);

		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
		mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
		while((pll_freq / mclk_div) > 130000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif
		OSAL_CCMU_SetMclkDiv(h_debe0mclk, mclk_div);

		OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_OFF);

		g_clk_status |= (CLK_DEBE0_AHB_ON | CLK_DEBE0_MOD_ON);
	}	else if(screen_id == 1)	{
		h_debe1ahbclk = OSAL_CCMU_OpenMclk(AHB_CLK_DEBE1);
		h_debe1mclk = OSAL_CCMU_OpenMclk(MOD_CLK_DEBE1);
		h_debe1dramclk = OSAL_CCMU_OpenMclk(DRAM_CLK_DEBE1);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe1mclk, RST_INVAILD);
#endif
		OSAL_CCMU_SetMclkSrc(h_debe1mclk, CLK_BE_SRC);//

		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
		mclk_div = 1;
#if defined(CONFIG_ARCH_SUN8IW3P1)
		while((pll_freq / mclk_div) > 130000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif
		OSAL_CCMU_SetMclkDiv(h_debe1mclk, mclk_div);

		OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_OFF);

		g_clk_status |= (CLK_DEBE1_AHB_ON | CLK_DEBE1_MOD_ON);
	}
	return DIS_SUCCESS;
}
示例#18
0
__s32 scaler_clk_init(__u32 scaler_id)
{
	__u32 pll_freq;
	__u32 mclk_div;

	DE_INF("scaler %d clk init\n", scaler_id);
	if(scaler_id == 0) {
		h_defe0ahbclk = OSAL_CCMU_OpenMclk(AHB_CLK_DEFE0);
		h_defe0dramclk = OSAL_CCMU_OpenMclk(DRAM_CLK_DEFE0);
		h_defe0mclk = OSAL_CCMU_OpenMclk(MOD_CLK_DEFE0);

		OSAL_CCMU_SetMclkSrc(h_defe0mclk, CLK_FE_SRC);
		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);
		mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif

		OSAL_CCMU_SetMclkDiv(h_defe0mclk, mclk_div);

		OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_OFF);
#ifdef RESET_OSAL
		//OSAL_CCMU_MclkReset(h_defe0mclk, RST_INVAILD);
#endif
	}	else if(scaler_id == 1)	{
		h_defe1ahbclk = OSAL_CCMU_OpenMclk(AHB_CLK_DEFE1);
		h_defe1dramclk = OSAL_CCMU_OpenMclk(DRAM_CLK_DEFE1);
		h_defe1mclk = OSAL_CCMU_OpenMclk(MOD_CLK_DEFE1);

		OSAL_CCMU_SetMclkSrc(h_defe1mclk, CLK_FE_SRC);
		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);
		mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif

		OSAL_CCMU_SetMclkDiv(h_defe1mclk, mclk_div);

		OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_OFF);
#ifdef RESET_OSAL
		//OSAL_CCMU_MclkReset(h_defe1mclk, RST_INVAILD);
#endif
	}
	return DIS_SUCCESS;
}