//! Initialize the timing sytsem
void init_timing() {
// Open up the core timer at our 1ms rate
OpenCoreTimer(CORE_TICK_RATE);
// set up the core timer interrupt with a prioirty of 2 and zero sub-priority
mConfigIntCoreTimer((CT_INT_ON | CT_INT_PRIOR_2 | CT_INT_SUB_PRIOR_0));
}
//************************************************************************
void init()
{
#ifdef _ENABLE_PIC_RTC_
// Configure the device for maximum performance but do not change the PBDIV
// Given the options, this function will change the flash wait states, RAM
// wait state and enable prefetch cache but will not change the PBDIV.
// The PBDIV value is already set via the pragma FPBDIV option above..
__PIC32_pbClk = SYSTEMConfig(F_CPU, SYS_CFG_WAIT_STATES | SYS_CFG_PCACHE);
#else
__PIC32_pbClk = SYSTEMConfigPerformance(F_CPU);
#endif
OpenCoreTimer(CORE_TICK_RATE);
// set up the core timer interrupt with a prioirty of 2 and zero sub-priority
mConfigIntCoreTimer((CT_INT_ON | CT_INT_PRIOR_2 | CT_INT_SUB_PRIOR_0));
// enable multi-vector interrupts
INTEnableSystemMultiVectoredInt();
#ifdef _ENABLE_PIC_RTC_
RtccInit(); // init the RTCC
// while(RtccGetClkStat() != RTCC_CLK_ON); // wait for the SOSC to be actually running and RTCC to have its clock source
// could wait here at most 32ms
delay(50);
// time is MSb: hour, min, sec, rsvd. date is MSb: year, mon, mday, wday.
RtccOpen(0x10073000, 0x11010901, 0);
RtccSetTimeDate(0x10073000, 0x10101701);
// please note that the rsvd field has to be 0 in the time field!
#endif
//* as per [email protected], Jan 7, 2011
//* Disable the JTAG interface.
DDPCONbits.JTAGEN = 0;
#if defined (_BOARD_MEGA_)
//* Turn Secondary oscillator off
//* this is only needed on the mega board because the mega uses secondary ocsilator pins
//* as general I/O
{
unsigned int dma_status;
unsigned int int_status;
mSYSTEMUnlock(int_status, dma_status);
OSCCONCLR = _OSCCON_SOSCEN_MASK;
mSYSTEMLock(int_status, dma_status);
}
#endif
}
void DelayMs(WORD delay) {
unsigned int int_status;
while (delay--) {
int_status = INTDisableInterrupts();
OpenCoreTimer(500000 / 2000);
INTRestoreInterrupts(int_status);
mCTClearIntFlag();
while (!mCTGetIntFlag());
}
mCTClearIntFlag();
}
void DelayMs(WORD delay)
{
unsigned int int_status;
while( delay-- )
{
OpenCoreTimer(GetSystemClock() / 2000);
mConfigIntCoreTimer((CT_INT_ON | CT_INT_PRIOR_2 | CT_INT_SUB_PRIOR_0));
while(!dflag);
dflag=0;
}
mDisableIntCoreTimer();
}
/*********************************************************************
* Function: void T1Handler(void)
*
* PreCondition:
*
* Input: None
*
* Output: None
*
* Side Effects:
*
* Overview: FatFs requires a 1ms tick timer to aid
* with low level function timinng
*
* Note:
********************************************************************/
void __attribute__((interrupt(ipl1), vector(_CORE_TIMER_VECTOR))) T1Handler(void)
{
//static const BYTE dom[12] = {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
//static int div1k;
//BYTE n;
// clear the interrupt flag
mCTClearIntFlag();
OpenCoreTimer(FOSC/2000);
//Timer++;
disk_timerproc(); // call the low level disk IO timer functions
}
void delayMs(WORD delay)
{
unsigned int int_status;
while (delay--)
{
//int_status = INTDisableInterrupts();
OpenCoreTimer(GetSystemClock() / 2000);
//INTRestoreInterrupts(int_status);
mCTClearIntFlag();
while (!mCTGetIntFlag());
}
mCTClearIntFlag();
}
void DelayMs(WORD time)
{
while(time--)
{
unsigned int int_status;
int_status = INTDisableInterrupts();
OpenCoreTimer(GetSystemClock() / 2000); // core timer is at 1/2 system clock
INTRestoreInterrupts(int_status);
mCTClearIntFlag();
while(!mCTGetIntFlag());
}
mCTClearIntFlag();
}
void SDCARD_Initialize(void)
{
// Set up Timer 1 to generate interrupts at 1kHz
// this is used to drive the underlying disk io system
OpenCoreTimer(FOSC/ 2000);
// set up the timer interrupt with a priority of 1
mConfigIntCoreTimer(CT_INT_ON | CT_INT_PRIOR_1);
_SetChipSelect(FALSE);
fsMounted = FALSE;
_currentFileInfo.lfname = lfn;
_currentFileInfo.lfsize = sizeof(lfn);
// Setup the I/O
SDSetCDDirection(); // CD as input
SDSetWEDirection(); // WE as input
//SDCARD_Mount();
}
void Tmr_Init (void)
{
OpenCoreTimer(BSP_TMR_RELOAD); // Initialize the Count and Compare registers
mConfigIntCoreTimer((CT_INT_ON | CT_INT_PRIOR_3)); // Enable the core timer's interrupt
}
void InitApp(void)
{
// PORT A is all f****d because of JTAG. Input only on A0 and A1 it seems...
// Disable JTAG so we can use A4 and A5 for gpio (and maybe A0-A3 too?)
DDPCONbits.JTAGEN = 0;
// Set GPIO pin functionality:
// ===========================
// Note: how to set pins:
// TRIS*CLR -> clears a pin/bit in the * port
// TRIS*SET -> sets a pin/bit in the * port
// TRIS*INV -> inverts a pin/bit in the * port
// Note: UBW32 pin meaning:
// Set the LED's on the UBW32 as outputs:
// RE0 -> yellow
// RE1 -> red
// RE2 -> white
// RE3 -> green
//
// RE6 -> PRG button
// RE7 -> USER button
// Cleared pins (set to zero) are configured as outputs.
// This is the hard way to clear pins:
// TRISECLR = 0x0F;
// And this is the easy way:
_TRISE0 = 0;
_TRISE1 = 0;
_TRISE2 = 0;
_TRISE3 = 0;
// Set the PRG and USER buttons on the UBW32 as an inputs:
// This is the hard way:
// TRISESET = 0x00C0; // This sets pin RE7 and RE6: 1100 0000 = C0
// This is the easy way:
_TRISE6 = 1; // Set pins, set to one, are configured as inputs
_TRISE7 = 1;
// Set RE9 as an output to test the 44.1kHz interupt timing:
_TRISE9 = 0;
// Set pin RD8 as an output, could be written as TRISD = 0xFEFF;
// but that takes more clock cycles to perform:
// TRISDCLR = 0x0100;
// PWM Intialization:
// ==================
// configure RD0 as output for PWM
// PWM mode, Single output, Active High
// TRISDCLR = 0x00000001;
// OC1R = 0;
// OC1CON = 0x0000;
// OC1RS = 0;
// OC1CON = 0x0006;
// OC1CONSET = 0x8000;
// Set up some interupts:
// ======================
OpenCoreTimer( 0xFFFFFFFF ); // This is needed for the delay functions
// The next line: turn on timer2 | have it use an internal clock source | have it
// use a prescaler of 1:256, and use a period of 0xFFFF or 2^16 cycles
//
// This fires an interrupt at a frequency of (80MHZ/256/65535), or 4.77
// times a second.
// OpenTimer2( T2_ON | T2_SOURCE_INT | T2_PS_1_256, 0xFFFF);
// Set Timer2 to fire at 44.1kHz:
// (80MHz/1/44100) = 1814.059 = 1814 = 0x0716 with a prescaler of 1:1
OpenTimer2( T2_ON | T2_SOURCE_INT | T2_PS_1_1, 0x0716);
/*Configure Multivector Interrupt Mode. Using Single Vector Mode
is expensive from a timing perspective, so most applications
should probably not use a Single Vector Mode*/
INTConfigureSystem(INT_SYSTEM_CONFIG_MULT_VECTOR);
// The next line seems to provide the exact same functionality...
INTEnableSystemMultiVectoredInt();// Use multi-vectored interrupts:
// This statement configured the timer to produce an interrupt with a priority of 2
ConfigIntTimer2( T2_INT_ON | T2_INT_PRIOR_2);
}
int main(void)
{
int i, spi_timeout;
unsigned long counter;
/* Disable JTAG port so we get our I/O pins back */
DDPCONbits.JTAGEN = 0;
/* Enable optimal performance */
SYSTEMConfigPerformance(GetSystemClock());
/* Use 1:1 CPU Core:Peripheral clocks */
OSCSetPBDIV(OSC_PB_DIV_1);
/* configure the core timer roll-over rate */
OpenCoreTimer(CORE_TICK_RATE);
/* set up the core timer interrupt */
mConfigIntCoreTimer((CT_INT_ON | CT_INT_PRIOR_6 | CT_INT_SUB_PRIOR_0));
/* enable multi vector interrupts */
INTConfigureSystem(INT_SYSTEM_CONFIG_MULT_VECTOR);
INTEnableInterrupts();
map_peripherals();
init_io_ports();
configure_pwm();
init_spi();
init_dma();
/* wait until tx buffer is filled up */
while (!SPI2STATbits.SPITBF);
reset_board();
spi_data_ready = 0;
spi_timeout = 0;
counter = 0;
/* enable watchdog */
WDTCONSET = 0x8000;
/* main loop */
while (1) {
if (spi_data_ready) {
spi_data_ready = 0;
/* the first element received is a command string */
switch (rxBuf[0]) {
case 0x5453523E: /* >RST */
reset_board();
break;
case 0x314D433E: /* >CM1 */
stepgen_update_input((const void *)&rxBuf[1]);
stepgen_get_position((void *)&txBuf[1]);
break;
case 0x324D433E: /* >CM2 */
update_outputs(rxBuf[1]);
update_pwm_duty((uint32_t *)&rxBuf[2]);
txBuf[1] = read_inputs();
break;
case 0x4746433E: /* >CFG */
stepgen_update_stepwidth(rxBuf[1]);
update_pwm_period(rxBuf[2]);
stepgen_reset();
break;
case 0x5453543E: /* >TST */
for (i=0; i<BUFSIZE; i++)
txBuf[i] = rxBuf[i] ^ ~0;
break;
}
}
/* if rx buffer is half-full, update the integrity check.
There isn't enough time if we wait for complete transfer */
if (DCH0INTbits.CHDHIF) {
DCH0INTCLR = 1<<4; /* clear flag */
txBuf[0] = rxBuf[0] ^ ~0;
}
/* if rx buffer is full, data from spi bus is ready */
if (DCH0INTbits.CHBCIF) {
DCH0INTCLR = 1<<3; /* clear flag */
spi_data_ready = 1;
spi_timeout = SPI_TIMEOUT;
}
/* reset the board if there is no SPI activity */
if (spi_timeout)
spi_timeout--;
if (spi_timeout == 1) {
DCH0ECONSET=BIT_6; /* abort DMA transfers */
DCH1ECONSET=BIT_6;
init_spi();
init_dma();
reset_board();
/* wait until tx buffer is filled up */
while (!SPI2STATbits.SPITBF);
}
/* blink onboard led */
if (!(counter++ % (spi_timeout ? 0x10000 : 0x40000))) {
LED_TOGGLE;
}
/* keep alive */
WDTCONSET = 0x01;
}
return 0;
}
