/*********************************************************************//**
* @brief Initial for ADC
* + Set bit PCADC
* + Set clock for ADC
* + Set Clock Frequency
* @param[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
* @param[in] rate ADC conversion rate, should be <=200KHz
* @return None
**********************************************************************/
void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate)
{
uint32_t ADCPClk, temp, tmp;
CHECK_PARAM(PARAM_ADCx(ADCx));
CHECK_PARAM(PARAM_ADC_RATE(rate));
// Turn on power and clock
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, ENABLE);
ADCx->ADCR = 0;
//Enable PDN bit
tmp = ADC_CR_PDN;
// Set clock frequency
ADCPClk = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_ADC);
/* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for
* A/D converter, which should be less than or equal to 13MHz.
* A fully conversion requires 65 of these clocks.
* ADC clock = PCLK_ADC0 / (CLKDIV + 1);
* ADC rate = ADC clock / 65;
*/
temp = rate * 65;
temp = (ADCPClk * 2 + temp)/(2 * temp) - 1; //get the round value by fomular: (2*A + B)/(2*B)
tmp |= ADC_CR_CLKDIV(temp);
ADCx->ADCR = tmp;
}
/*********************************************************************//**
* @brief Initial for ADC
* + Set bit PCADC
* + Set clock for ADC
* + Set Clock Frequency
* @param[in] ADCx pointer to LPC_ADCn_Type, should be: LPC_ADC
* @param[in] rate ADC conversion rate, should be <=200KHz
* @param[in] bits_accuracy number of bits accuracy, should be <=10 bits and >=3bits
* @return None
**********************************************************************/
void ADC_Init(LPC_ADCn_Type *ADCx, uint32_t rate, uint8_t bits_accuracy)
{
uint32_t temp, tmpreg, ADCbitrate;
CHECK_PARAM(PARAM_ADCx(ADCx));
CHECK_PARAM(PARAM_ADC_RATE(rate));
// Turn on power and clock
//CGU_ConfigPPWR (CGU_PCONP_PCAD, ENABLE);
ADCx->CR = 0;
//Enable PDN bit
tmpreg = ADC_CR_PDN;
// Set clock frequency
if(ADCx == LPC_ADC0)
temp = CGU_GetPCLKFrequency(CGU_PERIPHERAL_ADC0);
else if(ADCx == LPC_ADC1)
temp = CGU_GetPCLKFrequency(CGU_PERIPHERAL_ADC1);
/* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for
* A/D converter, which should be less than or equal to 13MHz.
* A fully conversion requires (bits_accuracy+1) of these clocks.
* ADC clock = PCLK_ADC0 / (CLKDIV + 1);
* ADC rate = ADC clock / (bits_accuracy+1);
*/
ADCbitrate = (rate * (bits_accuracy+1));
temp = ((temp*2 + ADCbitrate) / (ADCbitrate*2)) - 1;//get the round value by fomular: (2*A + B)/(2*B)
tmpreg |= ADC_CR_CLKDIV(temp) | ADC_CR_BITACC(10 - bits_accuracy);
ADCx->CR = tmpreg;
}
