void PCIServer::scan()
{
Directory *busDir = ZERO, *slotDir = ZERO;
u16 vendorID, deviceID;
/*
* Walk the PCI bus by performing a read
* on the vendor and device ID's for each possible
* bus, slot and function combination.
*/
for (u16 bus = 0; bus < 256; bus++)
{
for (u16 slot = 0; slot < 32; slot++)
{
for (u16 func = 0; func < 8; func++)
{
/* Read ID's. */
vendorID = PCI_READ_WORD(bus, slot, func, PCI_VID);
deviceID = PCI_READ_WORD(bus, slot, func, PCI_DID);
/* Is this a valid device? */
if (vendorID == 0xffff || deviceID == 0xffff)
{
continue;
}
/* Create bus directory, if needed. */
if (!busDir)
{
busDir = new Directory;
rootDir->insert(DirectoryFile, "%x", bus);
insertFileCache(busDir, "%x", bus);
}
/* Make slot directory, if needed. */
if (!slotDir)
{
slotDir = new Directory;
busDir->insert(DirectoryFile, "%x", slot);
insertFileCache(slotDir, "%x/%x", bus, slot);
}
/* Then make & fill the function directory. */
detect(bus, slot, func);
slotDir->insert(DirectoryFile, "%x", func);
}
slotDir = ZERO;
}
busDir = ZERO;
}
}
UINT32 brdGetCpciBrInstance (void *ptr)
{
UINT32 dInstance = 0;
(void)ptr;
UINT8 bTemp;
PCI_PFA pfa;
UINT16 wGpioBase = 0;
UINT32 dTemp = 0;
char buffer[80];
pfa = PCI_MAKE_PFA (0, LPC_BRIDGE_DEV, 0);
wGpioBase = 0xFFFE & PCI_READ_WORD (pfa, GPIO_BASE);
// GPIO_27
dTemp = dIoReadReg (wGpioBase + GP_LVL, REG_32);
if ((dTemp & 0x8000000) == 0x8000000 )
{
dInstance = 3;
}
else
{
dInstance = 2;
}
sprintf(buffer, "cpciBrInstance(): dInstance: %d\n",dInstance);
sysDebugWriteString(buffer);
*((UINT32*)ptr) = dInstance;
return (E__OK);
}
PCIServer::PCIServer(const char *path)
: FileSystem(path), rootDir(new Directory)
{
/* Set a root directory. */
setRoot(rootDir);
/* Open the system log. */
openlog("PCI", LOG_PID, LOG_USER);
/* Detect PCI host controller. */
if (PCI_READ_WORD(0, 0, 0, PCI_VID) == 0xffff ||
PCI_READ_WORD(0, 0, 0, PCI_DID) == 0xffff)
{
syslog(LOG_INFO, "No Host Controller");
exit(EXIT_FAILURE);
}
else
{
syslog(LOG_INFO, "Intel Host Controller");
scan();
}
}
UINT32 brdSMBUSinfo(void *ptr)
{
PCI_PFA pfa;
UINT16 temp;
pfa = PCI_MAKE_PFA (localSMBUS.Bus, localSMBUS.Device, localSMBUS.Function);
localSMBUS.GPIOBase = PCI_READ_DWORD (pfa, localSMBUS.GPIOBaseReg);
localSMBUS.GPIOBase &= ~0x00000001;
temp = PCI_READ_WORD (pfa, 0x04);
PCI_WRITE_WORD (pfa, 0x04, (temp | 0x01));
PCI_WRITE_BYTE (pfa, 0x40, 0x01);
*((SMBUS_INFO**)ptr) = &localSMBUS;
return E__OK;
}
UINT32 brdSkipEthInterface (void *ptr)
{
UINT8 bDev, bFunc;
PCI_PFA pfa;
UINT16 wGpioBase;
UINT32 gtemp,dTemp=0;
UINT32 didVid;
UINT8 bTestHandler;
UINT8 bReqInstance;
pfa = PCI_MAKE_PFA (0, LPC_BRIDGE_DEV, 0);
wGpioBase = 0xFFFE & PCI_READ_WORD (pfa, GPIO_BASE);
// GPIO_27
dTemp = dIoReadReg (wGpioBase + GP_LVL, REG_32);
if ((dTemp & 0x8000000) == 0x8000000)
{
didVid = DIDVID_i350AMx_C;
bReqInstance = 1;
}
else
{
didVid = DIDVID_i350AMx_C;
bReqInstance = 3;
}
bTestHandler = bGetTestHandler();
if ((bTestHandler == TH__LBIT) ||
(bTestHandler == TH__PBIT) ||
(bTestHandler == TH__STH ))
{
bDev = PCI_PFA_DEV((((SkipEthIf_PARAMS*)ptr)->pfa));
bFunc = PCI_PFA_FUNC((((SkipEthIf_PARAMS*)ptr)->pfa));
if ((((SkipEthIf_PARAMS*)ptr)->dDidVid == didVid) &&
(((SkipEthIf_PARAMS*)ptr)->bInstance == bReqInstance) && (bDev == 0) && (bFunc == 0))
return E__OK;
else
return 0x01;
}
else
return E__FAIL;
}
Error PCIRegister::read(IOBuffer *buffer, Size size, Size offset)
{
char buf[32];
ulong value = 0;
Size bytes;
/* Bounds checking. */
if (offset >= this->size)
{
return 0;
}
else
{
/* Read out the register. */
switch (this->size)
{
case 1:
value = PCI_READ_BYTE(bus, slot, func, reg);
break;
case 2:
value = PCI_READ_WORD(bus, slot, func, reg);
break;
default:
value = PCI_READ_LONG(bus, slot, func, reg);
break;
}
itoa(buf, 16, value);
/* How much bytes to copy? */
bytes = strlen(buf) + 1;
if (bytes > size)
bytes = size;
/* Copy the buffers. */
return buffer->write(buf + offset, bytes);
}
}