void radio_reset() {
volatile uint16_t delay;
cc2420_MDMCTRL0_reg_t cc2420_MDMCTRL0_reg;
cc2420_TXCTRL_reg_t cc2420_TXCTRL_reg;
cc2420_RXCTRL1_reg_t cc2420_RXCTRL1_reg;
// set radio VREG pin high
PORT_PIN_RADIO_VREG_HIGH();
for (delay=0xffff;delay>0;delay--); // max. VREG start-up time is 0.6ms
// set radio RESET pin low
PORT_PIN_RADIO_RESET_LOW();
for (delay=0xffff;delay>0;delay--);
// set radio RESET pin high
PORT_PIN_RADIO_RESET_HIGH();
for (delay=0xffff;delay>0;delay--);
// disable address recognition
cc2420_MDMCTRL0_reg.PREAMBLE_LENGTH = 2; // 3 leading zero's (IEEE802.15.4 compliant)
cc2420_MDMCTRL0_reg.AUTOACK = 0;
cc2420_MDMCTRL0_reg.AUTOCRC = 1;
cc2420_MDMCTRL0_reg.CCA_MODE = 3;
cc2420_MDMCTRL0_reg.CCA_HYST = 2;
cc2420_MDMCTRL0_reg.ADR_DECODE = 0; // turn OFF address recognition
cc2420_MDMCTRL0_reg.PAN_COORDINATOR = 0;
cc2420_MDMCTRL0_reg.RESERVED_FRAME_MODE = 1; // accept all frame types
cc2420_MDMCTRL0_reg.reserved_w0 = 0;
radio_spiWriteReg(CC2420_MDMCTRL0_ADDR,
&radio_vars.radioStatusByte,
*(uint16_t*)&cc2420_MDMCTRL0_reg);
// speed up time to TX
cc2420_TXCTRL_reg.PA_LEVEL = 31;// max. TX power (~0dBm)
cc2420_TXCTRL_reg.reserved_w1 = 1;
cc2420_TXCTRL_reg.PA_CURRENT = 3;
cc2420_TXCTRL_reg.TXMIX_CURRENT = 0;
cc2420_TXCTRL_reg.TXMIX_CAP_ARRAY = 0;
cc2420_TXCTRL_reg.TX_TURNAROUND = 0; // faster STXON->SFD timing (128us)
cc2420_TXCTRL_reg.TXMIXBUF_CUR = 2;
radio_spiWriteReg(CC2420_TXCTRL_ADDR,
&radio_vars.radioStatusByte,
*(uint16_t*)&cc2420_TXCTRL_reg);
// apply correction recommended in datasheet
cc2420_RXCTRL1_reg.RXMIX_CURRENT = 2;
cc2420_RXCTRL1_reg.RXMIX_VCM = 1;
cc2420_RXCTRL1_reg.RXMIX_TAIL = 1;
cc2420_RXCTRL1_reg.LNA_CAP_ARRAY = 1;
cc2420_RXCTRL1_reg.MED_HGM = 0;
cc2420_RXCTRL1_reg.HIGH_HGM = 1;
cc2420_RXCTRL1_reg.MED_LOWGAIN = 0;
cc2420_RXCTRL1_reg.LOW_LOWGAIN = 1;
cc2420_RXCTRL1_reg.RXBPF_MIDCUR = 0;
cc2420_RXCTRL1_reg.RXBPF_LOCUR = 1; // use this setting as per datasheet
cc2420_RXCTRL1_reg.reserved_w0 = 0;
radio_spiWriteReg(CC2420_RXCTRL1_ADDR,
&radio_vars.radioStatusByte,
*(uint16_t*)&cc2420_RXCTRL1_reg);
}
void board_init() {
uint16_t i,j;
//enable all port clocks.
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
| SIM_SCGC5_PORTB_MASK
| SIM_SCGC5_PORTC_MASK
| SIM_SCGC5_PORTD_MASK
| SIM_SCGC5_PORTE_MASK );
//init all pins for the radio
//SLPTR
#ifdef TOWER_K20
PORTB_PCR3 = PORT_PCR_MUX(1);// -- PTB3 used as gpio for slptr
GPIOB_PDDR |= RADIO_SLPTR_MASK; //set as output
//RADIO RST -- TODO in the TWR change it to another pin! this is one of the leds.
PORTC_PCR9 = PORT_PCR_MUX(1);// -- PTC9 used as gpio for radio rst
GPIOC_PDDR |= RADIO_RST_MASK; //set as output
#elif OPENMOTE_K20
PORTD_PCR4 = PORT_PCR_MUX(1);// -- PTD4 used as gpio for slptr
GPIOD_PDDR |= RADIO_SLPTR_MASK; //set as output
//RADIO RST
PORTD_PCR5 = PORT_PCR_MUX(1);// -- PTD5 used as gpio for radio rst
GPIOD_PDDR |= RADIO_RST_MASK; //set as output
#endif
PORT_PIN_RADIO_RESET_LOW();//activate the radio.
PORT_PIN_RADIO_SLP_TR_CNTL_LOW();
//ptc5 .. ptc5 is pin 62, irq A
enable_irq(RADIO_EXTERNAL_PORT_IRQ_NUM);//enable the irq. The function is mapped to the vector at position 105 (see manual page 69). The vector is in isr.h
//external port radio_isr.
PORTC_PCR5 = PORT_PCR_MUX(1);// -- PTC5 used as gpio for radio isr through llwu
GPIOC_PDDR &= ~1<<RADIO_ISR_PIN; //set as input ==0
PORTC_PCR5 |= PORT_PCR_IRQC(0x09); //9 interrupt on raising edge. page 249 of the manual.
PORTC_PCR5 |= PORT_PCR_ISF_MASK; //clear any pending interrupt.
llwu_init();//low leakage unit init - to recover from deep sleep
debugpins_init();
leds_init();
bsp_timer_init();
uart_init();
radiotimer_init();
spi_init();
radio_init();
leds_all_off();
leds_sync_on();
leds_radio_on();
leds_debug_on();
leds_error_on();
leds_all_off();
debugpins_fsm_clr();
}
void radio_reset() {
PORT_PIN_RADIO_RESET_LOW();
}
void radio_rfOn() {
PORT_PIN_RADIO_RESET_LOW();
}
