void
nv20_emit_tex_gen(struct gl_context *ctx, int emit)
{
const int i = emit - NOUVEAU_STATE_TEX_GEN0;
struct nouveau_context *nctx = to_nouveau_context(ctx);
struct nouveau_pushbuf *push = context_push(ctx);
struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
int j;
for (j = 0; j < 4; j++) {
if (nctx->fallback == HWTNL && (unit->TexGenEnabled & 1 << j)) {
struct gl_texgen *coord = get_texgen_coord(unit, j);
float *k = get_texgen_coeff(coord);
if (k) {
BEGIN_NV04(push, NV20_3D(TEX_GEN_COEFF(i, j)), 4);
PUSH_DATAp(push, k, 4);
}
BEGIN_NV04(push, NV20_3D(TEX_GEN_MODE(i, j)), 1);
PUSH_DATA (push, nvgl_texgen_mode(coord->Mode));
} else {
BEGIN_NV04(push, NV20_3D(TEX_GEN_MODE(i, j)), 1);
PUSH_DATA (push, 0);
}
}
}
void nv50_upload_ms_info(struct nouveau_pushbuf *push)
{
BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
PUSH_DATA (push, (NV50_CB_AUX_MS_OFFSET << (8 - 2)) | NV50_CB_AUX);
BEGIN_NI04(push, NV50_3D(CB_DATA(0)), Elements(msaa_sample_xy_offsets));
PUSH_DATAp(push, msaa_sample_xy_offsets, Elements(msaa_sample_xy_offsets));
}
/* This happens rather often with DTD9/st. */
void
nvc0_cb_push(struct nouveau_context *nv,
struct nouveau_bo *bo, unsigned domain,
unsigned base, unsigned size,
unsigned offset, unsigned words, const uint32_t *data)
{
struct nouveau_pushbuf *push = nv->pushbuf;
NOUVEAU_DRV_STAT(nv->screen, constbuf_upload_count, 1);
NOUVEAU_DRV_STAT(nv->screen, constbuf_upload_bytes, words * 4);
assert(!(offset & 3));
size = align(size, 0x100);
BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
PUSH_DATA (push, size);
PUSH_DATAh(push, bo->offset + base);
PUSH_DATA (push, bo->offset + base);
while (words) {
unsigned nr = PUSH_AVAIL(push);
nr = MIN2(nr, words);
nr = MIN2(nr, NV04_PFIFO_MAX_PACKET_LEN - 1);
PUSH_SPACE(push, nr + 2);
PUSH_REFN (push, bo, NOUVEAU_BO_WR | domain);
BEGIN_1IC0(push, NVC0_3D(CB_POS), nr + 1);
PUSH_DATA (push, offset);
PUSH_DATAp(push, data, nr);
words -= nr;
data += nr;
offset += nr * 4;
}
}
static boolean
nve4_validate_tic(struct nvc0_context *nvc0, unsigned s)
{
struct nouveau_bo *txc = nvc0->screen->txc;
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
unsigned i;
boolean need_flush = FALSE;
for (i = 0; i < nvc0->num_textures[s]; ++i) {
struct nv50_tic_entry *tic = nv50_tic_entry(nvc0->textures[s][i]);
struct nv04_resource *res;
const boolean dirty = !!(nvc0->textures_dirty[s] & (1 << i));
if (!tic) {
nvc0->tex_handles[s][i] |= NVE4_TIC_ENTRY_INVALID;
continue;
}
res = nv04_resource(tic->pipe.texture);
if (tic->id < 0) {
tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic);
PUSH_SPACE(push, 16);
BEGIN_NVC0(push, NVE4_P2MF(DST_ADDRESS_HIGH), 2);
PUSH_DATAh(push, txc->offset + (tic->id * 32));
PUSH_DATA (push, txc->offset + (tic->id * 32));
BEGIN_NVC0(push, NVE4_P2MF(LINE_LENGTH_IN), 2);
PUSH_DATA (push, 32);
PUSH_DATA (push, 1);
BEGIN_1IC0(push, NVE4_P2MF(EXEC), 9);
PUSH_DATA (push, 0x1001);
PUSH_DATAp(push, &tic->tic[0], 8);
need_flush = TRUE;
} else
if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) {
BEGIN_NVC0(push, NVC0_3D(TEX_CACHE_CTL), 1);
PUSH_DATA (push, (tic->id << 4) | 1);
}
nvc0->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32);
res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING;
res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
nvc0->tex_handles[s][i] &= ~NVE4_TIC_ENTRY_INVALID;
nvc0->tex_handles[s][i] |= tic->id;
if (dirty)
BCTX_REFN(nvc0->bufctx_3d, TEX(s, i), res, RD);
}
for (; i < nvc0->state.num_textures[s]; ++i) {
nvc0->tex_handles[s][i] |= NVE4_TIC_ENTRY_INVALID;
nvc0->textures_dirty[s] |= 1 << i;
}
nvc0->state.num_textures[s] = nvc0->num_textures[s];
return need_flush;
}
static void
nv50_sprite_coords_validate(struct nv50_context *nv50)
{
struct nouveau_pushbuf *push = nv50->base.pushbuf;
uint32_t pntc[8], mode;
struct nv50_program *fp = nv50->fragprog;
unsigned i, c;
unsigned m = (nv50->state.interpolant_ctrl >> 8) & 0xff;
if (!nv50->rast->pipe.point_quad_rasterization) {
if (nv50->state.point_sprite) {
BEGIN_NV04(push, NV50_3D(POINT_COORD_REPLACE_MAP(0)), 8);
for (i = 0; i < 8; ++i)
PUSH_DATA(push, 0);
nv50->state.point_sprite = FALSE;
}
return;
} else {
nv50->state.point_sprite = TRUE;
}
memset(pntc, 0, sizeof(pntc));
for (i = 0; i < fp->in_nr; i++) {
unsigned n = util_bitcount(fp->in[i].mask);
if (fp->in[i].sn != TGSI_SEMANTIC_GENERIC) {
m += n;
continue;
}
if (!(nv50->rast->pipe.sprite_coord_enable & (1 << fp->in[i].si))) {
m += n;
continue;
}
for (c = 0; c < 4; ++c) {
if (fp->in[i].mask & (1 << c)) {
pntc[m / 8] |= (c + 1) << ((m % 8) * 4);
++m;
}
}
}
if (nv50->rast->pipe.sprite_coord_mode == PIPE_SPRITE_COORD_LOWER_LEFT)
mode = 0x00;
else
mode = 0x10;
BEGIN_NV04(push, NV50_3D(POINT_SPRITE_CTRL), 1);
PUSH_DATA (push, mode);
BEGIN_NV04(push, NV50_3D(POINT_COORD_REPLACE_MAP(0)), 8);
PUSH_DATAp(push, pntc, 8);
}
static void
nv30_draw_elements_inline_u32(struct nouveau_pushbuf *push, const uint32_t *map,
unsigned start, unsigned count)
{
map += start;
while (count) {
const unsigned nr = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U32), nr);
PUSH_DATAp(push, map, nr);
map += nr;
count -= nr;
}
}
void
nvc0_m2mf_push_linear(struct nouveau_context *nv,
struct nouveau_bo *dst, unsigned offset, unsigned domain,
unsigned size, const void *data)
{
struct nvc0_context *nvc0 = nvc0_context(&nv->pipe);
struct nouveau_pushbuf *push = nv->pushbuf;
uint32_t *src = (uint32_t *)data;
unsigned count = (size + 3) / 4;
nouveau_bufctx_refn(nvc0->bufctx, 0, dst, domain | NOUVEAU_BO_WR);
nouveau_pushbuf_bufctx(push, nvc0->bufctx);
nouveau_pushbuf_validate(push);
while (count) {
unsigned nr;
if (!PUSH_SPACE(push, 16))
break;
nr = PUSH_AVAIL(push);
assert(nr >= 16);
nr = MIN2(count, nr - 9);
nr = MIN2(nr, NV04_PFIFO_MAX_PACKET_LEN);
BEGIN_NVC0(push, NVC0_M2MF(OFFSET_OUT_HIGH), 2);
PUSH_DATAh(push, dst->offset + offset);
PUSH_DATA (push, dst->offset + offset);
BEGIN_NVC0(push, NVC0_M2MF(LINE_LENGTH_IN), 2);
PUSH_DATA (push, MIN2(size, nr * 4));
PUSH_DATA (push, 1);
BEGIN_NVC0(push, NVC0_M2MF(EXEC), 1);
PUSH_DATA (push, 0x100111);
/* must not be interrupted (trap on QUERY fence, 0x50 works however) */
BEGIN_NIC0(push, NVC0_M2MF(DATA), nr);
PUSH_DATAp(push, src, nr);
count -= nr;
src += nr;
offset += nr * 4;
size -= nr * 4;
}
nouveau_bufctx_reset(nvc0->bufctx, 0);
}
boolean
nve4_validate_tsc(struct nvc0_context *nvc0, int s)
{
struct nouveau_bo *txc = nvc0->screen->txc;
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
unsigned i;
boolean need_flush = FALSE;
for (i = 0; i < nvc0->num_samplers[s]; ++i) {
struct nv50_tsc_entry *tsc = nv50_tsc_entry(nvc0->samplers[s][i]);
if (!tsc) {
nvc0->tex_handles[s][i] |= NVE4_TSC_ENTRY_INVALID;
continue;
}
if (tsc->id < 0) {
tsc->id = nvc0_screen_tsc_alloc(nvc0->screen, tsc);
PUSH_SPACE(push, 16);
BEGIN_NVC0(push, NVE4_P2MF(DST_ADDRESS_HIGH), 2);
PUSH_DATAh(push, txc->offset + 65536 + (tsc->id * 32));
PUSH_DATA (push, txc->offset + 65536 + (tsc->id * 32));
BEGIN_NVC0(push, NVE4_P2MF(LINE_LENGTH_IN), 2);
PUSH_DATA (push, 32);
PUSH_DATA (push, 1);
BEGIN_1IC0(push, NVE4_P2MF(EXEC), 9);
PUSH_DATA (push, 0x1001);
PUSH_DATAp(push, &tsc->tsc[0], 8);
need_flush = TRUE;
}
nvc0->screen->tsc.lock[tsc->id / 32] |= 1 << (tsc->id % 32);
nvc0->tex_handles[s][i] &= ~NVE4_TSC_ENTRY_INVALID;
nvc0->tex_handles[s][i] |= tsc->id << 20;
}
for (; i < nvc0->state.num_samplers[s]; ++i) {
nvc0->tex_handles[s][i] |= NVE4_TSC_ENTRY_INVALID;
nvc0->samplers_dirty[s] |= 1 << i;
}
nvc0->state.num_samplers[s] = nvc0->num_samplers[s];
return need_flush;
}
static boolean
nvc0_validate_tsc(struct nvc0_context *nvc0, int s)
{
uint32_t commands[16];
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
unsigned i;
unsigned n = 0;
boolean need_flush = FALSE;
for (i = 0; i < nvc0->num_samplers[s]; ++i) {
struct nv50_tsc_entry *tsc = nv50_tsc_entry(nvc0->samplers[s][i]);
if (!(nvc0->samplers_dirty[s] & (1 << i)))
continue;
if (!tsc) {
commands[n++] = (i << 4) | 0;
continue;
}
if (tsc->id < 0) {
tsc->id = nvc0_screen_tsc_alloc(nvc0->screen, tsc);
nvc0_m2mf_push_linear(&nvc0->base, nvc0->screen->txc,
65536 + tsc->id * 32, NOUVEAU_BO_VRAM,
32, tsc->tsc);
need_flush = TRUE;
}
nvc0->screen->tsc.lock[tsc->id / 32] |= 1 << (tsc->id % 32);
commands[n++] = (tsc->id << 12) | (i << 4) | 1;
}
for (; i < nvc0->state.num_samplers[s]; ++i)
commands[n++] = (i << 4) | 0;
nvc0->state.num_samplers[s] = nvc0->num_samplers[s];
if (n) {
BEGIN_NIC0(push, NVC0_3D(BIND_TSC(s)), n);
PUSH_DATAp(push, commands, n);
}
nvc0->samplers_dirty[s] = 0;
return need_flush;
}
void
nv20_emit_viewport(struct gl_context *ctx, int emit)
{
struct nouveau_pushbuf *push = context_push(ctx);
struct gl_framebuffer *fb = ctx->DrawBuffer;
float a[4] = {};
get_viewport_translate(ctx, a);
BEGIN_NV04(push, NV20_3D(VIEWPORT_TRANSLATE_X), 4);
PUSH_DATAp(push, a, 4);
BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_HORIZ(0)), 1);
PUSH_DATA (push, (fb->Width - 1) << 16);
BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_VERT(0)), 1);
PUSH_DATA (push, (fb->Height - 1) << 16);
context_dirty(ctx, PROJECTION);
}
static void
nvc0_compute_upload_input(struct nvc0_context *nvc0,
const struct pipe_grid_info *info)
{
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
struct nvc0_screen *screen = nvc0->screen;
struct nvc0_program *cp = nvc0->compprog;
if (cp->parm_size) {
struct nouveau_bo *bo = screen->uniform_bo;
const unsigned base = NVC0_CB_USR_INFO(5);
BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
PUSH_DATA (push, align(cp->parm_size, 0x100));
PUSH_DATAh(push, bo->offset + base);
PUSH_DATA (push, bo->offset + base);
BEGIN_NVC0(push, NVC0_CP(CB_BIND), 1);
PUSH_DATA (push, (0 << 8) | 1);
/* NOTE: size is limited to 4 KiB, which is < NV04_PFIFO_MAX_PACKET_LEN */
BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + cp->parm_size / 4);
PUSH_DATA (push, 0);
PUSH_DATAp(push, info->input, cp->parm_size / 4);
nvc0_compute_invalidate_constbufs(nvc0);
}
BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
PUSH_DATA (push, NVC0_CB_AUX_SIZE);
PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5));
PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5));
BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + 1);
/* (7) as we only upload work_dim on nvc0, the rest uses special regs */
PUSH_DATA (push, NVC0_CB_AUX_GRID_INFO(7));
PUSH_DATA (push, info->work_dim);
BEGIN_NVC0(push, NVC0_CP(FLUSH), 1);
PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CB);
}
void
nve4_p2mf_push_linear(struct nouveau_context *nv,
struct nouveau_bo *dst, unsigned offset, unsigned domain,
unsigned size, const void *data)
{
struct nvc0_context *nvc0 = nvc0_context(&nv->pipe);
struct nouveau_pushbuf *push = nv->pushbuf;
uint32_t *src = (uint32_t *)data;
unsigned count = (size + 3) / 4;
nouveau_bufctx_refn(nvc0->bufctx, 0, dst, domain | NOUVEAU_BO_WR);
nouveau_pushbuf_bufctx(push, nvc0->bufctx);
nouveau_pushbuf_validate(push);
while (count) {
unsigned nr = MIN2(count, (NV04_PFIFO_MAX_PACKET_LEN - 1));
if (!PUSH_SPACE(push, nr + 10))
break;
BEGIN_NVC0(push, NVE4_P2MF(UPLOAD_DST_ADDRESS_HIGH), 2);
PUSH_DATAh(push, dst->offset + offset);
PUSH_DATA (push, dst->offset + offset);
BEGIN_NVC0(push, NVE4_P2MF(UPLOAD_LINE_LENGTH_IN), 2);
PUSH_DATA (push, MIN2(size, nr * 4));
PUSH_DATA (push, 1);
/* must not be interrupted (trap on QUERY fence, 0x50 works however) */
BEGIN_1IC0(push, NVE4_P2MF(UPLOAD_EXEC), nr + 1);
PUSH_DATA (push, 0x1001);
PUSH_DATAp(push, src, nr);
count -= nr;
src += nr;
offset += nr * 4;
size -= nr * 4;
}
nouveau_bufctx_reset(nvc0->bufctx, 0);
}
static void
nvc0_compute_upload_input(struct nvc0_context *nvc0, const void *input)
{
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
struct nvc0_screen *screen = nvc0->screen;
struct nvc0_program *cp = nvc0->compprog;
if (cp->parm_size) {
BEGIN_NVC0(push, NVC0_COMPUTE(CB_SIZE), 3);
PUSH_DATA (push, align(cp->parm_size, 0x100));
PUSH_DATAh(push, screen->parm->offset);
PUSH_DATA (push, screen->parm->offset);
BEGIN_NVC0(push, NVC0_COMPUTE(CB_BIND), 1);
PUSH_DATA (push, (0 << 8) | 1);
/* NOTE: size is limited to 4 KiB, which is < NV04_PFIFO_MAX_PACKET_LEN */
BEGIN_1IC0(push, NVC0_COMPUTE(CB_POS), 1 + cp->parm_size / 4);
PUSH_DATA (push, 0);
PUSH_DATAp(push, input, cp->parm_size / 4);
BEGIN_NVC0(push, NVC0_COMPUTE(FLUSH), 1);
PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CB);
}
}
static void
nvc0_emit_string_marker(struct pipe_context *pipe, const char *str, int len)
{
struct nouveau_pushbuf *push = nvc0_context(pipe)->base.pushbuf;
int string_words = len / 4;
int data_words;
if (len <= 0)
return;
string_words = MIN2(string_words, NV04_PFIFO_MAX_PACKET_LEN);
if (string_words == NV04_PFIFO_MAX_PACKET_LEN)
data_words = string_words;
else
data_words = string_words + !!(len & 3);
BEGIN_NIC0(push, SUBC_3D(NV04_GRAPH_NOP), data_words);
if (string_words)
PUSH_DATAp(push, str, string_words);
if (string_words != data_words) {
int data = 0;
memcpy(&data, &str[string_words * 4], len & 3);
PUSH_DATA (push, data);
}
}
void
nvc0_cb_push(struct nouveau_context *nv,
struct nouveau_bo *bo, unsigned domain,
unsigned base, unsigned size,
unsigned offset, unsigned words, const uint32_t *data)
{
struct nouveau_bufctx *bctx = nvc0_context(&nv->pipe)->bufctx;
struct nouveau_pushbuf *push = nv->pushbuf;
assert(!(offset & 3));
size = align(size, 0x100);
nouveau_bufctx_refn(bctx, 0, bo, NOUVEAU_BO_WR | domain);
nouveau_pushbuf_bufctx(push, bctx);
nouveau_pushbuf_validate(push);
BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
PUSH_DATA (push, size);
PUSH_DATAh(push, bo->offset + base);
PUSH_DATA (push, bo->offset + base);
while (words) {
unsigned nr = PUSH_AVAIL(push);
nr = MIN2(nr, words);
nr = MIN2(nr, NV04_PFIFO_MAX_PACKET_LEN - 1);
BEGIN_1IC0(push, NVC0_3D(CB_POS), nr + 1);
PUSH_DATA (push, offset);
PUSH_DATAp(push, data, nr);
words -= nr;
data += nr;
offset += nr * 4;
}
nouveau_bufctx_reset(bctx, 0);
}
void
nv50_constbufs_validate(struct nv50_context *nv50)
{
struct nouveau_pushbuf *push = nv50->base.pushbuf;
unsigned s;
for (s = 0; s < 3; ++s) {
unsigned p;
if (s == PIPE_SHADER_FRAGMENT)
p = NV50_3D_SET_PROGRAM_CB_PROGRAM_FRAGMENT;
else
if (s == PIPE_SHADER_GEOMETRY)
p = NV50_3D_SET_PROGRAM_CB_PROGRAM_GEOMETRY;
else
p = NV50_3D_SET_PROGRAM_CB_PROGRAM_VERTEX;
while (nv50->constbuf_dirty[s]) {
const unsigned i = (unsigned)ffs(nv50->constbuf_dirty[s]) - 1;
assert(i < NV50_MAX_PIPE_CONSTBUFS);
nv50->constbuf_dirty[s] &= ~(1 << i);
if (nv50->constbuf[s][i].user) {
const unsigned b = NV50_CB_PVP + s;
unsigned start = 0;
unsigned words = nv50->constbuf[s][0].size / 4;
if (i) {
NOUVEAU_ERR("user constbufs only supported in slot 0\n");
continue;
}
if (!nv50->state.uniform_buffer_bound[s]) {
nv50->state.uniform_buffer_bound[s] = TRUE;
BEGIN_NV04(push, NV50_3D(SET_PROGRAM_CB), 1);
PUSH_DATA (push, (b << 12) | (i << 8) | p | 1);
}
while (words) {
unsigned nr;
if (!PUSH_SPACE(push, 16))
break;
nr = PUSH_AVAIL(push);
assert(nr >= 16);
nr = MIN2(MIN2(nr - 3, words), NV04_PFIFO_MAX_PACKET_LEN);
BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
PUSH_DATA (push, (start << 8) | b);
BEGIN_NI04(push, NV50_3D(CB_DATA(0)), nr);
PUSH_DATAp(push, &nv50->constbuf[s][0].u.data[start * 4], nr);
start += nr;
words -= nr;
}
} else {
struct nv04_resource *res =
nv04_resource(nv50->constbuf[s][i].u.buf);
if (res) {
/* TODO: allocate persistent bindings */
const unsigned b = s * 16 + i;
assert(nouveau_resource_mapped_by_gpu(&res->base));
if (!nv50->constbuf[s][i].offset)
res->cb_slot = b;
BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3);
PUSH_DATAh(push, res->address + nv50->constbuf[s][i].offset);
PUSH_DATA (push, res->address + nv50->constbuf[s][i].offset);
PUSH_DATA (push, (b << 16) |
(align(nv50->constbuf[s][i].size, 0x100) & 0xffff));
BEGIN_NV04(push, NV50_3D(SET_PROGRAM_CB), 1);
PUSH_DATA (push, (b << 12) | (i << 8) | p | 1);
BCTX_REFN(nv50->bufctx_3d, CB(s, i), res, RD);
} else {
BEGIN_NV04(push, NV50_3D(SET_PROGRAM_CB), 1);
PUSH_DATA (push, (i << 8) | p | 0);
}
if (i == 0)
nv50->state.uniform_buffer_bound[s] = FALSE;
}
}
}
}
static boolean
nv50_validate_tic(struct nv50_context *nv50, int s)
{
struct nouveau_pushbuf *push = nv50->base.pushbuf;
struct nouveau_bo *txc = nv50->screen->txc;
unsigned i;
boolean need_flush = FALSE;
assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS);
for (i = 0; i < nv50->num_textures[s]; ++i) {
struct nv50_tic_entry *tic = nv50_tic_entry(nv50->textures[s][i]);
struct nv04_resource *res;
if (!tic) {
BEGIN_NV04(push, NV50_3D(BIND_TIC(s)), 1);
PUSH_DATA (push, (i << 1) | 0);
continue;
}
res = &nv50_miptree(tic->pipe.texture)->base;
if (tic->id < 0) {
tic->id = nv50_screen_tic_alloc(nv50->screen, tic);
BEGIN_NV04(push, NV50_2D(DST_FORMAT), 2);
PUSH_DATA (push, NV50_SURFACE_FORMAT_R8_UNORM);
PUSH_DATA (push, 1);
BEGIN_NV04(push, NV50_2D(DST_PITCH), 5);
PUSH_DATA (push, 262144);
PUSH_DATA (push, 65536);
PUSH_DATA (push, 1);
PUSH_DATAh(push, txc->offset);
PUSH_DATA (push, txc->offset);
BEGIN_NV04(push, NV50_2D(SIFC_BITMAP_ENABLE), 2);
PUSH_DATA (push, 0);
PUSH_DATA (push, NV50_SURFACE_FORMAT_R8_UNORM);
BEGIN_NV04(push, NV50_2D(SIFC_WIDTH), 10);
PUSH_DATA (push, 32);
PUSH_DATA (push, 1);
PUSH_DATA (push, 0);
PUSH_DATA (push, 1);
PUSH_DATA (push, 0);
PUSH_DATA (push, 1);
PUSH_DATA (push, 0);
PUSH_DATA (push, tic->id * 32);
PUSH_DATA (push, 0);
PUSH_DATA (push, 0);
BEGIN_NI04(push, NV50_2D(SIFC_DATA), 8);
PUSH_DATAp(push, &tic->tic[0], 8);
need_flush = TRUE;
} else
if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) {
BEGIN_NV04(push, NV50_3D(TEX_CACHE_CTL), 1);
PUSH_DATA (push, 0x20);
}
nv50->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32);
res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING;
res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
BCTX_REFN(nv50->bufctx_3d, TEXTURES, res, RD);
BEGIN_NV04(push, NV50_3D(BIND_TIC(s)), 1);
PUSH_DATA (push, (tic->id << 9) | (i << 1) | 1);
}
for (; i < nv50->state.num_textures[s]; ++i) {
BEGIN_NV04(push, NV50_3D(BIND_TIC(s)), 1);
PUSH_DATA (push, (i << 1) | 0);
}
if (nv50->num_textures[s]) {
BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
PUSH_DATA (push, (NV50_CB_AUX_TEX_MS_OFFSET << (8 - 2)) | NV50_CB_AUX);
BEGIN_NI04(push, NV50_3D(CB_DATA(0)), nv50->num_textures[s] * 2);
for (i = 0; i < nv50->num_textures[s]; i++) {
struct nv50_tic_entry *tic = nv50_tic_entry(nv50->textures[s][i]);
struct nv50_miptree *res;
if (!tic) {
PUSH_DATA (push, 0);
PUSH_DATA (push, 0);
continue;
}
res = nv50_miptree(tic->pipe.texture);
PUSH_DATA (push, res->ms_x);
PUSH_DATA (push, res->ms_y);
}
}
nv50->state.num_textures[s] = nv50->num_textures[s];
return need_flush;
}
void
nvc0_tfb_validate(struct nvc0_context *nvc0)
{
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
struct nvc0_transform_feedback_state *tfb;
unsigned b;
if (nvc0->gmtyprog) tfb = nvc0->gmtyprog->tfb;
else
if (nvc0->tevlprog) tfb = nvc0->tevlprog->tfb;
else
tfb = nvc0->vertprog->tfb;
IMMED_NVC0(push, NVC0_3D(TFB_ENABLE), (tfb && nvc0->num_tfbbufs) ? 1 : 0);
if (tfb && tfb != nvc0->state.tfb) {
for (b = 0; b < 4; ++b) {
if (tfb->varying_count[b]) {
unsigned n = (tfb->varying_count[b] + 3) / 4;
BEGIN_NVC0(push, NVC0_3D(TFB_STREAM(b)), 3);
PUSH_DATA (push, 0);
PUSH_DATA (push, tfb->varying_count[b]);
PUSH_DATA (push, tfb->stride[b]);
BEGIN_NVC0(push, NVC0_3D(TFB_VARYING_LOCS(b, 0)), n);
PUSH_DATAp(push, tfb->varying_index[b], n);
if (nvc0->tfbbuf[b])
nvc0_so_target(nvc0->tfbbuf[b])->stride = tfb->stride[b];
} else {
IMMED_NVC0(push, NVC0_3D(TFB_VARYING_COUNT(b)), 0);
}
}
}
nvc0->state.tfb = tfb;
if (!(nvc0->dirty & NVC0_NEW_TFB_TARGETS))
return;
nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TFB);
for (b = 0; b < nvc0->num_tfbbufs; ++b) {
struct nvc0_so_target *targ = nvc0_so_target(nvc0->tfbbuf[b]);
struct nv04_resource *buf = nv04_resource(targ->pipe.buffer);
if (tfb)
targ->stride = tfb->stride[b];
if (!(nvc0->tfbbuf_dirty & (1 << b)))
continue;
if (!targ->clean)
nvc0_query_fifo_wait(push, targ->pq);
BEGIN_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 5);
PUSH_DATA (push, 1);
PUSH_DATAh(push, buf->address + targ->pipe.buffer_offset);
PUSH_DATA (push, buf->address + targ->pipe.buffer_offset);
PUSH_DATA (push, targ->pipe.buffer_size);
if (!targ->clean) {
nvc0_query_pushbuf_submit(push, targ->pq, 0x4);
} else {
PUSH_DATA(push, 0); /* TFB_BUFFER_OFFSET */
targ->clean = FALSE;
}
BCTX_REFN(nvc0->bufctx_3d, TFB, buf, WR);
}
for (; b < 4; ++b)
IMMED_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 0);
}
static void
setup_hierz_buffer(struct gl_context *ctx)
{
struct nouveau_pushbuf *push = context_push(ctx);
struct gl_framebuffer *fb = ctx->DrawBuffer;
struct nouveau_framebuffer *nfb = to_nouveau_framebuffer(fb);
unsigned pitch = align(fb->Width, 128),
height = align(fb->Height, 2),
size = pitch * height;
if (!nfb->hierz.bo || nfb->hierz.bo->size != size) {
union nouveau_bo_config config = {
.nv04.surf_flags = NV04_BO_ZETA,
.nv04.surf_pitch = 0
};
nouveau_bo_ref(NULL, &nfb->hierz.bo);
nouveau_bo_new(context_dev(ctx), NOUVEAU_BO_VRAM, 0, size,
&config, &nfb->hierz.bo);
}
PUSH_SPACE(push, 11);
BEGIN_NV04(push, NV17_3D(HIERZ_OFFSET), 1);
PUSH_MTHDl(push, NV17_3D(HIERZ_OFFSET), BUFCTX_FB,
nfb->hierz.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
BEGIN_NV04(push, NV17_3D(HIERZ_WINDOW_X), 4);
PUSH_DATAf(push, - 1792);
PUSH_DATAf(push, - 2304 + fb->Height);
PUSH_DATAf(push, fb->_DepthMaxF / 2);
PUSH_DATAf(push, 0);
BEGIN_NV04(push, NV17_3D(HIERZ_PITCH), 1);
PUSH_DATA (push, pitch);
BEGIN_NV04(push, NV17_3D(HIERZ_ENABLE), 1);
PUSH_DATA (push, 1);
}
void
nv10_emit_framebuffer(struct gl_context *ctx, int emit)
{
struct nouveau_pushbuf *push = context_push(ctx);
struct gl_framebuffer *fb = ctx->DrawBuffer;
struct nouveau_surface *s;
unsigned rt_format = NV10_3D_RT_FORMAT_TYPE_LINEAR;
unsigned rt_pitch = 0, zeta_pitch = 0;
unsigned bo_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR;
if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT)
return;
PUSH_RESET(push, BUFCTX_FB);
/* At least nv11 seems to get sad if we don't do this before
* swapping RTs.*/
if (context_eng3d(ctx)->oclass < NV17_3D_CLASS) {
int i;
for (i = 0; i < 6; i++) {
BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
PUSH_DATA (push, 0);
}
}
/* Render target */
if (fb->_ColorDrawBuffers[0]) {
s = &to_nouveau_renderbuffer(
fb->_ColorDrawBuffers[0])->surface;
rt_format |= get_rt_format(s->format);
zeta_pitch = rt_pitch = s->pitch;
BEGIN_NV04(push, NV10_3D(COLOR_OFFSET), 1);
PUSH_MTHDl(push, NV10_3D(COLOR_OFFSET), BUFCTX_FB,
s->bo, 0, bo_flags);
}
/* depth/stencil */
if (fb->Attachment[BUFFER_DEPTH].Renderbuffer) {
s = &to_nouveau_renderbuffer(
fb->Attachment[BUFFER_DEPTH].Renderbuffer)->surface;
rt_format |= get_rt_format(s->format);
zeta_pitch = s->pitch;
BEGIN_NV04(push, NV10_3D(ZETA_OFFSET), 1);
PUSH_MTHDl(push, NV10_3D(ZETA_OFFSET), BUFCTX_FB,
s->bo, 0, bo_flags);
if (context_eng3d(ctx)->oclass >= NV17_3D_CLASS) {
setup_hierz_buffer(ctx);
context_dirty(ctx, ZCLEAR);
}
}
BEGIN_NV04(push, NV10_3D(RT_FORMAT), 2);
PUSH_DATA (push, rt_format);
PUSH_DATA (push, zeta_pitch << 16 | rt_pitch);
context_dirty(ctx, VIEWPORT);
context_dirty(ctx, SCISSOR);
context_dirty(ctx, DEPTH);
}
void
nv10_emit_render_mode(struct gl_context *ctx, int emit)
{
}
void
nv10_emit_scissor(struct gl_context *ctx, int emit)
{
struct nouveau_pushbuf *push = context_push(ctx);
int x, y, w, h;
get_scissors(ctx->DrawBuffer, &x, &y, &w, &h);
BEGIN_NV04(push, NV10_3D(RT_HORIZ), 2);
PUSH_DATA (push, w << 16 | x);
PUSH_DATA (push, h << 16 | y);
}
void
nv10_emit_viewport(struct gl_context *ctx, int emit)
{
struct nouveau_pushbuf *push = context_push(ctx);
struct gl_viewport_attrib *vp = &ctx->ViewportArray[0];
struct gl_framebuffer *fb = ctx->DrawBuffer;
float a[4] = {};
get_viewport_translate(ctx, a);
a[0] -= 2048;
a[1] -= 2048;
if (nv10_use_viewport_zclear(ctx))
a[2] = nv10_transform_depth(ctx, (vp->Far + vp->Near) / 2);
BEGIN_NV04(push, NV10_3D(VIEWPORT_TRANSLATE_X), 4);
PUSH_DATAp(push, a, 4);
BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_HORIZ(0)), 1);
PUSH_DATA (push, (fb->Width - 1) << 16 | 0x08000800);
BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_VERT(0)), 1);
PUSH_DATA (push, (fb->Height - 1) << 16 | 0x08000800);
context_dirty(ctx, PROJECTION);
}
void
nv10_emit_zclear(struct gl_context *ctx, int emit)
{
struct nouveau_context *nctx = to_nouveau_context(ctx);
struct nouveau_pushbuf *push = context_push(ctx);
struct nouveau_framebuffer *nfb =
to_nouveau_framebuffer(ctx->DrawBuffer);
if (nfb->hierz.bo) {
BEGIN_NV04(push, NV17_3D(ZCLEAR_ENABLE), 2);
PUSH_DATAb(push, !nctx->hierz.clear_blocked);
PUSH_DATA (push, nfb->hierz.clear_value |
(nctx->hierz.clear_seq & 0xff));
} else {
BEGIN_NV04(push, NV10_3D(DEPTH_RANGE_NEAR), 2);
PUSH_DATAf(push, nv10_transform_depth(ctx, 0));
PUSH_DATAf(push, nv10_transform_depth(ctx, 1));
context_dirty(ctx, VIEWPORT);
}
}
void
nv30_vertprog_validate(struct nv30_context *nv30)
{
struct nouveau_pushbuf *push = nv30->base.pushbuf;
struct nouveau_object *eng3d = nv30->screen->eng3d;
struct nv30_vertprog *vp = nv30->vertprog.program;
struct nv30_fragprog *fp = nv30->fragprog.program;
boolean upload_code = FALSE;
boolean upload_data = FALSE;
unsigned i;
if (nv30->dirty & NV30_NEW_FRAGPROG) {
if (memcmp(vp->texcoord, fp->texcoord, sizeof(vp->texcoord))) {
if (vp->translated)
nv30_vertprog_destroy(vp);
memcpy(vp->texcoord, fp->texcoord, sizeof(vp->texcoord));
}
}
if (nv30->rast && nv30->rast->pipe.clip_plane_enable != vp->enabled_ucps) {
vp->enabled_ucps = nv30->rast->pipe.clip_plane_enable;
if (vp->translated)
nv30_vertprog_destroy(vp);
}
if (!vp->translated) {
vp->translated = _nvfx_vertprog_translate(eng3d->oclass, vp);
if (!vp->translated) {
nv30->draw_flags |= NV30_NEW_VERTPROG;
return;
}
nv30->dirty |= NV30_NEW_VERTPROG;
}
if (!vp->exec) {
struct nouveau_heap *heap = nv30->screen->vp_exec_heap;
struct nv30_shader_reloc *reloc = vp->branch_relocs.data;
unsigned nr_reloc = vp->branch_relocs.size / sizeof(*reloc);
uint32_t *inst, target;
if (nouveau_heap_alloc(heap, vp->nr_insns, &vp->exec, &vp->exec)) {
while (heap->next && heap->size < vp->nr_insns) {
struct nouveau_heap **evict = heap->next->priv;
nouveau_heap_free(evict);
}
if (nouveau_heap_alloc(heap, vp->nr_insns, &vp->exec, &vp->exec)) {
nv30->draw_flags |= NV30_NEW_VERTPROG;
return;
}
}
if (eng3d->oclass < NV40_3D_CLASS) {
while (nr_reloc--) {
inst = vp->insns[reloc->location].data;
target = vp->exec->start + reloc->target;
inst[2] &= ~0x000007fc;
inst[2] |= target << 2;
reloc++;
}
} else {
while (nr_reloc--) {
inst = vp->insns[reloc->location].data;
target = vp->exec->start + reloc->target;
inst[2] &= ~0x0000003f;
inst[2] |= target >> 3;
inst[3] &= ~0xe0000000;
inst[3] |= target << 29;
reloc++;
}
}
upload_code = TRUE;
}
if (vp->nr_consts && !vp->data) {
struct nouveau_heap *heap = nv30->screen->vp_data_heap;
struct nv30_shader_reloc *reloc = vp->const_relocs.data;
unsigned nr_reloc = vp->const_relocs.size / sizeof(*reloc);
uint32_t *inst, target;
if (nouveau_heap_alloc(heap, vp->nr_consts, vp, &vp->data)) {
while (heap->next && heap->size < vp->nr_consts) {
struct nv30_vertprog *evp = heap->next->priv;
nouveau_heap_free(&evp->data);
}
if (nouveau_heap_alloc(heap, vp->nr_consts, vp, &vp->data)) {
nv30->draw_flags |= NV30_NEW_VERTPROG;
return;
}
}
if (eng3d->oclass < NV40_3D_CLASS) {
while (nr_reloc--) {
inst = vp->insns[reloc->location].data;
target = vp->data->start + reloc->target;
inst[1] &= ~0x0007fc000;
inst[1] |= (target & 0x1ff) << 14;
reloc++;
}
} else {
while (nr_reloc--) {
inst = vp->insns[reloc->location].data;
target = vp->data->start + reloc->target;
inst[1] &= ~0x0001ff000;
inst[1] |= (target & 0x1ff) << 12;
reloc++;
}
}
upload_code = TRUE;
upload_data = TRUE;
}
if (vp->nr_consts) {
struct nv04_resource *res = nv04_resource(nv30->vertprog.constbuf);
for (i = 0; i < vp->nr_consts; i++) {
struct nv30_vertprog_data *data = &vp->consts[i];
if (data->index < 0) {
if (!upload_data)
continue;
} else {
float *constbuf = (float *)res->data;
if (!upload_data &&
!memcmp(data->value, &constbuf[data->index * 4], 16))
continue;
memcpy(data->value, &constbuf[data->index * 4], 16);
}
BEGIN_NV04(push, NV30_3D(VP_UPLOAD_CONST_ID), 5);
PUSH_DATA (push, vp->data->start + i);
PUSH_DATAp(push, data->value, 4);
}
}
if (upload_code) {
BEGIN_NV04(push, NV30_3D(VP_UPLOAD_FROM_ID), 1);
PUSH_DATA (push, vp->exec->start);
for (i = 0; i < vp->nr_insns; i++) {
BEGIN_NV04(push, NV30_3D(VP_UPLOAD_INST(0)), 4);
PUSH_DATAp(push, vp->insns[i].data, 4);
}
}
if (nv30->dirty & (NV30_NEW_VERTPROG | NV30_NEW_FRAGPROG)) {
BEGIN_NV04(push, NV30_3D(VP_START_FROM_ID), 1);
PUSH_DATA (push, vp->exec->start);
if (eng3d->oclass < NV40_3D_CLASS) {
BEGIN_NV04(push, NV30_3D(ENGINE), 1);
PUSH_DATA (push, 0x00000013); /* vp instead of ff, somehow */
} else {
BEGIN_NV04(push, NV40_3D(VP_ATTRIB_EN), 2);
PUSH_DATA (push, vp->ir);
PUSH_DATA (push, vp->or | fp->vp_or);
BEGIN_NV04(push, NV30_3D(ENGINE), 1);
PUSH_DATA (push, 0x00000011);
}
}
}
static boolean
nvc0_validate_tic(struct nvc0_context *nvc0, int s)
{
uint32_t commands[32];
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
struct nouveau_bo *txc = nvc0->screen->txc;
unsigned i;
unsigned n = 0;
boolean need_flush = FALSE;
for (i = 0; i < nvc0->num_textures[s]; ++i) {
struct nv50_tic_entry *tic = nv50_tic_entry(nvc0->textures[s][i]);
struct nv04_resource *res;
const boolean dirty = !!(nvc0->textures_dirty[s] & (1 << i));
if (!tic) {
if (dirty)
commands[n++] = (i << 1) | 0;
continue;
}
res = nv04_resource(tic->pipe.texture);
if (tic->id < 0) {
tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic);
PUSH_SPACE(push, 17);
BEGIN_NVC0(push, NVC0_M2MF(OFFSET_OUT_HIGH), 2);
PUSH_DATAh(push, txc->offset + (tic->id * 32));
PUSH_DATA (push, txc->offset + (tic->id * 32));
BEGIN_NVC0(push, NVC0_M2MF(LINE_LENGTH_IN), 2);
PUSH_DATA (push, 32);
PUSH_DATA (push, 1);
BEGIN_NVC0(push, NVC0_M2MF(EXEC), 1);
PUSH_DATA (push, 0x100111);
BEGIN_NIC0(push, NVC0_M2MF(DATA), 8);
PUSH_DATAp(push, &tic->tic[0], 8);
need_flush = TRUE;
} else
if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) {
BEGIN_NVC0(push, NVC0_3D(TEX_CACHE_CTL), 1);
PUSH_DATA (push, (tic->id << 4) | 1);
}
nvc0->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32);
res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING;
res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
if (!dirty)
continue;
commands[n++] = (tic->id << 9) | (i << 1) | 1;
BCTX_REFN(nvc0->bufctx_3d, TEX(s, i), res, RD);
}
for (; i < nvc0->state.num_textures[s]; ++i)
commands[n++] = (i << 1) | 0;
nvc0->state.num_textures[s] = nvc0->num_textures[s];
if (n) {
BEGIN_NIC0(push, NVC0_3D(BIND_TIC(s)), n);
PUSH_DATAp(push, commands, n);
}
nvc0->textures_dirty[s] = 0;
return need_flush;
}
static boolean
nv30_render_validate(struct nv30_context *nv30)
{
struct nv30_render *r = nv30_render(nv30->draw->render);
struct nv30_rasterizer_stateobj *rast = nv30->rast;
struct pipe_screen *pscreen = &nv30->screen->base.base;
struct nouveau_pushbuf *push = nv30->screen->base.pushbuf;
struct nouveau_object *eng3d = nv30->screen->eng3d;
struct nv30_vertprog *vp = nv30->vertprog.program;
struct vertex_info *vinfo = &r->vertex_info;
unsigned vp_attribs = 0;
unsigned vp_results = 0;
unsigned attrib = 0;
unsigned pntc;
int i;
if (!r->vertprog) {
struct nouveau_heap *heap = nv30_screen(pscreen)->vp_exec_heap;
if (nouveau_heap_alloc(heap, 16, &r->vertprog, &r->vertprog)) {
while (heap->next && heap->size < 16) {
struct nouveau_heap **evict = heap->next->priv;
nouveau_heap_free(evict);
}
if (nouveau_heap_alloc(heap, 16, &r->vertprog, &r->vertprog))
return FALSE;
}
}
vinfo->num_attribs = 0;
vinfo->size = 0;
/* setup routing for all necessary vp outputs */
for (i = 0; i < vp->info.num_outputs && attrib < 16; i++) {
uint semantic = vp->info.output_semantic_name[i];
uint index = vp->info.output_semantic_index[i];
if (vroute_add(r, attrib, semantic, &index)) {
vp_attribs |= (1 << attrib++);
vp_results |= index;
}
}
/* setup routing for replaced point coords not written by vp */
if (rast && rast->pipe.point_quad_rasterization)
pntc = rast->pipe.sprite_coord_enable & 0x000002ff;
else
pntc = 0;
while (pntc && attrib < 16) {
uint index = ffs(pntc) - 1; pntc &= ~(1 << index);
if (vroute_add(r, attrib, TGSI_SEMANTIC_TEXCOORD, &index)) {
vp_attribs |= (1 << attrib++);
vp_results |= index;
}
}
/* modify vertex format for correct stride, and stub out unused ones */
BEGIN_NV04(push, NV30_3D(VP_UPLOAD_FROM_ID), 1);
PUSH_DATA (push, r->vertprog->start);
r->vtxprog[attrib - 1][3] |= 1;
for (i = 0; i < attrib; i++) {
BEGIN_NV04(push, NV30_3D(VP_UPLOAD_INST(0)), 4);
PUSH_DATAp(push, r->vtxprog[i], 4);
r->vtxfmt[i] |= vinfo->size << 8;
}
for (; i < 16; i++)
r->vtxfmt[i] = NV30_3D_VTXFMT_TYPE_V32_FLOAT;
BEGIN_NV04(push, NV30_3D(VIEWPORT_TRANSLATE_X), 8);
PUSH_DATAf(push, 0.0);
PUSH_DATAf(push, 0.0);
PUSH_DATAf(push, 0.0);
PUSH_DATAf(push, 0.0);
PUSH_DATAf(push, 1.0);
PUSH_DATAf(push, 1.0);
PUSH_DATAf(push, 1.0);
PUSH_DATAf(push, 1.0);
BEGIN_NV04(push, NV30_3D(DEPTH_RANGE_NEAR), 2);
PUSH_DATAf(push, 0.0);
PUSH_DATAf(push, 1.0);
BEGIN_NV04(push, NV30_3D(VTXFMT(0)), 16);
PUSH_DATAp(push, r->vtxfmt, 16);
BEGIN_NV04(push, NV30_3D(VP_START_FROM_ID), 1);
PUSH_DATA (push, r->vertprog->start);
BEGIN_NV04(push, NV30_3D(ENGINE), 1);
PUSH_DATA (push, 0x00000103);
if (eng3d->oclass >= NV40_3D_CLASS) {
BEGIN_NV04(push, NV40_3D(VP_ATTRIB_EN), 2);
PUSH_DATA (push, vp_attribs);
PUSH_DATA (push, vp_results);
}
vinfo->size /= 4;
return TRUE;
}
