示例#1
0
void twins_state::twins(machine_config &config)
{
	/* basic machine hardware */
	V30(config, m_maincpu, XTAL(16'000'000)/2); /* verified on pcb */
	m_maincpu->set_addrmap(AS_PROGRAM, &twins_state::twins_map);
	m_maincpu->set_addrmap(AS_IO, &twins_state::twins_io);

	/* video hardware */
	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
	screen.set_raw(8000000, 512, 0, 320, 312, 0, 200); // 15.625 kHz horizontal???
	screen.set_screen_update(FUNC(twins_state::screen_update_twins));
	screen.set_palette(m_palette);
	screen.screen_vblank().set_inputline(m_maincpu, INPUT_LINE_NMI);

	PALETTE(config, m_palette).set_entries(256);
	ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette));
	ramdac.set_addrmap(0, &twins_state::ramdac_map);
	ramdac.set_split_read(0);

	I2C_24C02(config, m_i2cmem);

	/* sound hardware */
	SPEAKER(config, "mono").front_center();

	ay8910_device &aysnd(AY8910(config, "aysnd", XTAL(16'000'000)/8)); /* verified on pcb */
	aysnd.port_a_read_callback().set_ioport("P1");
	aysnd.port_b_read_callback().set_ioport("P2");
	aysnd.add_route(ALL_OUTPUTS, "mono", 1.0);
}
示例#2
0
void sliver_state::sliver(machine_config &config)
{
	M68000(config, m_maincpu, 12000000);
	m_maincpu->set_addrmap(AS_PROGRAM, &sliver_state::sliver_map);
	m_maincpu->set_vblank_int("screen", FUNC(sliver_state::irq4_line_hold));

	TIMER(config, "obj_actel").configure_periodic(FUNC(sliver_state::obj_irq_cb), attotime::from_hz(60)); /* unknown clock, causes "obj actel ready error" without this */
	// irq 2 valid but not used?

	I8051(config, m_audiocpu, 8000000);
	m_audiocpu->set_addrmap(AS_PROGRAM, &sliver_state::soundmem_prg);
	m_audiocpu->set_addrmap(AS_IO, &sliver_state::soundmem_io);
	m_audiocpu->port_out_cb<1>().set(FUNC(sliver_state::oki_setbank));

	SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
	m_screen->set_refresh_hz(60);
	m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500));
	m_screen->set_size(64*8, 32*8);
	m_screen->set_visarea(0*8, 384-1-16, 0*8, 240-1);
	m_screen->set_screen_update(FUNC(sliver_state::screen_update));

	PALETTE(config, "palette").set_entries(0x100);
	ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette"));
	ramdac.set_addrmap(0, &sliver_state::ramdac_map);

	SPEAKER(config, "lspeaker").front_left();
	SPEAKER(config, "rspeaker").front_right();

	GENERIC_LATCH_8(config, m_soundlatch);

	okim6295_device &oki(OKIM6295(config, "oki", 1000000, okim6295_device::PIN7_HIGH));
	oki.set_addrmap(0, &sliver_state::oki_map);
	oki.add_route(ALL_OUTPUTS, "lspeaker", 0.6);
	oki.add_route(ALL_OUTPUTS, "rspeaker", 0.6);
}
示例#3
0
void wildpkr_state::wildpkr(machine_config &config)
{
	/* basic machine hardware */
	M68000(config, m_maincpu, MAIN_CLOCK);
	m_maincpu->set_addrmap(AS_PROGRAM, &wildpkr_state::wildpkr_map);
	//m_maincpu->set_vblank_int("screen", FUNC(wildpkr_state::irq2_line_hold)); // guess

	MC68681(config, m_duart, SEC_CLOCK);

	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
	screen.set_refresh_hz(60);
	screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500));
	screen.set_size(384, 280);
	screen.set_visarea(0, 384-1, 0, 280-1);
	screen.set_screen_update("acrtc", FUNC(hd63484_device::update_screen));
	screen.set_palette("palette");

	HD63484(config, "acrtc", 0).set_addrmap(0, &wildpkr_state::hd63484_map);

	ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette"));
	ramdac.set_addrmap(0, &wildpkr_state::ramdac_map);

	PALETTE(config, "palette", FUNC(wildpkr_state::wildpkr_palette), 256);

	/* sound hardware */
	SPEAKER(config, "mono").front_center();
	AY8930(config, "aysnd", AY_CLOCK).add_route(ALL_OUTPUTS, "mono", 0.50);
}
示例#4
0
文件: tr175.cpp 项目: MASHinfo/mame
INPUT_PORTS_END

void tr175_state::tr175(machine_config &config)
{
	M68000(config, m_maincpu, 12'000'000);
	m_maincpu->set_addrmap(AS_PROGRAM, &tr175_state::mem_map);

	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
	screen.set_raw(28.322_MHz_XTAL, 900, 0, 720, 449, 0, 416); // guess
	screen.set_screen_update("avdc", FUNC(scn2674_device::screen_update));

	scn2674_device &avdc(SCN2674(config, "avdc", 28.322_MHz_XTAL / 18)); // guess
	avdc.intr_callback().set_inputline("maincpu", M68K_IRQ_2);
	avdc.set_character_width(18); // guess
	avdc.set_display_callback(FUNC(tr175_state::draw_character));
	avdc.set_addrmap(0, &tr175_state::vram_map);
	avdc.set_screen("screen");

	scn2681_device &duart(SCN2681(config, "duart", 11.0592_MHz_XTAL / 3)); // is this the right clock?
	duart.irq_cb().set_inputline("maincpu", M68K_IRQ_1);

	PALETTE(config, "palette", 0x100);
	ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette"));
	ramdac.set_addrmap(0, &tr175_state::ramdac_map);
}
示例#5
0
void wildpkr_state::tabpkr(machine_config &config)
{
	/* basic machine hardware */
	M68000(config, m_maincpu, XTAL(24'000'000) / 2);
	m_maincpu->set_addrmap(AS_PROGRAM, &wildpkr_state::tabpkr_map);
	m_maincpu->set_periodic_int(FUNC(wildpkr_state::irq3_line_assert), attotime::from_hz(60*256));
	m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &wildpkr_state::cpu_space_map);

	NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); // DS1220Y

	MC68681(config, m_duart, 3686400);
	m_duart->irq_cb().set_inputline(m_maincpu, M68K_IRQ_2, ASSERT_LINE);

	DS2401(config, m_id, 0);

	CLOCK(config, m_dac_clock, 1500000); // base rate derived from program code
	m_dac_clock->signal_handler().set_inputline(m_maincpu, M68K_IRQ_5, ASSERT_LINE);

	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
	screen.set_refresh_hz(60);
	screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500));
	screen.set_size(384, 280);
	screen.set_visarea(0, 384-1, 0, 280-1);
	screen.set_screen_update("acrtc", FUNC(hd63484_device::update_screen));
	screen.set_palette("palette");
	screen.screen_vblank().set_inputline(m_maincpu, M68K_IRQ_4, ASSERT_LINE);

	HD63484(config, "acrtc", 0).set_addrmap(0, &wildpkr_state::hd63484_map);

	ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette"));
	ramdac.set_addrmap(0, &wildpkr_state::ramdac_map);

	PALETTE(config, "palette", FUNC(wildpkr_state::wildpkr_palette), 256);

	/* sound hardware */
	SPEAKER(config, "mono").front_center();
	AD557(config, m_dac, 0).add_route(ALL_OUTPUTS, "mono", 0.50);
	voltage_regulator_device &vref(VOLTAGE_REGULATOR(config, "vref"));
	vref.add_route(0, "dac", 1.0, DAC_VREF_POS_INPUT);
	vref.add_route(0, "dac", -1.0, DAC_VREF_NEG_INPUT);
}