/*LD SP,(@)*/
static void op_ED_0x7b(void)
{
temp_addr.b.l=READ_OP();
temp_addr.b.h=READ_OP();
READ_MEM(temp_word.b.l,temp_addr.w,10);
READ_MEM(temp_word.b.h,temp_addr.w+1,13);
LD_RP_FROM_ADDR_MPTR_16(SP,temp_word.w, temp_addr.w);
T_WAIT_UNTIL(16);
return;
}
/*LD BC,(@)*/
static void op_ED_0x4b(Z80EX_CONTEXT *cpu)
{
temp_addr.b.l=READ_OP();
temp_addr.b.h=READ_OP();
READ_MEM(temp_word.b.l,temp_addr.w,10);
READ_MEM(temp_word.b.h,temp_addr.w+1,13);
LD_RP_FROM_ADDR_MPTR_16(BC,temp_word.w, temp_addr.w);
T_WAIT_UNTIL(16);
return;
}
/*EX (SP),HL*/
static void op_0xe3(Z80EX_CONTEXT *cpu)
{
READ_MEM(temp_word.b.l,(SP),4);
READ_MEM(temp_word.b.h,(SP+1),7);
EX_MPTR(temp_word.w,HL);
WRITE_MEM((SP),temp_word.b.l,11);
WRITE_MEM((SP+1),temp_word.b.h,14);
T_WAIT_UNTIL(19);
return;
}
/*LD L,(HL)*/
static void op_0x6e(Z80EX_CONTEXT *cpu)
{
READ_MEM(temp_byte,(HL),4);
LD(L,temp_byte);
T_WAIT_UNTIL(7);
return;
}
/*LD A,(BC)*/
static void op_0x0a(Z80EX_CONTEXT *cpu)
{
READ_MEM(temp_byte,(BC),4);
LD_A_FROM_ADDR_MPTR(A,temp_byte, (BC));
T_WAIT_UNTIL(7);
return;
}
/*DEC (HL)*/
static void op_0x35(Z80EX_CONTEXT *cpu)
{
READ_MEM(temp_byte,(HL),4);
DEC(temp_byte);
WRITE_MEM((HL),temp_byte,8);
T_WAIT_UNTIL(11);
return;
}
/*LD A,(@)*/
static void op_0x3a(Z80EX_CONTEXT *cpu)
{
temp_addr.b.l=READ_OP();
temp_addr.b.h=READ_OP();
READ_MEM(temp_byte,temp_addr.w,10);
LD_A_FROM_ADDR_MPTR(A,temp_byte, temp_addr.w);
T_WAIT_UNTIL(13);
return;
}
/*CP (IX+$)*/
static void op_DD_0xbe(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
temp_byte_s=(temp_byte & 0x80)? -(((~temp_byte) & 0x7f)+1): temp_byte;
MEMPTR=(IX+temp_byte_s);
READ_MEM(temp_byte,(IX+temp_byte_s),12);
CP(temp_byte);
T_WAIT_UNTIL(15);
return;
}
/*DEC (IX+$)*/
static void op_DD_0x35(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
temp_byte_s=(temp_byte & 0x80)? -(((~temp_byte) & 0x7f)+1): temp_byte;
MEMPTR=(IX+temp_byte_s);
READ_MEM(temp_byte,(IX+temp_byte_s),12);
DEC(temp_byte);
WRITE_MEM((IX+temp_byte_s),temp_byte,16);
T_WAIT_UNTIL(19);
return;
}
static void zop_ED_0x34(void) { /* 0xED 0x34 : TST (HL) */
READ_MEM(temp_byte, (HL), 4);
TST(temp_byte);
T_WAIT_UNTIL(7);
}
/*maskable interrupt*/
int z80ex_int(void)
{
Z80EX_WORD inttemp;
Z80EX_BYTE iv;
unsigned long tt;
/* If the INT line is low and IFF1 is set, and there's no opcode executing just now,
a maskable interrupt is accepted, whether or not the
last INT routine has finished */
if (
!IFF1 || z80ex.noint_once || z80ex.doing_opcode || z80ex.prefix
#ifdef Z80EX_Z180_SUPPORT
|| z80ex.internal_int_disable
#endif
) return 0;
z80ex.tstate = 0;
z80ex.op_tstate = 0;
if (z80ex.halted) {
/* so we met an interrupt... stop waiting */
PC++;
z80ex.halted = 0;
}
/* When an INT is accepted, both IFF1 and IFF2 are cleared, preventing another interrupt from
occurring which would end up as an infinite loop */
IFF1 = IFF2 = 0;
/* original (NMOS) zilog z80 bug: */
/* If a LD A,I or LD A,R (which copy IFF2 to the P/V flag) is interrupted, then the P/V flag is reset, even if interrupts were enabled beforehand. */
/* (this bug was fixed in CMOS version of z80) */
if (z80ex.reset_PV_on_int) {
F = (F & ~FLAG_P);
}
z80ex.reset_PV_on_int = 0;
z80ex.int_vector_req = 1;
z80ex.doing_opcode = 1;
switch (IM) {
case IM0:
/* note: there's no need to do R++ and WAITs here, it'll be handled by z80ex_step */
tt = z80ex_step();
while(z80ex.prefix) { /* this is not the end? */
tt+=z80ex_step();
}
z80ex.tstate = tt;
break;
case IM1:
R++;
TSTATES(2); /* two extra wait-states */
/* An RST 38h is executed, no matter what value is put on the bus or what
value the I register has. 13 t-states (2 extra + 11 for RST). */
opcodes_base[0xff](); /* RST 38 */
break;
case IM2:
R++;
/* takes 19 clock periods to complete (seven to fetch the
lower eight bits from the interrupting device, six to save the program
counter, and six to obtain the jump address) */
iv=READ_OP();
T_WAIT_UNTIL(7);
inttemp = (0x100 * I) + iv;
PUSH(PC, 7, 10);
READ_MEM(PCL, inttemp++, 13); READ_MEM(PCH, inttemp, 16);
MEMPTR = PC;
T_WAIT_UNTIL(19);
break;
}
z80ex.doing_opcode = 0;
z80ex.int_vector_req = 0;
return z80ex.tstate;
}
/*
** Opcode 0xDD/0xFD
** IX/IY related instructions
*/
UBYTE Z80::indexInstructions(UWORD& I, UBYTE origOpcode)
{
UBYTE opcode = READ_MEM(PC++);
switch (opcode) {
case 0x8E: ADD8(A, READ_MEM(I + READ_MEM(PC++)), F_C); return 19;
case 0x86: ADD8(A, READ_MEM(I + READ_MEM(PC++)), 0); return 19;
case 0x09: ADD16(I, BC); return 15;
case 0x19: ADD16(I, DE); return 15;
case 0x29: ADD16(I, I); return 15;
case 0x39: ADD16(I, SP); return 15;
case 0xA6: AND(A, READ_MEM(I + READ_MEM(PC++))); return 19;
case 0xBE: CP(A, READ_MEM(I + READ_MEM(PC++))); return 19;
case 0x96: SUB8(A, READ_MEM(I + READ_MEM(PC++)), 0); return 19;
case 0xAE: XOR(A, READ_MEM(I + READ_MEM(PC++))); return 19;
case 0x35: {
UBYTE v = I + READ_MEM(PC++); UBYTE s = READ_MEM(v); DEC8(s); WRITE_MEM(v, s);
} return 23;
case 0x2B: DEC16(I); return 10;
case 0xE3: { UWORD s = READ_MEM16(SP); EX(s, I); WRITE_MEM16(SP, s); } return 23;
case 0x23: INC16(I); return 10;
case 0x34: {
UBYTE v = I + READ_MEM(PC++); UBYTE s = READ_MEM(v); INC8(s); WRITE_MEM(v, s);
} return 23;
/* JP */
case 0xE9: PC = READ_MEM16(I); return 8;
/* LD */
case 0x7E: A = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x46: B = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x4E: C = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x56: D = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x5E: E = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x66: H = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x6E: L = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0xF9: SP = I; return 19;
case 0x2A: I = READ_MEM16(READ_MEM16(PC)); PC += 2; return 20;
case 0x21: I = READ_MEM16(PC); PC += 2; return 14;
case 0x22: WRITE_MEM16(READ_MEM16(PC), I); PC += 2; return 20;
case 0x70 + 7: WRITE_MEM(I + READ_MEM(PC++), A); return 19;
case 0x70 + 0: WRITE_MEM(I + READ_MEM(PC++), B); return 19;
case 0x70 + 1: WRITE_MEM(I + READ_MEM(PC++), C); return 19;
case 0x70 + 2: WRITE_MEM(I + READ_MEM(PC++), D); return 19;
case 0x70 + 3: WRITE_MEM(I + READ_MEM(PC++), E); return 19;
case 0x70 + 4: WRITE_MEM(I + READ_MEM(PC++), H); return 19;
case 0x70 + 5: WRITE_MEM(I + READ_MEM(PC++), L); return 19;
case 0x36: WRITE_MEM(I + READ_MEM(PC), READ_MEM(PC + 1)); PC += 2; return 19;
case 0xB6: OR(A, READ_MEM(I + READ_MEM(PC++))); return 19;
case 0xE1: I = pop16(); return 14;
case 0xE5: push16(I); return 15;
case 0x9E: SUB8(A, READ_MEM(I + READ_MEM(PC++)), F_C); return 19;
case 0xCB: { // DD CB
UBYTE arg = READ_MEM(PC++);
UBYTE extOpcode = READ_MEM(PC++);
switch (extOpcode) {
#define RES_I(b) case 0x86 + 8 * b: { UBYTE s = READ_MEM(I + arg); \
RES(s, b); WRITE_MEM(I + arg, s); } return 23;
#define SET_I(b) case 0xC6 + 8 * b: { UBYTE s = READ_MEM(I + arg); \
SET(s, b); WRITE_MEM(I + arg, s); } return 23;
#define BIT_I(b) case 0x46 + 8 * b: { UBYTE s = READ_MEM(I + arg); \
BIT(s, b); WRITE_MEM(I + arg, s); } return 23;
/* BIT b,(I+N) */
BIT_I(0); BIT_I(1); BIT_I(2); BIT_I(3);
BIT_I(4); BIT_I(5); BIT_I(6); BIT_I(7);
/* RES b,(I+N) */
RES_I(0); RES_I(1); RES_I(2); RES_I(3);
RES_I(4); RES_I(5); RES_I(6); RES_I(7);
/* SET b,(I+N) */
SET_I(0); SET_I(1); SET_I(2); SET_I(3);
SET_I(4); SET_I(5); SET_I(6); SET_I(7);
case 0x16: { /* RL (I+N) */
UBYTE s = READ_MEM(I + arg); RL(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x06: { /* RLC (I+N) */
UBYTE s = READ_MEM(I + arg); RLC(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x1E: { /* RR (I+N) */
UBYTE s = READ_MEM(I + arg); RR(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x0E: { /* RRC (I+N) */
UBYTE s = READ_MEM(I + arg); RRC(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x26: { /* SLA (I+N) */
UBYTE s = READ_MEM(I + arg); SLA(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x2E: { /* SRA (I+N) */
UBYTE s = READ_MEM(I + arg); SRA(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x36: { /* SLL (I+N) */
UBYTE s = READ_MEM(I + arg); SLL(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x3E: { /* SRL (I+N) */
UBYTE s = READ_MEM(I + arg); SRL(s); WRITE_MEM(I + arg, s);
} return 23;
default:
std::cout << std::hex << "Unknown extended opcode ("
<< origOpcode << ":" << opcode << "): " << static_cast<int>(extOpcode) << std::endl;
return 0;
}
} break;
default:
std::cout << std::hex << "Unknown extended opcode ("
<< origOpcode << "): " << static_cast<int>(opcode) << std::endl;
break;
}
return 0;
}