/* USB is active ? */ static int usb_is_active(void) { unsigned long timeout = NR_UDC_WAIT_INTR_LOOP; unsigned long frame_no = REG16(USB_REG_FRAME); /* Some power charger may cause fake SOF, We must handle this situation. - River. */ int counter = 7; while (timeout && counter) { if (frame_no != REG16(USB_REG_FRAME)) { if (!--counter) break; /* Wait next frame. */ frame_no = REG16(USB_REG_FRAME); } timeout --; } D("timout: %lu, counter: %d.\n", timeout, counter); return timeout ? 1 : 0; }
void i386_device::i486_cmpxchg_rm16_r16() // Opcode 0x0f b1 { UINT8 modrm = FETCH(); if( modrm >= 0xc0 ) { UINT16 dst = LOAD_RM16(modrm); UINT16 src = LOAD_REG16(modrm); if( REG16(AX) == dst ) { STORE_RM16(modrm, src); m_ZF = 1; CYCLES(CYCLES_CMPXCHG_REG_REG_T); } else { REG16(AX) = dst; m_ZF = 0; CYCLES(CYCLES_CMPXCHG_REG_REG_F); } } else { UINT32 ea = GetEA(modrm,0); UINT16 dst = READ16(ea); UINT16 src = LOAD_REG16(modrm); if( REG16(AX) == dst ) { WRITE16(ea, src); m_ZF = 1; CYCLES(CYCLES_CMPXCHG_REG_MEM_T); } else { REG16(AX) = dst; m_ZF = 0; CYCLES(CYCLES_CMPXCHG_REG_MEM_F); } } }
void radio_wait_cmd(uint16_t *status) { uint32_t addr = (uint32_t) status; uint16_t val; #if RADIO_POLLED_MODE for (;;) { val = *REG16(addr); if (val < 3) { // idle, waiting to start, or running thread_yield(); } else { break; } } #else for (;;) { uint32_t x = cpe0_wait_irq(); val = *REG16(addr); if (val > 3) { break; } } #endif if ((val != 0x0400) && (val != 0x3400)) { dprintf(INFO, "Cmd Status %04x\n", val); } }
static void I486OP(cmpxchg_rm16_r16)(i386_state *cpustate) // Opcode 0x0f b1 { UINT8 modrm = FETCH(cpustate); if( modrm >= 0xc0 ) { UINT16 dst = LOAD_RM16(modrm); UINT16 src = LOAD_REG16(modrm); if( REG16(AX) == dst ) { STORE_RM16(modrm, src); cpustate->ZF = 1; CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_T); } else { REG16(AX) = dst; cpustate->ZF = 0; CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_F); } } else { UINT32 ea = GetEA(cpustate,modrm); UINT16 dst = READ16(cpustate,ea); UINT16 src = LOAD_REG16(modrm); if( REG16(AX) == dst ) { WRITE16(cpustate,modrm, src); cpustate->ZF = 1; CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_T); } else { REG16(AX) = dst; cpustate->ZF = 0; CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_F); } } }
/* * ======== Core_InterruptCore ======== */ Void Core_interruptCore(UInt coreId) { if (coreId == 0) { REG16(INTERRUPT_CORE_0) |= 0x1; REG16(INTERRUPT_CORE_0) &= ~0x1; } else { REG16(INTERRUPT_CORE_1) |= 0x1; REG16(INTERRUPT_CORE_1) &= ~0x1; } }
/*! * ======== InterruptDucati_intSend ======== * Send interrupt to the remote processor */ Void InterruptDucati_intSend(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo, UArg arg) { UInt key; if (remoteProcId == InterruptDucati_videoProcId || remoteProcId == InterruptDucati_vpssProcId) { if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { /* VPSS-M3 to VIDEO-M3 */ REG16(INTERRUPT_VIDEO) |= 0x1; } else { /* VIDEO-M3 to VPSS-M3 */ REG16(INTERRUPT_VPSS) |= 0x1; } } else if (remoteProcId == InterruptDucati_dspProcId) { if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { /* VPSS-M3 to DSP */ key = Hwi_disable(); if (REG32(MAILBOX_STATUS(VPSS_TO_DSP)) == 0) { REG32(MAILBOX_MESSAGE(VPSS_TO_DSP)) = arg; } Hwi_restore(key); } else { /* VIDEO-M3 to DSP */ key = Hwi_disable(); if (REG32(MAILBOX_STATUS(VIDEO_TO_DSP)) == 0) { REG32(MAILBOX_MESSAGE(VIDEO_TO_DSP)) = arg; } Hwi_restore(key); } } else { /* HOSTINT */ if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { /* VPSS-M3 to HOST */ key = Hwi_disable(); if (REG32(MAILBOX_STATUS(VPSS_TO_HOST)) == 0) { REG32(MAILBOX_MESSAGE(VPSS_TO_HOST)) = arg; } Hwi_restore(key); } else { /* VIDEO-M3 to HOST */ key = Hwi_disable(); if (REG32(MAILBOX_STATUS(VIDEO_TO_HOST)) == 0) { REG32(MAILBOX_MESSAGE(VIDEO_TO_HOST)) = arg; } Hwi_restore(key); } } }
/*! * ======== InterruptDucati_intPost ======== * Simulate an interrupt from a remote processor */ Void InterruptDucati_intPost(UInt16 srcProcId, IInterrupt_IntInfo *intInfo, UArg arg) { UInt key; if (srcProcId == InterruptDucati_videoProcId || srcProcId == InterruptDucati_vpssProcId) { if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { /* VIDEO-M3 to VPSS-M3 */ REG16(INTERRUPT_VPSS) |= 0x1; } else { /* VPSS-M3 to VIDEO-M3 */ REG16(INTERRUPT_VIDEO) |= 0x1; } } else if (srcProcId == InterruptDucati_dspProcId) { if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { /* DSP to VPSS-M3 */ key = Hwi_disable(); if (REG32(MAILBOX_STATUS(DSP_TO_VPSS)) == 0) { REG32(MAILBOX_MESSAGE(DSP_TO_VPSS)) = arg; } Hwi_restore(key); } else { /* DSP to VIDEO-M3 */ key = Hwi_disable(); if (REG32(MAILBOX_STATUS(DSP_TO_VIDEO)) == 0) { REG32(MAILBOX_MESSAGE(DSP_TO_VIDEO)) = arg; } Hwi_restore(key); } } else { /* HOSTINT */ if (!(BIOS_smpEnabled) && (Core_getId() == 1)) { /* HOST to VPSS-M3 */ key = Hwi_disable(); if (REG32(MAILBOX_STATUS(HOST_TO_VPSS)) == 0) { REG32(MAILBOX_MESSAGE(HOST_TO_VPSS)) = arg; } Hwi_restore(key); } else { /* HOST to VIDEO-M3 */ key = Hwi_disable(); if (REG32(MAILBOX_STATUS(HOST_TO_VIDEO)) == 0) { REG32(MAILBOX_MESSAGE(HOST_TO_VIDEO)) = arg; } Hwi_restore(key); } } }
/*! * ======== InterruptDucati_intClear ======== * Clear interrupt */ UInt InterruptDucati_intClear(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo) { UInt arg; if (remoteProcId == InterruptDucati_videoProcId || remoteProcId == InterruptDucati_vpssProcId) { arg = REG32(InterruptDucati_ducatiCtrlBaseAddr); /* Look at BIOS's ducati Core id */ if ((BIOS_smpEnabled) || (Core_getId() == 0)) { if ((REG16(INTERRUPT_VIDEO) & 0x1) == 0x1) { /* VPSS-M3 to VIDEO-M3 */ REG16(INTERRUPT_VIDEO) &= ~(0x1); } } else { if ((REG16(INTERRUPT_VPSS) & 0x1) == 0x1) { /* VIDEO-M3 to VPSS-M3 */ REG16(INTERRUPT_VPSS) &= ~(0x1); } } } else if ((BIOS_smpEnabled) || (Core_getId() == 0)) { if (remoteProcId == InterruptDucati_hostProcId) { /* HOST to VIDEO-M3 */ arg = REG32(MAILBOX_MESSAGE(HOST_TO_VIDEO)); REG32(MAILBOX_IRQSTATUS_CLR_VIDEO) = MAILBOX_REG_VAL(HOST_TO_VIDEO); } else { /* DSP to VIDEO-M3 */ arg = REG32(MAILBOX_MESSAGE(DSP_TO_VIDEO)); REG32(MAILBOX_IRQSTATUS_CLR_VIDEO) = MAILBOX_REG_VAL(DSP_TO_VIDEO); } } else { /* M3DSSINT */ if (remoteProcId == InterruptDucati_hostProcId) { /* HOST to VPSS-M3 */ arg = REG32(MAILBOX_MESSAGE(HOST_TO_VPSS)); REG32(MAILBOX_IRQSTATUS_CLR_VPSS) = MAILBOX_REG_VAL(HOST_TO_VPSS); } else { /* DSP to VPSS-M3 */ arg = REG32(MAILBOX_MESSAGE(DSP_TO_VPSS)); REG32(MAILBOX_IRQSTATUS_CLR_VPSS) = MAILBOX_REG_VAL(DSP_TO_VPSS); } } return (arg); }
int serial_init(void) { u32 tmp; /* GPIO setup, as needed */ #ifdef LF1000_SYS_UART_TX_PORT tmp = REG32(LF1000_GPIO_BASE+LF1000_SYS_UART_TX_PORT); tmp &= ~(0x3<<(LF1000_SYS_UART_TX_PIN)); tmp |= (LF1000_SYS_UART_TX_MODE<<(LF1000_SYS_UART_TX_PIN)); REG32(LF1000_GPIO_BASE+LF1000_SYS_UART_TX_PORT) = tmp; #endif #ifdef LF1000_SYS_UART_RX_PORT tmp = REG32(LF1000_GPIO_BASE+LF1000_SYS_UART_RX_PORT); tmp &= ~(0x3<<(LF1000_SYS_UART_RX_PIN)); tmp |= (LF1000_SYS_UART_RX_MODE<<(LF1000_SYS_UART_RX_PIN)); REG32(LF1000_GPIO_BASE+LF1000_SYS_UART_RX_PORT) = tmp; #endif /* disable UART clock */ REG32(LF1000_SYS_UART_BASE+UARTCLKENB) &= ~(1<<UARTCLKGENENB); /* clear IRQ pending, set 8 bit word length */ REG16(LF1000_SYS_UART_BASE+LCON) = (1<<SYNC_PENDCLR)|(3<<WORD_LEN); /* enable polling/IRQ transmit and receive */ REG16(LF1000_SYS_UART_BASE+UCON) = (1<<TRANS_MODE)|(1<<RECEIVE_MODE); /* reset the FIFOs */ REG16(LF1000_SYS_UART_BASE+FCON)=(1<<TX_FIFO_RESET)|(1<<RX_FIFO_RESET); /* TODO: do we need this? */ REG16(LF1000_SYS_UART_BASE+MCON) = (1<<SCRXENB); /* set the baud rate */ REG16(LF1000_SYS_UART_BASE+BRD) = 1; /*XXX*/ /*FIXME: what we want: UART_BRD(UART_PLL,LF1000_SYS_UART_BR);*/ /* configure clock source */ REG32(LF1000_SYS_UART_BASE+UARTCLKGEN) = ((UART_PLL<<UARTCLKSRCSEL)|((UARTDIV-1)<<UARTCLKDIV)); /* enable UART clock */ REG32(LF1000_SYS_UART_BASE+UARTCLKENB) |= (1<<UARTCLKGENENB); return 0; }
bool beagle_pwm_disable(BBB_PWMSS pwmid) { const bool id_is_valid = pwmid < BBB_PWMSS_COUNT; bool status = true; if (id_is_valid) { const uint32_t baseAddr = select_pwm(pwmid); REG16(baseAddr + AM335X_EPWM_TBCTL) = AM335X_EPWM_TBCTL_CTRMODE_STOPFREEZE; REG16(baseAddr + AM335X_EPWM_AQCTLA) = AM335X_EPWM_AQCTLA_ZRO_XALOW | (AM335X_EPWM_AQCTLA_CAU_EPWMXATOGGLE << AM335X_EPWM_AQCTLA_CAU_SHIFT); REG16(baseAddr + AM335X_EPWM_AQCTLB) = AM335X_EPWM_AQCTLA_ZRO_XBLOW | (AM335X_EPWM_AQCTLB_CBU_EPWMXBTOGGLE << AM335X_EPWM_AQCTLB_CBU_SHIFT); REG16(baseAddr + AM335X_EPWM_TBCNT) = 0; } else { status = false; } return status; }
/*! * ======== InterruptM3_intSend ======== * Send interrupt to the remote processor */ Void InterruptM3_intSend(UInt16 remoteProcId, UArg arg) { Log_print2(Diags_USER1, "InterruptM3_intSend: Sending interrupt with payload 0x%x to proc #%d", (IArg)arg, (IArg)remoteProcId); if (remoteProcId == sysm3ProcId) { while(REG32(MAILBOX_FIFOSTATUS(SYSM3_MBX))); REG32(MAILBOX_MESSAGE(SYSM3_MBX)) = arg; } else if (remoteProcId == appm3ProcId) { while(REG32(MAILBOX_FIFOSTATUS(APPM3_MBX))); /* Write to the mailbox, but this won't trigger an interrupt */ REG32(MAILBOX_MESSAGE(APPM3_MBX)) = arg; /* Actually trigger the interrupt */ REG16(INTERRUPT_CORE_1) |= 0x1; } else if (remoteProcId == dspProcId) { while(REG32(MAILBOX_FIFOSTATUS(DSP_MBX))); REG32(MAILBOX_MESSAGE(DSP_MBX)) = arg; } else if (remoteProcId == hostProcId) { while(REG32(MAILBOX_FIFOSTATUS(HOST_MBX))); REG32(MAILBOX_MESSAGE(HOST_MBX)) = arg; } else { /* Should never get here */ Assert_isTrue(FALSE, NULL); } }
static uint16_t rge_reg_get16(rge_t *rgep, uintptr_t regno) { RGE_TRACE(("rge_reg_get16($%p, 0x%lx)", (void *)rgep, regno)); return (ddi_get16(rgep->io_handle, REG16(rgep, regno))); }
static void rge_reg_put16(rge_t *rgep, uintptr_t regno, uint16_t data) { RGE_TRACE(("rge_reg_put16($%p, 0x%lx, 0x%x)", (void *)rgep, regno, data)); ddi_put16(rgep->io_handle, REG16(rgep, regno), data); }
void I386::get_debug_regs_info(_TCHAR *buffer, size_t buffer_len) { i386_state *cpustate = (i386_state *)opaque; my_stprintf_s(buffer, buffer_len, _T("AX=%04X BX=%04X CX=%04X DX=%04X SP=%04X BP=%04X SI=%04X DI=%04X\nDS=%04X ES=%04X SS=%04X CS=%04X IP=%04X FLAG=[%c%c%c%c%c%c%c%c%c]"), REG16(AX), REG16(BX), REG16(CX), REG16(DX), REG16(SP), REG16(BP), REG16(SI), REG16(DI), cpustate->sreg[DS].selector, cpustate->sreg[ES].selector, cpustate->sreg[SS].selector, cpustate->sreg[CS].selector, cpustate->eip, cpustate->OF ? _T('O') : _T('-'), cpustate->DF ? _T('D') : _T('-'), cpustate->IF ? _T('I') : _T('-'), cpustate->TF ? _T('T') : _T('-'), cpustate->SF ? _T('S') : _T('-'), cpustate->ZF ? _T('Z') : _T('-'), cpustate->AF ? _T('A') : _T('-'), cpustate->PF ? _T('P') : _T('-'), cpustate->CF ? _T('C') : _T('-')); }
/*! \brief program a half word at the corresponding address \param[in] address: address to program \param[in] data: halfword to program \param[out] none \retval state of FMC, refer to fmc_state_enum */ fmc_state_enum fmc_halfword_program(uint32_t address, uint16_t data) { fmc_state_enum fmc_state = FMC_READY; if(FMC_BANK0_SIZE > FMC_SIZE){ if(FMC_BANK0_END_ADDRESS > address){ fmc_state = fmc_bank0_ready_wait(FMC_TIMEOUT_COUNT); if(FMC_READY == fmc_state){ /* set the PG bit to start program */ FMC_CTL0 |= FMC_CTL0_PG; REG16(address) = data; /* wait for the FMC ready */ fmc_state = fmc_bank0_ready_wait(FMC_TIMEOUT_COUNT); /* reset the PG bit */ FMC_CTL0 &= ~FMC_CTL0_PG; } }else{ fmc_state = fmc_bank1_ready_wait(FMC_TIMEOUT_COUNT); if(FMC_READY == fmc_state){ /* set the PG bit to start program */ FMC_CTL1 |= FMC_CTL1_PG; REG16(address) = data; /* wait for the FMC ready */ fmc_state = fmc_bank1_ready_wait(FMC_TIMEOUT_COUNT); /* reset the PG bit */ FMC_CTL1 &= ~FMC_CTL1_PG; } } }else{ fmc_state = fmc_bank0_ready_wait(FMC_TIMEOUT_COUNT); if(FMC_READY == fmc_state){ /* set the PG bit to start program */ FMC_CTL0 |= FMC_CTL0_PG; REG16(address) = data; /* wait for the FMC ready */ fmc_state = fmc_bank0_ready_wait(FMC_TIMEOUT_COUNT); /* reset the PG bit */ FMC_CTL0 &= ~FMC_CTL0_PG; } } /* return the FMC state */ return fmc_state; }
void printReg32(reg_t r, reg_t scratch) { MOV32(scratch, r); //temporary r reg_t tens = scratch + 4; //tens table MOVIM32(tens, 1000000000); MOVIM32(tens+4, 100000000); MOVIM32(tens+8, 10000000); MOVIM32(tens+12, 1000000); MOVIM32(tens+16, 100000); MOVIM32(tens+20, 10000); MOVIM32(tens+24, 1000); MOVIM32(tens+28, 100); MOVIM32(tens+32, 10); MOVIM32(tens+36, 1); reg_t r_four = tens + 40; MOVIM16(r_four, 4); reg_t r_end = r_four+2; MOVIM16(r_end, tens + 40); reg_t i = r_end + 2; reg_t j = i+2; reg_t temp = j+2; MOVIM16(i, tens); GT16(j, r_end, i); while (REG16(j)) { DIV32(temp, scratch, REG16(i), temp + 5); MOVIM8(temp + 4, '0'); ADD8(temp + 4, temp + 4, temp); printChar(temp + 4); REM32(scratch, scratch, REG16(i), temp + 5); ADD16(i, i, r_four); GT16(j, r_end, i); } }
bool beagle_pwm_enable(BBB_PWMSS pwmid) { const bool id_is_valid = pwmid < BBB_PWMSS_COUNT; bool status = true; if (id_is_valid) { const uint32_t baseAddr = select_pwm(pwmid); /* Initially set EPWMxA o/p high , when increasing counter = CMPA toggle o/p of EPWMxA */ REG16(baseAddr + AM335X_EPWM_AQCTLA) = AM335X_EPWM_AQCTLA_ZRO_XAHIGH | (AM335X_EPWM_AQCTLA_CAU_EPWMXATOGGLE << AM335X_EPWM_AQCTLA_CAU_SHIFT); /* Initially set EPWMxB o/p high , when increasing counter = CMPA toggle o/p of EPWMxB */ REG16(baseAddr + AM335X_EPWM_AQCTLB) = AM335X_EPWM_AQCTLB_ZRO_XBHIGH | (AM335X_EPWM_AQCTLB_CBU_EPWMXBTOGGLE << AM335X_EPWM_AQCTLB_CBU_SHIFT); REG16(baseAddr + AM335X_EPWM_TBCNT) = 0; /* Set counter mode : Up-count mode */ REG16(baseAddr + AM335X_EPWM_TBCTL) |= AM335X_TBCTL_FREERUN | AM335X_TBCTL_CTRMODE_UP; } else { status =false; } return status; }
/*! * ======== InterruptM3_intClear ======== * Clear interrupt and return payload */ UInt InterruptM3_intClear() { UInt arg = InterruptM3_INVALIDPAYLOAD; /* First check whether incoming mailbox has a message */ if (Core_getId() == 0) { /* If FIFO is empty, return InterruptM3_INVALIDPAYLOAD */ if (REG32(MAILBOX_STATUS(SYSM3_MBX)) == 0) { return (arg); } else { /* If there is a message, return the argument to the caller */ arg = REG32(MAILBOX_MESSAGE(SYSM3_MBX)); REG32(MAILBOX_IRQSTATUS_CLR_M3) = MAILBOX_REG_VAL(SYSM3_MBX); } } else { /* Clear the inter-M3 interrupt if necessary */ if ((REG16(INTERRUPT_CORE_1) & 0x1) == 0x1) { REG16(INTERRUPT_CORE_1) &= ~(0x1); } /* If FIFO is empty, return InterruptM3_INVALIDPAYLOAD */ if (REG32(MAILBOX_STATUS(APPM3_MBX)) == 0) { return (arg); } else { /* If there is a message, return the argument to the caller */ arg = REG32(MAILBOX_MESSAGE(APPM3_MBX)); REG32(MAILBOX_IRQSTATUS_CLR_M3) = MAILBOX_REG_VAL(APPM3_MBX); if (REG32(MAILBOX_STATUS(APPM3_MBX)) != 0) { /* Trigger our own interrupt since another interrupt pending */ REG16(INTERRUPT_CORE_1) |= 0x1; } } } return (arg); }
void serial_putc(const char ch) { u16 status; if(ch == '\n') serial_putc('\r'); while(1) { /* wait for transmitter to be ready */ status = REG16(LF1000_SYS_UART_BASE+TRSTATUS); if(status & ((1<<TRANSMITTER_EMPTY)|(1<<TRANSMIT_BUFFER_EMPTY))) break; } /* transmit */ REG8(LF1000_SYS_UART_BASE+THB) = ch; }
void insertString(reg_t r, const char* str, reg_t scratch) { int i = 0; if (str == NULL) { return; } MOV16(scratch, r); while (str[i] != '\0') { MOVIM8(REG16(scratch), str[i]); INC16(scratch); i++; } }
bool I386::write_debug_reg(const _TCHAR *reg, uint32_t data) { i386_state *cpustate = (i386_state *)opaque; if(_tcsicmp(reg, _T("IP")) == 0) { cpustate->eip = data & 0xffff; CHANGE_PC(cpustate, cpustate->eip); } else if(_tcsicmp(reg, _T("AX")) == 0) { REG16(AX) = data; } else if(_tcsicmp(reg, _T("BX")) == 0) { REG16(BX) = data; } else if(_tcsicmp(reg, _T("CX")) == 0) { REG16(CX) = data; } else if(_tcsicmp(reg, _T("DX")) == 0) { REG16(DX) = data; } else if(_tcsicmp(reg, _T("SP")) == 0) { REG16(SP) = data; } else if(_tcsicmp(reg, _T("BP")) == 0) { REG16(BP) = data; } else if(_tcsicmp(reg, _T("SI")) == 0) { REG16(SI) = data; } else if(_tcsicmp(reg, _T("DI")) == 0) { REG16(DI) = data; } else if(_tcsicmp(reg, _T("AL")) == 0) { REG8(AL) = data; } else if(_tcsicmp(reg, _T("AH")) == 0) { REG8(AH) = data; } else if(_tcsicmp(reg, _T("BL")) == 0) { REG8(BL) = data; } else if(_tcsicmp(reg, _T("BH")) == 0) { REG8(BH) = data; } else if(_tcsicmp(reg, _T("CL")) == 0) { REG8(CL) = data; } else if(_tcsicmp(reg, _T("CH")) == 0) { REG8(CH) = data; } else if(_tcsicmp(reg, _T("DL")) == 0) { REG8(DL) = data; } else if(_tcsicmp(reg, _T("DH")) == 0) { REG8(DH) = data; } else { return false; } return false; }
/** * Wait until we have received a certain number of bytes * * Watch the DMA receive channel until it has the required number of bytes, * or a timeout occurs * * We keep an eye on the NSS line - if this goes high then the transaction is * over so there is no point in trying to receive the bytes. * * @param rxdma RX DMA channel to watch * @param needed Number of bytes that are needed * @param nss_regs GPIO register for NSS control line * @param nss_mask Bit to check in GPIO register (when high, we abort) * @return 0 if bytes received, -1 if we hit a timeout or NSS went high */ static int wait_for_bytes(stm32_dma_chan_t *rxdma, int needed, uint16_t *nss_reg, uint32_t nss_mask) { timestamp_t deadline; ASSERT(needed <= sizeof(in_msg)); deadline.val = 0; while (1) { if (dma_bytes_done(rxdma, sizeof(in_msg)) >= needed) return 0; if (REG16(nss_reg) & nss_mask) return -1; if (!deadline.val) { deadline = get_time(); deadline.val += SPI_CMD_RX_TIMEOUT_US; } if (timestamp_expired(deadline, NULL)) return -1; } }
/*! \brief program option bytes data \param[in] address: the option bytes address to be programmed \param[in] data: the byte to be programmed \param[out] none \retval state of FMC, refer to fmc_state_enum */ fmc_state_enum ob_data_program(uint32_t address, uint8_t data) { fmc_state_enum fmc_state = fmc_bank0_ready_wait(FMC_TIMEOUT_COUNT); if(FMC_READY == fmc_state){ /* set the OBPG bit */ FMC_CTL0 |= FMC_CTL0_OBPG; REG16(address) = data; /* wait for the FMC ready */ fmc_state = fmc_bank0_ready_wait(FMC_TIMEOUT_COUNT); if(FMC_TOERR != fmc_state){ /* reset the OBPG bit */ FMC_CTL0 &= ~FMC_CTL0_OBPG; } } /* return the FMC state */ return fmc_state; }
/* Really do USB detection */ static int do_usb_detect(struct uh_data *uh) { int rv; D("Called.\n"); __intc_mask_irq(IRQ_OTG); /* Now enable PHY to start detect */ __cpm_enable_otg_phy(); /* Clear IRQs */ REG16(USB_REG_INTRINE) = 0; REG16(USB_REG_INTROUTE) = 0; REG8(USB_REG_INTRUSBE) = 0; /* disable UDC IRQs first */ REG16(USB_REG_INTRINE) = 0; REG16(USB_REG_INTROUTE) = 0; REG8(USB_REG_INTRUSBE) = 0; /* Disable DMA */ REG32(USB_REG_CNTL1) = 0; REG32(USB_REG_CNTL2) = 0; /* Enable HS Mode */ REG8(USB_REG_POWER) |= USB_POWER_HSENAB; /* Enable soft connect */ REG8(USB_REG_POWER) |= USB_POWER_SOFTCONN; rv = usb_is_active(); /* Detect finish ,clean every thing */ /* Disconnect from usb */ REG8(USB_REG_POWER) &= ~USB_POWER_SOFTCONN; /* Disable the USB PHY */ __cpm_suspend_otg_phy(); /* Clear IRQs */ REG16(USB_REG_INTRINE) = 0; REG16(USB_REG_INTROUTE) = 0; REG8(USB_REG_INTRUSBE) = 0; __intc_ack_irq(IRQ_OTG); __intc_unmask_irq(IRQ_OTG); return rv; }
void printString(reg_t r, reg_t ret, reg_t scratch) { reg_t temp = scratch; MOV16(temp, r); //temp pointer to string scratch += 2; MOVIM8(scratch, 0); //constant i loop1: MOV8(scratch+1, REG16(temp)); EQ8(scratch+2, R_ZERO, scratch+1); if (REG8(scratch+2)) { goto loop1_end; } printChar(scratch+1); INC8(scratch); INC16(temp); goto loop1; loop1_end: MOV8(ret, scratch); }
int main(int argc, char *argv[]) { int ret; if (argc < 2) { show_usage(argv[0]); return -1; } enum ACCESS_ALIGN access_align; access_align = WORD_ACCESS; enum ACCESS_TYPE access_type = ACCESS_READ; /* default read */ unsigned int phys_address = 0; unsigned int write_value = 0; int ii = 1; while ( ii < argc ) { if ( '-' == *(argv[ii])) { if ( 'c' == *(argv[ii]+1)) { access_align = BYTE_ACCESS; } else if ( 'h' == *(argv[ii]+1)) { access_align = HALFWORD_ACCESS; } else if ( 'w' == *(argv[ii]+1)) { access_align = WORD_ACCESS; } else { printf("unknown args: %s\n", argv[ii]); show_usage(argv[0]); exit(-1); } ++ii; } else { dprintf("argc=%d, ii=%d\n", argc, ii); phys_address = strtoul(argv[ii], NULL, 0); ++ii; if ( argc == ii + 1) { access_type = ACCESS_WRITE; write_value = strtoul(argv[ii], NULL, 0); ++ii; } else { access_type = ACCESS_READ; } } }; dprintf("access_align = 0x%x\n", access_align); dprintf("access_type = 0x%x\n", access_type); dprintf("phys_address = 0x%x\n", phys_address); dprintf("write_value = 0x%x\n", write_value); if ( phys_address == 0 ) { show_usage(argv[0]); exit(1); } /* mmap address */ //address unsigned int virt_addr; ret = mmap_physical_to_virtual(phys_address, &virt_addr); if ( ret != 0 ) { printf("mmap_physical_to_virtual(%08x, ) failed ret=%d\n", phys_address, ret); exit(-1); } dprintf("virt_addr= 0x%08X\n", virt_addr); // if (access_align == WORD_ACCESS) { //volatile unsigned int * addr = (unsigned int*) virt_addr; unsigned int addr = (unsigned int) virt_addr; dprintf("addr=%08x\n", addr); if (access_type == ACCESS_READ) { unsigned int val; switch (access_align) { case BYTE_ACCESS: val = REG8(addr); break; case HALFWORD_ACCESS: val = REG16(addr); break; default: val = REG32(addr); break; } printf("0x%08X: 0x%08X\n", phys_address, (int)val); } else if (access_type == ACCESS_WRITE) { dprintf("*0x%08X=0x%08x\n", addr, write_value); switch (access_align) { case BYTE_ACCESS: REG8(addr) = write_value; break; case HALFWORD_ACCESS: REG16(addr) = write_value; break; default: REG32(addr) = write_value; break; } } munmap_address(); return 0; }
void main(void) { u32 rootfs; char *rfs_txt; u32 image = 0; struct jffs2_raw_inode *node, *mfg_node; char *cmdline = 0, *altcmdline = 0; u32 kernel_nand_addr = 0, alt_kernel_nand_addr = 0; int board_id; int done = 0; u32 ret = 0; #ifdef CPU_LF1000 /* disable the USB controller */ BIT_SET(REG16(LF1000_UDC_BASE+UDC_PCR), PCE); #endif adc_init(); board_id = load_board_id(); display_backlight(board_id); clock_init(); db_init(); display_init(); fbcon_init(); db_displaytee(1); db_puts("************************************************\n"); db_puts("* *\n"); db_puts("* OpenDidj lightning-boot 1.1 / 12 Mar 2010 *\n"); db_puts("* *\n"); db_puts("************************************************\n"); db_puts("\n\n"); #ifdef CONFIG_MACH_LF_LF1000 /* now that backlight is on, see if we have enough battery to boot */ if(gpio_get_val(LOW_BATT_PORT, LOW_BATT_PIN) == 0 && ADC_TO_MV(adc_get_reading(LF1000_ADC_VBATSENSE)) < BOOT_MIN_MV){ db_puts("PANIC: battery voltage too low!\n"); die(); } #endif /* CONFIG_MACH_LF_LF1000 */ #ifdef UBOOT_SUPPORT if(((REG32(LF1000_GPIO_BASE+GPIOCPAD) & BUTTON_MSK) == BUTTON_MSK)) { do { db_puts("xmodem download mode\n"); timer_init(); offset = 0; xmodemInit(db_putchar,db_getc_async); tmr_poll_start(2000); db_puts("Switch to 115200 baud and press any button\n"); db_puts("to start XModem download...\n"); /* set the baud rate */ #define UART16(r) REG16(LF1000_SYS_UART_BASE+r) UART16(BRD) = 1; /* FIXME (for now "1" sets 115200 baud , "11" sets 19200 baud) */ UART16(UARTCLKGEN) = ((UARTDIV-1)<<UARTCLKDIV)|(UART_PLL<<UARTCLKSRCSEL); if(tfs_load_summary(sum_buffer, BOOT0_ADDR) != 0) { db_puts("trying BOOT1\n"); if(tfs_load_summary(sum_buffer, BOOT1_ADDR)) { db_puts("u-boot not found\n"); break; } } while (!done) { if (tmr_poll_has_expired()){ if(((REG32(LF1000_GPIO_BASE+GPIOCPAD) & BUTTON_MSK) != BUTTON_MSK)) { db_displaytee(0); ret = xmodemReceive(ubcopy); db_displaytee(1); if ( ret >= 0 ) break; } if (ret == -1) db_puts("XMODEM_ERROR : REMOTECANCEL\n"); if (ret == -2) db_puts("XMODEM_ERROR : OUTOFSYNC\n"); if (ret == -3) db_puts("XMODEM_ERROR : RETRYEXCEED\n"); if ( ret < 0 ) continue; /* db_puts("Loaded : "); db_int(ret); db_puts("bytes\n"); */ } } db_puts("\n\nXModem download complete.\n"); db_puts("Transferring control to U-Boot.\n"); /* jump to u-boot */ ((void (*)( int r0, int r1, int r2))UBOOT_ADDR) (0, MACH_TYPE_LF1000, 0); /* never get here! */ die(); } while(0); } #endif /* UBOOT_SUPPORT */ /* Set up the kernel command line */ /* read entire /flags partition */ nand_read(fs_buffer, BOOT_FLAGS_ADDR, BOOT_FLAGS_SIZE); /* find rootfs file */ node = jffs2_cat((char *)fs_buffer, BOOT_FLAGS_SIZE, "rootfs"); rootfs = RFS0; if(node == 0) { db_puts("warning: failed to find rootfs flags!\n"); } else { rfs_txt = (char*)node+sizeof(struct jffs2_raw_inode)-4; if(!strncmp(rfs_txt, "RFS1", 4)) { db_puts("booting RFS1\n"); rootfs = RFS1; } #ifdef NFS_SUPPORT else if(!strncmp(rfs_txt, "NFS0", 4)) { db_puts("booting NFS0\n"); rootfs = NFS0; } else if(!strncmp(rfs_txt, "NFS1", 4)) { db_puts("booting NFS1\n"); rootfs = NFS1; } #endif /* NFS_SUPPORT */ else { db_puts("booting RFS0\n"); } } /* Find the mfcart file */ mfg_node = jffs2_cat((char *)fs_buffer, BOOT_FLAGS_SIZE, "mfcart"); if(mfg_node != 0) { db_puts("Booting with mfg cartridge layout.\n"); } /* construct the command line */ if(mfg_node == 0) { if(rootfs == RFS0) { cmdline = CMDLINE_BASE CMDLINE_RFS0 CMDLINE_UBI; altcmdline = CMDLINE_BASE CMDLINE_RFS1 CMDLINE_UBI; kernel_nand_addr = BOOT0_ADDR; alt_kernel_nand_addr = BOOT1_ADDR; } else if(rootfs == RFS1) { cmdline = CMDLINE_BASE CMDLINE_RFS1 CMDLINE_UBI; altcmdline = CMDLINE_BASE CMDLINE_RFS0 CMDLINE_UBI; kernel_nand_addr = BOOT1_ADDR; alt_kernel_nand_addr = BOOT0_ADDR; } #ifdef NFS_SUPPORT else if(rootfs == NFS0) { cmdline = CMDLINE_BASE CMDLINE_NFS CMDLINE_UBI; altcmdline = CMDLINE_BASE CMDLINE_NFS CMDLINE_UBI; kernel_nand_addr = BOOT0_ADDR; alt_kernel_nand_addr = BOOT1_ADDR; } else if(rootfs == NFS1) { cmdline = CMDLINE_BASE CMDLINE_NFS CMDLINE_UBI; altcmdline = CMDLINE_BASE CMDLINE_NFS CMDLINE_UBI; kernel_nand_addr = BOOT1_ADDR; alt_kernel_nand_addr = BOOT0_ADDR; } #endif /* NFS_SUPPORT */ } else { if(rootfs == RFS0) { cmdline = CMDLINE_BASE CMDLINE_RFS0 CMDLINE_MFG CMDLINE_UBI; altcmdline = CMDLINE_BASE CMDLINE_RFS1 CMDLINE_MFG CMDLINE_UBI; kernel_nand_addr = BOOT0_ADDR; alt_kernel_nand_addr = BOOT1_ADDR; } else if(rootfs == RFS1) { cmdline = CMDLINE_BASE CMDLINE_RFS1 CMDLINE_MFG CMDLINE_UBI; altcmdline = CMDLINE_BASE CMDLINE_RFS0 CMDLINE_MFG CMDLINE_UBI; kernel_nand_addr = BOOT1_ADDR; alt_kernel_nand_addr = BOOT0_ADDR; } #ifdef NFS_SUPPORT else if(rootfs == NFS0) { cmdline = CMDLINE_BASE CMDLINE_NFS CMDLINE_MFG CMDLINE_UBI; altcmdline = CMDLINE_BASE CMDLINE_NFS CMDLINE_MFG CMDLINE_UBI; kernel_nand_addr = BOOT0_ADDR; alt_kernel_nand_addr = BOOT1_ADDR; } else if(rootfs == NFS1) { cmdline = CMDLINE_BASE CMDLINE_NFS CMDLINE_MFG CMDLINE_UBI; altcmdline = CMDLINE_BASE CMDLINE_NFS CMDLINE_MFG CMDLINE_UBI; kernel_nand_addr = BOOT1_ADDR; alt_kernel_nand_addr = BOOT0_ADDR; } #endif /* NFS_SUPPORT */ } if(tfs_load_summary(sum_buffer, kernel_nand_addr)) { db_puts("warning: booting alternative kernel!\n"); if(tfs_load_summary(sum_buffer, alt_kernel_nand_addr)) { db_puts("PANIC: unable to load alt summary\n"); die(); } } db_stopwatch_start("LOAD KERNEL"); image = load_kernel(cmdline); db_stopwatch_stop(); if(image == 0) { db_puts("Warning: booting alternative kernel!\n"); if(tfs_load_summary(sum_buffer, alt_kernel_nand_addr) != 0) { die(); } image = load_kernel(altcmdline); if(image == 0) { db_puts("PANIC: nothing to boot\n"); die(); } } #ifdef DISPLAY_SUPPORT db_stopwatch_start("SPLASH"); db_puts("Loading bootsplash\n"); tfs_load_file("bootsplash.rgb", (u32 *)FRAME_BUFFER_ADDR); display_init(); db_stopwatch_stop(); #endif load_cart_id(); db_puts("Starting the kernel...\n"); cleanup_for_linux(); /* jump to image (void, architecture ID, atags pointer) */ ((void(*)(int r0, int r1, unsigned int r2))image) (0, MACH_TYPE_LF1000, (unsigned int)params_buffer); /* never get here! */ die(); }
int serial_getc (void) { while(!serial_tstc()); return REG16(LF1000_SYS_UART_BASE+RHB); }
/* * Check if reciever has data */ int serial_tstc (void) { return (REG16(LF1000_SYS_UART_BASE+FSTATUS) & 0xF); }
int main(void) { int ret = 0; INIT_MACHINE(); reg_t numCount = 1; reg_t upCount = 2; reg_t lowCount = 3; reg_t specialCount = 4; reg_t otherCount = 5; reg_t spaceCount = 6; MOVIM8(numCount, 0); MOVIM8(spaceCount, 0); MOVIM8(upCount, 0); MOVIM8(lowCount, 0); MOVIM8(specialCount, 0); MOVIM8(otherCount, 0); reg_t numString = 7; reg_t upString = 9; reg_t lowString = 11; reg_t spaceString = 13; reg_t specialString = 15; reg_t otherString = 17; reg_t newlineString = 19; MOVIM16(numString, ADDR(0)); MOVIM16(spaceString, ADDR(16)); MOVIM16(upString, ADDR(32)); MOVIM16(lowString, ADDR(48)); MOVIM16(specialString, ADDR(64)); MOVIM16(otherString, ADDR(80)); MOVIM16(newlineString, ADDR(96)); reg_t i = 21; // 123456789012 insertString(numString, "numbers = ", i); insertString(spaceString, "spaces = ", i); insertString(upString, "uppers = ", i); insertString(lowString, "lowers = ", i); insertString(specialString, "special = ", i); insertString(otherString, "other = ", i); //endl MOVIM8(REG16(newlineString), '\n'); MOVIM32(REG16(newlineString) + 1, 0); ret = getChar(i); while (ret != (-1)) { if (isUpLetter(i, i+1)) { INC8(upCount); } else if (isLowLetter(i, i+1)) { INC8(lowCount); } else if (isNumber(i, i+1)) { INC8(numCount); } else if (isSpace(i, i+1)) { #ifdef PATCHED INC8(spaceCount); #else INC32(spaceCount); #endif } else if (isSpecial(i, i+1)) { INC8(specialCount); } else { INC8(otherCount); } printChar(i); ret = getChar(i); } printString(numString, i, i+4); printReg8(numCount, i); printString(newlineString, i, i+4); printString(upString, i, i+4); printReg8(upCount, i); printString(newlineString, i, i+4); printString(lowString, i, i+4); printReg8(lowCount, i); printString(newlineString, i, i+4); printString(spaceString, i, i+4); printReg8(spaceCount, i); printString(newlineString, i, i+4); printString(specialString, i, i+4); printReg8(specialCount, i); printString(newlineString, i, i+4); printString(otherString, i, i+4); printReg8(otherCount, i); printString(newlineString, i, i+4); return (0); }