static void Config_PWM(void)
{
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
ROM_GPIOPinConfigure(GPIO_PB6_T0CCP0);
ROM_GPIOPinConfigure(GPIO_PB2_T3CCP0);
ROM_GPIOPinTypeTimer(GPIO_PORTB_BASE, GPIO_PIN_2 | GPIO_PIN_6);
// Configure timer
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER3);
ROM_TimerConfigure(TIMER0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PWM);
ROM_TimerLoadSet(TIMER0_BASE, TIMER_A, DEFAULT);
ROM_TimerMatchSet(TIMER0_BASE, TIMER_A, DEFAULT); // PWM
ROM_TimerEnable(TIMER0_BASE, TIMER_A);
ROM_TimerConfigure(TIMER3_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PWM);
ROM_TimerLoadSet(TIMER3_BASE, TIMER_A, DEFAULT);
ROM_TimerMatchSet(TIMER3_BASE, TIMER_A, DEFAULT); // PWM
ROM_TimerControlLevel(TIMER3_BASE, TIMER_A, true);
ROM_TimerEnable(TIMER3_BASE, TIMER_A);
ROM_SysCtlPeripheralEnable(DRV_ENABLE_LEFT_CHN_PERIPHERAL);
ROM_SysCtlPeripheralEnable(DRV_ENABLE_RIGHT_CHN_PERIPHERAL);
ROM_GPIOPinTypeGPIOOutput(DRV_ENABLE_LEFT_CHN_PORT, DRV_ENABLE_LEFT_CHN_PIN);
ROM_GPIOPinTypeGPIOOutput(DRV_ENABLE_RIGHT_CHN_PORT, DRV_ENABLE_RIGHT_CHN_PIN);
ROM_GPIOPinWrite(DRV_ENABLE_LEFT_CHN_PORT, DRV_ENABLE_LEFT_CHN_PIN, 0);
ROM_GPIOPinWrite(DRV_ENABLE_RIGHT_CHN_PORT, DRV_ENABLE_RIGHT_CHN_PIN, 0);
}
//*****************************************************************************
//
//! Initializes the sound driver.
//!
//! \param ui32SysClock is the frequency of the system clock.
//!
//! This function initializes the sound driver, preparing it to output sound
//! data to the speaker.
//!
//! The system clock should be as high as possible; lower clock rates reduces
//! the quality of the produced sound. For the best quality sound, the system
//! should be clocked at 120 MHz.
//!
//! \note In order for the sound driver to function properly, the sound driver
//! interrupt handler (SoundIntHandler()) must be installed into the vector
//! table for the timer 5 subtimer A interrupt.
//!
//! \return None.
//
//*****************************************************************************
void
SoundInit(uint32_t ui32SysClock)
{
//
// Enable the peripherals used by the sound driver.
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER5);
//
// Compute the PWM period based on the system clock.
//
g_sSoundState.ui32Period = ui32SysClock / 64000;
//
// Set the default volume.
//
g_sSoundState.i32Volume = 255;
//
// Configure the timer to run in PWM mode.
//
if((HWREG(TIMER5_BASE + TIMER_O_CTL) & TIMER_CTL_TBEN) == 0)
{
ROM_TimerConfigure(TIMER5_BASE, (TIMER_CFG_SPLIT_PAIR |
TIMER_CFG_A_PWM |
TIMER_CFG_B_PERIODIC));
}
ROM_TimerLoadSet(TIMER5_BASE, TIMER_A, g_sSoundState.ui32Period - 1);
ROM_TimerMatchSet(TIMER5_BASE, TIMER_A, g_sSoundState.ui32Period);
ROM_TimerControlLevel(TIMER5_BASE, TIMER_A, true);
//
// Update the timer values on timeouts and not immediately.
//
TimerUpdateMode(TIMER5_BASE, TIMER_A, TIMER_UP_LOAD_TIMEOUT |
TIMER_UP_MATCH_TIMEOUT);
//
// Configure the timer to generate an interrupt at every time-out event.
//
ROM_TimerIntEnable(TIMER5_BASE, TIMER_CAPA_EVENT);
//
// Enable the timer. At this point, the timer generates an interrupt
// every 15.625 us.
//
ROM_TimerEnable(TIMER5_BASE, TIMER_A);
ROM_IntEnable(INT_TIMER5A);
//
// Clear the sound flags.
//
g_sSoundState.ui32Flags = 0;
}
