/***********************************************************************************************************************
* Function Name: R_Systeminit
* Description  : This function initializes every macro.
* Arguments    : None
* Return Value : None
***********************************************************************************************************************/
void R_Systeminit(void)
{
    DI();

    /* Enable writing to registers related to operating modes, LPC, CGC and ATCM */
    SYSTEM.PRCR.LONG = 0x0000A50BU;

    /* Enable writing to MPC pin function control registers */
    MPC.PWPR.BIT.B0WI = 0U;
    MPC.PWPR.BIT.PFSWE = 1U;

    r_set_exception_handler();

    /* Set peripheral settings */
    R_CGC_Create();
    R_ICU_Create();
    R_PORT_Create();
    R_TPU_Create();
    R_RSPI1_Create();
    R_MPC_Create();
	R_SCIFA2_Create();

    /* Disable writing to MPC pin function control registers */
    MPC.PWPR.BIT.PFSWE = 0U;
    MPC.PWPR.BIT.B0WI = 1U;

    /* Enable protection */
    SYSTEM.PRCR.LONG = 0x0000A500U;
    EI();
}
示例#2
0
文件: siochar.c 项目: larks/freertos
/***********************************************************************************************************************
* Function Name: io_init_scifa2
* Description  : This function initialises SCIFA channel 2 as UART mode.
*              : The transmit and the receive of SCIFA channel 2 are enabled.
* Arguments    : none
* Return Value : none
***********************************************************************************************************************/
void io_init_scifa2 (void)
{
    /* === Initialisation of SCIFA2 if not already initialised ==== */
    if (1 == MSTP_SCIFA2)
    {
        R_SCIFA2_Create();
    }
    
    /* Ensure receive FIFO trigger is set to 1 */ 
    SCIFA2.FCR.BIT.RTRG = 0U;
        
    /* Reception triggered by one data */
    SCIFA2.FTCR.BIT.RFTC = 1u;

    /* Enable reception and receive interrupts */
    SCIFA2.SCR.BIT.RE = 1U;
    SCIFA2.SCR.BIT.RIE = 1U;
    SCIFA2.SCR.BIT.REIE = 1U;
}