/***
* decode
*/
void decrypterMessage(mpz_t *C,int taille)
{
//get private key d from privateKey_d.txt
char *str_d=malloc(KEY_LENGTH/4*sizeof(char));
ReadF(str_d,"privateKey_d");
mpz_t D;
mpz_init(D);
mpz_set_str (D, str_d,16);
free(str_d);
//get modulo N from Publickey_Modulo.txt
char *str_n=malloc(KEY_LENGTH/2*sizeof(char));
ReadF(str_n,"publicKey_Modulo");
mpz_t N;
mpz_init(N);
mpz_set_str (N, str_n,16);
free(str_n);
mpz_t DM;
mpz_init(DM);
printf("\nLe message decrypte: ");
for(int i=0;i<taille;i++)
{
mpz_powm(DM,C[i],D,N);
int dm=mpz_get_ui(DM);
printf("%c", dm);
}
printf("\n\n");
}
/***
* encode
*/
void crypterMessage(mpz_t *C,int taille)
{
//get exponents e
mpz_t e;
mpz_init(e);
mpz_set_ui (e, Exponent);
//get modulo N from Publickey_Modulo.txt
char *str_n=malloc(KEY_LENGTH/4*sizeof(char));
ReadF(str_n,"publicKey_Modulo");
mpz_t N;
mpz_init(N);
mpz_set_str (N, str_n,16);
char MsgF[100];
ReadF(MsgF,"Msg");
mpz_t M;
mpz_init(M);
for(int i=0;MsgF[i]!='\0';i++)
{
mpz_set_ui(M,MsgF[i]);
mpz_powm(M,M,e,N);
mpz_set(C[i],M);
}
printf("\nEncryter ==>==>==>==>==> succes\n");
}
/***
* show the public key <e,N>
*/
void afficherPublicKey()
{
printf("\nVotre clé publique est : <e,N> ");
gmp_printf("\n\nExponent e :%d (Ox%x) \n",Exponent,Exponent);
printf("\nModulo N (%d bits):",KEY_LENGTH);
char *str_n=malloc(KEY_LENGTH/4*sizeof(char));
ReadF(str_n,"publicKey_Modulo");
printf_16(str_n);
free(str_n);
}
t_stat cpu_vis (uint32 IR, uint32 intrq)
{
static const char *const difficulty [2] = { "hard", "easy" };
t_stat reason = SCPE_OK;
OPS op;
OP_PAT pattern;
OPSIZE opsize;
uint32 entry, subcode;
HP_WORD rtn = 0;
opsize = (IR & 004000) ? fp_t : fp_f; /* double or single precision */
entry = IR & 017; /* mask to entry point */
pattern = op_vis [entry];
if (entry == 0) { /* retrieve sub opcode */
subcode = ReadF (PR); /* get it */
if (subcode & 0100000) /* special property of ucode */
subcode = AR; /* for reentry */
PR = (PR + 1) & VAMASK; /* bump to real argument list */
pattern = (subcode & 0400) ? OP_AAKAKK : OP_AKAKAKK; /* scalar or vector operation */
}
if (pattern != OP_N) {
if (op_ftnret [entry]) { /* most VIS instrs ignore RTN addr */
rtn = ReadF (PR); /* get it */
PR = (PR + 1) & VAMASK; /* move to next argument */
}
reason = cpu_ops (pattern, op, intrq); /* get instruction operands */
if (reason != SCPE_OK) /* evaluation failed? */
return reason; /* return reason for failure */
}
switch (entry) { /* decode IR<3:0> */
case 000: /* .VECT (OP_special) */
if (subcode & 0400)
vis_svop(subcode,op,opsize); /* scalar/vector op */
else
vis_vvop(subcode,op,opsize); /* vector/vector op */
break;
case 001: /* VPIV (OP_(A)AAKAKAKK) */
vis_vpiv(op,opsize);
break;
case 002: /* VABS (OP_(A)AKAKK) */
vis_vabs(op,opsize);
break;
case 003: /* VSUM (OP_(A)AAKK) */
vis_vsmnm(op,opsize,FALSE);
break;
case 004: /* VNRM (OP_(A)AAKK) */
vis_vsmnm(op,opsize,TRUE);
break;
case 005: /* VDOT (OP_(A)AAKAKK) */
vis_vdot(op,opsize);
break;
case 006: /* VMAX (OP_(A)AAKK) */
vis_minmax(op,opsize,TRUE,FALSE);
break;
case 007: /* VMAB (OP_(A)AAKK) */
vis_minmax(op,opsize,TRUE,TRUE);
break;
case 010: /* VMIN (OP_(A)AAKK) */
vis_minmax(op,opsize,FALSE,FALSE);
break;
case 011: /* VMIB (OP_(A)AAKK) */
vis_minmax(op,opsize,FALSE,TRUE);
break;
case 012: /* VMOV (OP_(A)AKAKK) */
vis_movswp(op,opsize,FALSE);
break;
case 013: /* VSWP (OP_(A)AKAKK) */
vis_movswp(op,opsize,TRUE);
break;
case 014: /* .ERES (OP_(A)AA) */
PR = rtn;
reason = cpu_ema_eres(&PR,op[2].word,PR); /* handle the ERES instruction */
tprintf (cpu_dev, TRACE_OPND, OPND_FORMAT " return location is P+%u (%s)\n",
PR, IR, PR - err_PC, fmt_ab (PR - rtn));
break;
case 015: /* .ESEG (OP_(A)A) */
PR = rtn;
reason = cpu_ema_eseg(&PR,IR,op[0].word); /* handle the ESEG instruction */
tprintf (cpu_dev, TRACE_OPND, OPND_FORMAT " return location is P+%u (%s)\n",
PR, IR, PR - err_PC, fmt_ab (PR - rtn));
break;
case 016: /* .VSET (OP_(A)AAACCC) */
PR = rtn;
reason = cpu_ema_vset(&PR,op);
tprintf (cpu_dev, TRACE_OPND, OPND_FORMAT " return location is P+%u (%s)\n",
PR, IR, PR - err_PC,
(PR == rtn
? fmt_ab (0)
: difficulty [PR - rtn - 1]));
break;
case 017: /* [test] (OP_N) */
XR = 3; /* firmware revision */
SR = 0102077; /* test passed code */
PR = (PR + 1) & VAMASK; /* P+2 return for firmware w/VIS */
break;
default: /* others unimplemented */
reason = STOP (cpu_ss_unimpl);
}
return reason;
}
