EFI_STATUS
EFIAPI
RootBridgeIoPciWrite (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
IN UINTN Count,
IN OUT VOID *Buffer
)
/*++
Routine Description:
Pci write
Arguments:
Returns:
--*/
{
if (Buffer == NULL) {
return EFI_INVALID_PARAMETER;
}
if (Width < 0 || Width >= EfiPciWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
//
// Write Pci configuration space
//
return RootBridgeIoPciRW (This, TRUE, Width, Address, Count, Buffer);
}
EFI_STATUS
EFIAPI
RootBridgeIoPciWrite (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
IN UINTN Count,
IN OUT VOID *Buffer
)
/*++
Routine Description:
Allows write to PCI configuration space.
Arguments:
This - A pointer to EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
Width - Signifies the width of the memory operation.
Address - The address within the PCI configuration space
for the PCI controller.
Count - The number of PCI configuration operations
to perform.
Buffer - The source buffer to get the results.
Returns:
EFI_SUCCESS - The data was written to the PCI root bridge.
EFI_INVALID_PARAMETER - Invalid parameters found.
EFI_OUT_OF_RESOURCES - The request could not be completed due to a lack of
resources.
--*/
{
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
UINT32 PciBus;
UINT32 PciDev;
UINT32 PciFn;
UINT32 PciExtReg;
UINT64 ExtConfigAdd;
if (Buffer == NULL) {
return EFI_INVALID_PARAMETER;
}
if (Width < 0 || Width >= EfiPciWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
//
// Write Pci configuration space
//
PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);
if (PrivateData->HecBase == 0) {
return RootBridgeIoPciRW (This, TRUE, Width, Address, Count, Buffer);
}
if (!((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *) &Address)->ExtendedRegister) {
PciExtReg = ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *) &Address)->Register;
} else {
PciExtReg = ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *) &Address)->ExtendedRegister & 0x0FFF;
}
PciBus = ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *) &Address)->Bus;
PciDev = ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *) &Address)->Device;
PciFn = ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *) &Address)->Function;
ExtConfigAdd = (UINT64) PrivateData->HecBase + PCIE_OFF (PciBus, PciDev, PciFn, PciExtReg);
return mCpuIo->Mem.Write (
mCpuIo,
(EFI_CPU_IO_PROTOCOL_WIDTH) Width,
ExtConfigAdd,
Count,
Buffer
);
}
