示例#1
0
void hardware_clock_init(void) {
    uint8_t i;
    __disable_interrupt();               // Disable global interrupts
    // Enable XT2 pins
    P5SEL |= 0x0C;
    // Use REFO as the FLL reference
    UCSCTL3 = (UCSCTL3 & ~(SELREF_7)) | (SELREF_2);
    UCSCTL4 |= SELA__REFOCLK;          // ACLK source 
    uint16_t srRegisterState = __read_status_register() & SCG0;

    __bis_SR_register(SCG0);  
    // Set lowest possible DCOx, MODx
    UCSCTL0 = 0x0000;                         
    // Select DCO range 50MHz operation
    UCSCTL1 = DCORSEL_7 | 1;                      
    UCSCTL2 = FLLD_0 + 550;  
    __bic_SR_register(SCG0);  

    for (i=0; i<100; i++) {
        __delay_cycles(0xffff);
    }
    
    // check for oscillator fault
    while (SFRIFG1 & OFIFG) {                   
        UCSCTL7 &= ~(DCOFFG+XT1LFOFFG+XT2OFFG); 
        SFRIFG1 &= ~OFIFG;                      
    }

    SELECT_MCLK(SELM__DCOCLK);
    SELECT_ACLK(SELA__REFOCLK);
    SELECT_SMCLK(SELS__DCOCLK);
    UCSCTL7 = 0;        // Errata UCS11

    __bis_SR_register(srRegisterState);                      // Restore previous SCG0
}
void SetupClockAndPowerManagementModule(void)
{
    // see Frequency vs Supply Voltage in MSP4305438A data sheet
    SetVCore(PMMCOREV_2);

    // setup pins for XT1
    P7SEL |= BIT0 + BIT1;

    // Startup LFXT1 32 kHz crystal
    while (LFXT_Start_Timeout(XT1DRIVE_0, 50000) == UCS_STATUS_ERROR);

    // select the sources for the FLL reference and ACLK
    SELECT_ACLK(SELA__XT1CLK);
    SELECT_FLLREF(SELREF__XT1CLK);

    // 512 * 32768 = 16777216 / 1024
    Init_FLL_Settle(configCPU_CLOCK_HZ/configTICK_RATE_HZ, ACLK_MULTIPLIER);

    // Disable FLL loop control
    __bis_SR_register(SCG0);

    // setup for quick wake up from interrupt and
    // minimal power consumption in sleep mode
    DISABLE_SVSL();                           // SVS Low side is turned off
    DISABLE_SVSL_RESET();

    DISABLE_SVML();                           // Monitor low side is turned off
    DISABLE_SVML_INTERRUPT();

    DISABLE_SVMH();                           // Monitor high side is turned off
    DISABLE_SVMH_INTERRUPT();

    ENABLE_SVSH();                            // SVS High side is turned on
    ENABLE_SVSH_RESET();                      // Enable POR on SVS Event

    SVSH_ENABLED_IN_LPM_FULL_PERF();          // SVS high side Full perf mode,
    // stays on in LPM3,enhanced protect

    // Wait until high side, low side settled
    while ((PMMIFG & SVSMLDLYIFG) == 0 && (PMMIFG & SVSMHDLYIFG) == 0);
    CLEAR_PMM_IFGS();

#if CHECK_FOR_PMM15
    /* make sure error pmm15 does not exist */
    while (PMM15Check());
#endif

    if (Errata())
    {
        /* Errata PMM17 - automatic prolongation mechanism
        * SVSLOW is disabled
        */
        *(unsigned int*)(0x0110) = 0x9602;
        *(unsigned int*)(0x0112) |= 0x0800;
    }
}
示例#3
0
static void EnterShippingMode(void)
{
  /* Turn off the watchdog timer */
  WDTCTL = WDTPW + WDTHOLD;
#ifdef DIGITAL
  ClearLcd();
#endif
  ConfigResetPin(RST_PIN_ENABLED);
  
  __delay_cycles(100000);
  
  __disable_interrupt();
  __no_operation();
  
  DisableRtosTick();
  
  /* 
   * the radio draws more current in reset than it does after 
   * the patch is loaded
   */
  
  DISABLE_DISPLAY_POWER();
  DISABLE_LCD_ENABLE();
  BATTERY_CHARGE_DISABLE();
  LIGHT_SENSOR_SHUTDOWN();
  BATTERY_SENSE_DISABLE();
  HARDWARE_CFG_SENSE_DISABLE();
  APPLE_POWER_DISABLE();
  ACCELEROMETER_INT_DISABLE();
  DISABLE_BUTTONS();
  
#ifdef DIGITAL
  /* SHIPPING */
  ENABLE_SHIPPING_WAKEUP();
#endif
  
  SELECT_ACLK(SELA__REFOCLK);                
  SELECT_FLLREF(SELREF__REFOCLK); 
  UCSCTL8 &= ~SMCLKREQEN;
  UCSCTL6 |= SMCLKOFF;
  /* disable aclk */
  P11SEL &= ~BIT0;
  XT1_Stop();
  
  /* turn off the regulator */
  PMMCTL0_H = PMMPW_H;
  PMMCTL0_L = PMMREGOFF;
  __low_power_mode_4();
  __no_operation();
  __no_operation();
  
  /* should not get here without a power event */
  SoftwareReset();
}
示例#4
0
void AppUart_init(void)
{
    SELECT_ACLK(SELA__XT1CLK);              // Source ACLK from LFXT1

    P4SEL = BIT5 + BIT4;                    // P4.4,5 = USCI_A1 TXD/RXD
    UCA1CTL1 |= UCSWRST;                    // **Put state machine in reset**
    UCA1CTL0 = 0x00;
    UCA1CTL1 = UCSSEL_1 + UCSWRST;          // Use ACLK, keep RESET
    UCA1BR0 = 0x03;                         // 32kHz/9600=3.41 (see User's Guide)
    UCA1BR1 = 0x00;                         //
    UCA1MCTL = UCBRS_3 + UCBRF_0;           // Modulation UCBRSx=3, UCBRFx=0
    UCA1CTL1 &= ~UCSWRST;                   // **Initialize USCI state machine**
}
示例#5
0
static void EnterShippingMode(void)
{
  /* Turn off the watchdog timer */
  WDTCTL = WDTPW | WDTHOLD;
  
  EnableRstPin();
  
  __delay_cycles(100000);
  
  __disable_interrupt();
  __no_operation();
  
  /* 
   * the radio draws more current in reset than it does after 
   * the patch is loaded
   */
  
  DISABLE_DISPLAY_POWER();
  DISABLE_LCD_ENABLE();
  BATTERY_CHARGE_DISABLE();
  LIGHT_SENSOR_SHUTDOWN();
  BATTERY_SENSE_DISABLE();
  HARDWARE_CFG_SENSE_DISABLE();
  APPLE_POWER_DISABLE();
  ACCELEROMETER_INT_DISABLE();
  DISABLE_BUTTONS();

  SELECT_ACLK(SELA__REFOCLK);                
  SELECT_FLLREF(SELREF__REFOCLK); 
  UCSCTL8 &= ~SMCLKREQEN;
  UCSCTL6 |= SMCLKOFF;
  /* disable aclk */
  P11SEL &= ~BIT0;
  XT1_Stop();
  
  /* turn off the regulator */
  unsigned char temp = PMMCTL0_L;
  PMMCTL0_H = PMMPW_H;
  PMMCTL0_L = PMMREGOFF | temp;
  LPM4;
  __no_operation();
  __no_operation();
  
  /* should not get here without a power event */
  SoftwareReset();
}