void pia_write(int which, int offset, int data)
{
struct pia6821 *p = pia + which;
/* adjust offset for 16-bit and ordering */
offset &= 3;
if (p->addr & PIA_ALTERNATE_ORDERING) offset = swizzle_address[offset];
switch (offset)
{
/******************* port A output/DDR write *******************/
case PIA_DDRA:
/* write output register */
if (OUTPUT_SELECTED(p->ctl_a))
{
LOG(("%04x: PIA%d port A write = %02X\n", activecpu_get_previouspc(), which, data));
/* update the output value */
p->out_a = data;/* & p->ddr_a; */ /* NS990130 - don't mask now, DDR could change later */
/* send it to the output function */
if (p->intf->out_a_func && p->ddr_a) p->intf->out_a_func(0, p->out_a & p->ddr_a); /* NS990130 */
}
/* write DDR register */
else
{
LOG(("%04x: PIA%d DDR A write = %02X\n", activecpu_get_previouspc(), which, data));
if (p->ddr_a != data)
{
/* NS990130 - if DDR changed, call the callback again */
p->ddr_a = data;
/* send it to the output function */
if (p->intf->out_a_func && p->ddr_a) p->intf->out_a_func(0, p->out_a & p->ddr_a);
}
}
break;
/******************* port B output/DDR write *******************/
case PIA_DDRB:
/* write output register */
if (OUTPUT_SELECTED(p->ctl_b))
{
LOG(("%04x: PIA%d port B write = %02X\n", activecpu_get_previouspc(), which, data));
/* update the output value */
p->out_b = data;/* & p->ddr_b */ /* NS990130 - don't mask now, DDR could change later */
/* send it to the output function */
if (p->intf->out_b_func && p->ddr_b) p->intf->out_b_func(0, p->out_b & p->ddr_b); /* NS990130 */
/* CB2 is configured as output and in write strobe mode */
if (C2_OUTPUT(p->ctl_b) && C2_STROBE_MODE(p->ctl_b))
{
/* this will cause a transition low; call the output function if we're currently high */
if (p->out_cb2)
if (p->intf->out_cb2_func) p->intf->out_cb2_func(0, 0);
p->out_cb2 = 0;
/* if the CB2 strobe is cleared by the E, reset it right away */
if (STROBE_E_RESET(p->ctl_b))
{
if (p->intf->out_cb2_func) p->intf->out_cb2_func(0, 1);
p->out_cb2 = 1;
}
}
}
/* write DDR register */
else
{
LOG(("%04x: PIA%d DDR B write = %02X\n", activecpu_get_previouspc(), which, data));
if (p->ddr_b != data)
{
/* NS990130 - if DDR changed, call the callback again */
p->ddr_b = data;
/* send it to the output function */
if (p->intf->out_b_func && p->ddr_b) p->intf->out_b_func(0, p->out_b & p->ddr_b);
}
}
break;
/******************* port A control write *******************/
case PIA_CTLA:
/* Bit 7 and 6 read only - PD 16/01/00 */
data &= 0x3f;
LOG(("%04x: PIA%d control A write = %02X\n", activecpu_get_previouspc(), which, data));
/* CA2 is configured as output and in set/reset mode */
/* 10/22/98 - MAB/FMP - any C2_OUTPUT should affect CA2 */
// if (C2_OUTPUT(data) && C2_SET_MODE(data))
if (C2_OUTPUT(data))
{
/* determine the new value */
int temp = SET_C2(data) ? 1 : 0;
/* if this creates a transition, call the CA2 output function */
if (p->out_ca2 ^ temp)
if (p->intf->out_ca2_func) p->intf->out_ca2_func(0, temp);
/* set the new value */
p->out_ca2 = temp;
}
/* update the control register */
p->ctl_a = data;
/* update externals */
update_6821_interrupts(p);
break;
/******************* port B control write *******************/
case PIA_CTLB:
/* Bit 7 and 6 read only - PD 16/01/00 */
data &= 0x3f;
LOG(("%04x: PIA%d control B write = %02X\n", activecpu_get_previouspc(), which, data));
/* CB2 is configured as output and in set/reset mode */
/* 10/22/98 - MAB/FMP - any C2_OUTPUT should affect CB2 */
// if (C2_OUTPUT(data) && C2_SET_MODE(data))
if (C2_OUTPUT(data))
{
/* determine the new value */
int temp = SET_C2(data) ? 1 : 0;
/* if this creates a transition, call the CA2 output function */
if (p->out_cb2 ^ temp)
if (p->intf->out_cb2_func) p->intf->out_cb2_func(0, temp);
/* set the new value */
p->out_cb2 = temp;
}
/* update the control register */
p->ctl_b = data;
/* update externals */
update_6821_interrupts(p);
break;
}
}
void pia_write (int which, int offset, int data)
{
struct pia6821 *p = pia + which;
switch (pia_offsets[offset & 7])
{
/******************* port A output/DDR write *******************/
case 0:
/* write output register */
if (OUTPUT_SELECTED (p->ctl_a))
{
/* update the output value */
p->out_a = data & p->ddr_a;
/* send it to the output function */
if (p->out_a_func) p->out_a_func (0, p->out_a);
}
/* write DDR register */
else
p->ddr_a = data;
break;
/******************* port B output/DDR write *******************/
case 1:
/* write output register */
if (OUTPUT_SELECTED (p->ctl_b))
{
/* update the output value */
p->out_b = data & p->ddr_b;
/* send it to the output function */
if (p->out_b_func) p->out_b_func (0, p->out_b);
/* CB2 is configured as output and in write strobe mode */
if (C2_OUTPUT (p->ctl_b) && C2_STROBE_MODE (p->ctl_b))
{
/* this will cause a transition low; call the output function if we're currently high */
if (p->out_cb2)
if (p->out_cb2_func) p->out_cb2_func (0, 0);
p->out_cb2 = 0;
/* if the CB2 strobe is cleared by the E, reset it right away */
if (STROBE_E_RESET (p->ctl_b))
{
if (p->out_cb2_func) p->out_cb2_func (0, 1);
p->out_cb2 = 1;
}
}
}
/* write DDR register */
else
p->ddr_b = data;
break;
/******************* port A control write *******************/
case 2:
/* CA2 is configured as output and in set/reset mode */
/* 10/22/98 - MAB/FMP - any C2_OUTPUT should affect CA2 */
if (C2_OUTPUT (data))
{
/* determine the new value */
int temp = SET_C2 (data) ? 1 : 0;
/* if this creates a transition, call the CA2 output function */
if (p->out_ca2 ^ temp)
if (p->out_ca2_func) p->out_ca2_func (0, temp);
/* set the new value */
p->out_ca2 = temp;
}
/* update the control register */
p->ctl_a = data;
break;
/******************* port B control write *******************/
case 3:
/* CB2 is configured as output and in set/reset mode */
/* 10/22/98 - MAB/FMP - any C2_OUTPUT should affect CB2 */
if (C2_OUTPUT (data))
{
/* determine the new value */
int temp = SET_C2 (data) ? 1 : 0;
/* if this creates a transition, call the CA2 output function */
if (p->out_cb2 ^ temp)
if (p->out_cb2_func) p->out_cb2_func (0, temp);
/* set the new value */
p->out_cb2 = temp;
}
/* update the control register */
p->ctl_b = data;
break;
}
}
void C6821::Write(BYTE byRS, BYTE byData)
{
byRS &= 3;
switch( byRS )
{
/******************* port A output/DDR write *******************/
case PIA_DDRA:
// write output register
if ( OUTPUT_SELECTED( m_byCTLA ) )
{
// update the output value
m_byOA = byData;
// send it to the output function
if ( m_byDDRA )
PIA_W_CALLBACK( m_stOutA, m_byOA & m_byDDRA );
}
// write DDR register
else
{
if ( m_byDDRA != byData )
{
m_byDDRA = byData;
// send it to the output function
if ( m_byDDRA )
PIA_W_CALLBACK( m_stOutA, m_byOA & m_byDDRA );
}
}
break;
/******************* port B output/DDR write *******************/
case PIA_DDRB:
// write output register
if ( OUTPUT_SELECTED( m_byCTLB ) )
{
// update the output value
m_byOB = byData;
// send it to the output function
if ( m_byDDRB )
PIA_W_CALLBACK( m_stOutB, m_byOB & m_byDDRB );
// CB2 is configured as output and in write strobe mode
if ( C2_OUTPUT( m_byCTLB ) && C2_STROBE_MODE( m_byCTLB ) )
{
// this will cause a transition low; call the output function if we're currently high
if ( m_byOCB2 )
PIA_W_CALLBACK( m_stOutCB2, 0 );
m_byOCB2 = 0;
// if the CB2 strobe is cleared by the E, reset it right away
if ( STROBE_E_RESET( m_byCTLB ) )
{
PIA_W_CALLBACK( m_stOutCB2, 1 );
m_byOCB2 = 1;
}
}
}
// write DDR register
else
{
if ( m_byDDRB != byData )
{
m_byDDRB = byData;
// send it to the output function
if ( m_byDDRB )
PIA_W_CALLBACK( m_stOutB, m_byOB & m_byDDRB );
}
}
break;
/******************* port A control write *******************/
case PIA_CTLA:
// Bit 7 and 6 read only
byData &= 0x3f;
// CA2 is configured as output and in set/reset mode
if ( C2_OUTPUT( byData ) )
{
// determine the new value
int temp = SET_C2( byData ) ? 1 : 0;
// if this creates a transition, call the CA2 output function
if ( m_byOCA2 ^ temp)
PIA_W_CALLBACK( m_stOutCA2, temp );
// set the new value
m_byOCA2 = temp;
}
// update the control register
m_byCTLA = ( m_byCTLA & ~0x3F ) | byData;
// update externals
UpdateInterrupts();
break;
/******************* port B control write *******************/
case PIA_CTLB:
/* Bit 7 and 6 read only - PD 16/01/00 */
byData &= 0x3f;
// CB2 is configured as output and in set/reset mode
if ( C2_OUTPUT( byData ) )
{
// determine the new value
int temp = SET_C2( byData ) ? 1 : 0;
// if this creates a transition, call the CA2 output function
if ( m_byOCB2 ^ temp)
PIA_W_CALLBACK( m_stOutCB2, temp );
// set the new value
m_byOCB2 = temp;
}
// update the control register
m_byCTLB = ( m_byCTLB & ~0x3F ) | byData;
// update externals
UpdateInterrupts();
break;
}
}
