void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EwGwM(bxInstruction_c *i) { #if BX_CPU_LEVEL >= 4 Bit16u op1_16, op2_16, diff_16; BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); op1_16 = read_RMW_virtual_word(i->seg(), RMAddr(i)); diff_16 = AX - op1_16; SET_FLAGS_OSZAPC_SUB_16(AX, op1_16, diff_16); if (diff_16 == 0) { // if accumulator == dest // dest <-- src op2_16 = BX_READ_16BIT_REG(i->nnn()); write_RMW_virtual_word(op2_16); } else { // accumulator <-- dest AX = op1_16; } #else BX_INFO(("CMPXCHG_EwGw: not supported for cpu-level <= 3")); UndefinedOpcode(i); #endif }
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EwIwR(bxInstruction_c *i) { Bit16u op1_16, op2_16 = i->Iw(), diff_16; op1_16 = BX_READ_16BIT_REG(i->rm()); diff_16 = op1_16 - op2_16; SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); }
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EwR(bxInstruction_c *i) { Bit32u op1_16 = BX_READ_16BIT_REG(i->rm()); op1_16 = 0 - (Bit32s)(Bit16s)(op1_16); BX_WRITE_16BIT_REG(i->rm(), op1_16); SET_FLAGS_OSZAPC_SUB_16(0, 0 - op1_16, op1_16); BX_NEXT_INSTR(i); }
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EwIwR(bxInstruction_c *i) { Bit32u op1_16 = BX_READ_16BIT_REG(i->rm()); Bit32u op2_16 = i->Iw(); Bit32u diff_16 = op1_16 - op2_16; SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); BX_NEXT_INSTR(i); }
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_AXIw(bxInstruction_c *i) { Bit32u op1_16 = AX; Bit32u op2_16 = i->Iw(); Bit32u diff_16 = op1_16 - op2_16; SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); BX_NEXT_INSTR(i); }
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EwIwM(bxInstruction_c *i) { Bit16u op1_16, op2_16 = i->Iw(), diff_16; BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); op1_16 = read_virtual_word(i->seg(), RMAddr(i)); diff_16 = op1_16 - op2_16; SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); }
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_AXIw(bxInstruction_c *i) { Bit16u op1_16, op2_16, diff_16; op1_16 = AX; op2_16 = i->Iw(); diff_16 = op1_16 - op2_16; SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); }
void BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GwEwR(bxInstruction_c *i) { Bit16u op1_16, op2_16, diff_16; op1_16 = BX_READ_16BIT_REG(i->nnn()); op2_16 = BX_READ_16BIT_REG(i->rm()); diff_16 = op1_16 - op2_16; BX_WRITE_16BIT_REG(i->nnn(), diff_16); SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); }
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EwM(bxInstruction_c *i) { bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr); op1_16 = 0 - (Bit32s)(Bit16s)(op1_16); write_RMW_virtual_word(op1_16); SET_FLAGS_OSZAPC_SUB_16(0, 0 - op1_16, op1_16); BX_NEXT_INSTR(i); }
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EwIwM(bxInstruction_c *i) { bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); Bit32u op1_16 = read_virtual_word(i->seg(), eaddr); Bit32u op2_16 = i->Iw(); Bit32u diff_16 = op1_16 - op2_16; SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); BX_NEXT_INSTR(i); }
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GwEwR(bxInstruction_c *i) { Bit32u op1_16 = BX_READ_16BIT_REG(i->nnn()); Bit32u op2_16 = BX_READ_16BIT_REG(i->rm()); Bit32u diff_16 = op1_16 - op2_16; BX_WRITE_16BIT_REG(i->nnn(), diff_16); SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); BX_NEXT_INSTR(i); }
void BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GwEwM(bxInstruction_c *i) { Bit16u op1_16, op2_16, diff_16; BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); op1_16 = BX_READ_16BIT_REG(i->nnn()); op2_16 = read_virtual_word(i->seg(), RMAddr(i)); diff_16 = op1_16 - op2_16; BX_WRITE_16BIT_REG(i->nnn(), diff_16); SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); }
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EwGwM(bxInstruction_c *i) { bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr); Bit32u op2_16 = BX_READ_16BIT_REG(i->nnn()); Bit32u diff_16 = op1_16 - op2_16; write_RMW_virtual_word(diff_16); SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16); BX_NEXT_INSTR(i); }
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EwGwR(bxInstruction_c *i) { Bit16u op1_16 = BX_READ_16BIT_REG(i->rm()); Bit16u diff_16 = AX - op1_16; SET_FLAGS_OSZAPC_SUB_16(AX, op1_16, diff_16); if (diff_16 == 0) { // if accumulator == dest // dest <-- src BX_WRITE_16BIT_REG(i->rm(), BX_READ_16BIT_REG(i->nnn())); } else { // accumulator <-- dest AX = op1_16; } BX_NEXT_INSTR(i); }
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EwGwM(bxInstruction_c *i) { bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr); Bit16u diff_16 = AX - op1_16; SET_FLAGS_OSZAPC_SUB_16(AX, op1_16, diff_16); if (diff_16 == 0) { // if accumulator == dest // dest <-- src write_RMW_virtual_word(BX_READ_16BIT_REG(i->nnn())); } else { // accumulator <-- dest AX = op1_16; } BX_NEXT_INSTR(i); }
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EwGwR(bxInstruction_c *i) { #if BX_CPU_LEVEL >= 4 Bit16u op1_16, op2_16, diff_16; op1_16 = BX_READ_16BIT_REG(i->rm()); diff_16 = AX - op1_16; SET_FLAGS_OSZAPC_SUB_16(AX, op1_16, diff_16); if (diff_16 == 0) { // if accumulator == dest // dest <-- src op2_16 = BX_READ_16BIT_REG(i->nnn()); BX_WRITE_16BIT_REG(i->rm(), op2_16); } else { // accumulator <-- dest AX = op1_16; } #else BX_INFO(("CMPXCHG_EwGw: not supported for cpu-level <= 3")); UndefinedOpcode(i); #endif }