static void mali_platform_powerup_no_drv(void)
{
    MALI_DEBUG_PRINT(2, ("mali_platform_powerup_no_drv start!\n"));

    phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,SOC_AO_SCTRL_SC_PW_MTCMOS_EN0_ADDR(0),1,1,1);

    phy_reg_writel(SOC_PERI_SCTRL_BASE_ADDR,SOC_PERI_SCTRL_SC_PERIPH_CLKEN12_ADDR(0),0,31,0x400);
    
    phy_reg_writel(SOC_PMCTRL_BASE_ADDR,SOC_PMCTRL_GPUPLLCTRL_ADDR(0),0,31,0x7801);

    phy_reg_writel(SOC_PMCTRL_BASE_ADDR,SOC_PMCTRL_SYSPLLCTRL_ADDR(0),0,31,0x7801);

    phy_reg_writel(SOC_PMCTRL_BASE_ADDR,SOC_PMCTRL_MEDPLLCTRL_ADDR(0),0,31,0x7801);

    phy_reg_writel(SOC_MEDIA_SCTRL_BASE_ADDR,SOC_MEDIA_SCTRL_SC_MEDIA_CLKCFG2_ADDR(0),0,31,0x8100);

    phy_reg_writel(SOC_MEDIA_SCTRL_BASE_ADDR,SOC_MEDIA_SCTRL_SC_MEDIA_CLKCFG0_ADDR(0),0,31,0x84);//0x84
    
    phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,SOC_AO_SCTRL_SC_PW_RSTDIS0_ADDR(0),1,1,1);

    phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,SOC_AO_SCTRL_SC_PW_ISODIS0_ADDR(0),1,1,1);

    phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,SOC_AO_SCTRL_SC_PW_CLKEN0_ADDR(0),1,1,1);

    phy_reg_writel(SOC_MEDIA_SCTRL_BASE_ADDR,SOC_MEDIA_SCTRL_SC_MEDIA_RSTDIS_ADDR(0),0,0,1);

    phy_reg_writel(SOC_MEDIA_SCTRL_BASE_ADDR,SOC_MEDIA_SCTRL_SC_MEDIA_CLKEN_ADDR(0),0,31,0x20002);

    MALI_DEBUG_PRINT(2, ("mali_platform_powerup_no_drv end!\n"));
}
/*****************************************************************************
 function name  : mali_domain_powerup_finish
 description    : powerup finish to run
 input vars     : void
 output vars    : NA
 return value   : void
 calls          : phy_reg_writel

 called         : mali_platform_powerup

 history        :
  1.data        : 04/03/2014
    author      : s00250033
    modify      : new

*****************************************************************************/
void mali_domain_powerup_finish(void)
{
    unsigned int ret = 0;

    MALI_DEBUG_PRINT(3, ("mali power up start! \n"));
    
    phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,SOC_AO_SCTRL_SC_PW_RSTDIS0_ADDR(0),1,1,1);
    ret = phy_reg_readl(SOC_AO_SCTRL_BASE_ADDR, SOC_AO_SCTRL_SC_PW_RST_STAT0_ADDR(0), 1, 1);
    if(0 != ret)
    {
        MALI_DEBUG_PRINT(2, (" error:  SET SC_PW_RSTDIS0 failed!\n"));
    }

    phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,SOC_AO_SCTRL_SC_PW_ISODIS0_ADDR(0),1,1,1);
    ret = phy_reg_readl(SOC_AO_SCTRL_BASE_ADDR, SOC_AO_SCTRL_SC_PW_ISO_STAT0_ADDR(0), 1, 1);
    if(0 != ret)
    {
        MALI_DEBUG_PRINT(2, (" error:  SET SC_PW_ISODIS0 failed!\n"));
    }
    
    phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,SOC_AO_SCTRL_SC_PW_CLKEN0_ADDR(0),1,1,1);
    ret = phy_reg_readl(SOC_AO_SCTRL_BASE_ADDR, SOC_AO_SCTRL_SC_PW_CLK_STAT0_ADDR(0), 1, 1);
    if(1 != ret)
    {
        MALI_DEBUG_PRINT(2, (" error:  SET SC_PW_CLKEN0 failed!\n"));
    }
    
    phy_reg_writel(SOC_MEDIA_SCTRL_BASE_ADDR,SOC_MEDIA_SCTRL_SC_MEDIA_RSTDIS_ADDR(0),0,0,1);
    ret = phy_reg_readl(SOC_MEDIA_SCTRL_BASE_ADDR, SOC_MEDIA_SCTRL_SC_MEDIA_RST_STAT_ADDR(0), 0, 0);
    if(0 != ret)
    {
        MALI_DEBUG_PRINT(2, (" error:  SET SC_MEDIA_RSTDIS failed!\n"));
    }
    
    MALI_DEBUG_PRINT(3, ("mali power up end! \n"));
}
int video_harden_rstdis_isodis_clken(video_harden_dev_id_enum dev_id)
{
    int ret = 0;
    printk(KERN_INFO "dev_id is %d.\n", dev_id);

    ret = video_harden_device_id_check(dev_id);
    if (ret != 0) {
        return -1;
    }

    ret = down_interruptible(&video_harden_busy_lock);
	if (0 != ret) {
		printk(KERN_ERR "video_harden_busy_lock failed\n");
		return -1;
	}

    if ((0 == video_harden_rst_iso_clk_vote.vcodec_bit)
        && (0 == video_harden_rst_iso_clk_vote.jpeg_bit)
        && (0 == video_harden_rst_iso_clk_vote.isp_bit)) {

        /* AO_SC PW RST DIS [0x814] */
        phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,
                       SOC_AO_SCTRL_SC_PW_RSTDIS0_ADDR(CALC_REG_OFFSET),
                       SOC_AO_SCTRL_SC_PW_RSTDIS0_pw_rstdis0_2codecisp_START,
                       SOC_AO_SCTRL_SC_PW_RSTDIS0_pw_rstdis0_2codecisp_END,
                       0x1);
        /* AO_SC PW ISO DIS [0x824] */
        phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,
                       SOC_AO_SCTRL_SC_PW_ISODIS0_ADDR(CALC_REG_OFFSET),
                       SOC_AO_SCTRL_SC_PW_ISODIS0_pw_isodis0_2codecisp_START,
                       SOC_AO_SCTRL_SC_PW_ISODIS0_pw_isodis0_2codecisp_END,
                       0x1);

        /* AO_SC PW CLK EN [0x800] */
        phy_reg_writel(SOC_AO_SCTRL_BASE_ADDR,
                       SOC_AO_SCTRL_SC_PW_CLKEN0_ADDR(CALC_REG_OFFSET),
                       SOC_AO_SCTRL_SC_PW_CLKEN0_pw_clken0_2codecisp_START,
                       SOC_AO_SCTRL_SC_PW_CLKEN0_pw_clken0_2codecisp_END,
                       0x1);

        printk(KERN_INFO "video harden rstdis_isodis_clken is sucessful.\n");
    } else {
        printk(KERN_INFO "video harden rstdis_isodis_clken is already done!. \n");
    }


    switch (dev_id) {
        case VIDEO_HARDEN_DEV_ID_VCODEC: /* VCODEC */
            video_harden_rst_iso_clk_vote.vcodec_bit = 1;
            break;

        case VIDEO_HARDEN_DEV_ID_JPEG: /* JPEG */
            video_harden_rst_iso_clk_vote.jpeg_bit = 1;
            break;

        case VIDEO_HARDEN_DEV_ID_ISP: /* ISP */
            video_harden_rst_iso_clk_vote.isp_bit = 1;
            break;

        default:
            break;
    }

    up(&video_harden_busy_lock);

    printk(KERN_INFO "%s, video_harden_rst_iso_clk_vote  is 0x%x.\n",
        __func__, *((unsigned int *)&video_harden_regulator_vote));

    return ret;
}
/*****************************************************************************
 函 数 名  : drv_hifi_power_up
 功能描述  : 设置HIFI系统控制器
 输入参数  : 无
 输出参数  : 无
 返 回 值  : void
 调用函数  :
 被调函数  :

 修改历史      :
  1.日    期   : 2012年8月29日
    作    者   : 刘慈红 lKF71598
    修改内容   : 新生成函数

*****************************************************************************/
void drv_hifi_power_up(void)
{
    /*虚实地址转换*/
    unsigned long sctrl_on  = (unsigned long)HISI_VA_ADDRESS(SOC_AO_SCTRL_BASE_ADDR);
    unsigned long sctrl_off = (unsigned long)HISI_VA_ADDRESS(SOC_PERI_SCTRL_BASE_ADDR);

#ifdef CONFIG_ARCH_HI6XXX
    /* 加载前先复位hifi */
    writel(1 << SOC_PERI_SCTRL_SC_PERIPH_RSTEN1_periph_rsten1_hifi_START,
           SOC_PERI_SCTRL_SC_PERIPH_RSTEN1_ADDR(sctrl_off));

    /* PW EN 寄存器已不存在*/

    /* PW ISO DIS */
    writel(1 << SOC_AO_SCTRL_SC_PW_ISODIS0_pw_isodis0_8hifi_START,
           SOC_AO_SCTRL_SC_PW_ISODIS0_ADDR(sctrl_on));

    mdelay(1);

    /* 外设时钟使能 */
    writel(1 << SOC_PERI_SCTRL_SC_PERIPH_CLKEN1_periph_clken1_hifi_START,
           SOC_PERI_SCTRL_SC_PERIPH_CLKEN1_ADDR(sctrl_off));

    /* 打开掉电区总时钟 */
    writel(1 << SOC_AO_SCTRL_SC_PW_CLKEN0_pw_clken0_8hifi_START,
           SOC_AO_SCTRL_SC_PW_CLKEN0_ADDR(sctrl_on));

    /* 下电区总解复位 */
    writel(1 << SOC_AO_SCTRL_SC_PW_RSTDIS0_pw_rstdis0_8hifi_START,
           SOC_AO_SCTRL_SC_PW_RSTDIS0_ADDR(sctrl_on));

    /* 解复位IP */
    writel(1 << SOC_PERI_SCTRL_SC_PERIPH_RSTDIS1_periph_rstdis1_hifi_START,
           SOC_PERI_SCTRL_SC_PERIPH_RSTDIS1_ADDR(sctrl_off));

#else

    unsigned long pmctrl    = (unsigned long)HISI_VA_ADDRESS(SOC_PMCTRL_BASE_ADDR);

    /* 加载前先复位hifi */
    writel(0x1<<6, (void __iomem *)SOC_SCTRL_SC_PERIPH_RSTEN0_ADDR(sctrl_off));

    /* PW EN,默认已打开 */

    /* 关闭时钟 */
    writel(0x1<<27,  (void __iomem *)SOC_SCTRL_SC_PERIPH_CLKDIS12_ADDR(sctrl_off));

    /* 选择HIFI的PLL,源自PERIPH_PLL */
    writel(0x90, (void __iomem *)SOC_PMCTRL_CLKCFG4BIT1_ADDR(pmctrl));

    /* 配置4分频,输出360MHz */
    writel(0x83, (void __iomem *)SOC_SCTRL_SC_CLKCFG8BIT4_ADDR(sctrl_off));

    /* 外设时钟使能 */
    writel(0x1<<27,  (void __iomem *)SOC_SCTRL_SC_PERIPH_CLKEN12_ADDR(sctrl_off));

    /* 打开下电区总时钟 */
    writel(0x1<<8, (void __iomem *)SOC_AO_SCTRL_SC_PW_CLKEN0_ADDR(sctrl_on));

    mdelay(1);

    /* PW ISO DIS */
    writel(0x1<<8,  (void __iomem *)SOC_AO_SCTRL_SC_PW_ISODIS0_ADDR(sctrl_on));

    /* 下电区总解复位 */
    writel(0x1<<8,  (void __iomem *)SOC_AO_SCTRL_SC_PW_RSTDIS0_ADDR(sctrl_on));

    /* 解复位IP */
    writel(0x1<<6, (void __iomem *)SOC_SCTRL_SC_PERIPH_RSTDIS0_ADDR(sctrl_off));

    mdelay(1);
#endif
}