static gboolean
history_filter_entry_timeout_cb (gpointer data)
{
HistoryDialog *dialog = data;
HistoryDialogPrivate *p = dialog->priv;
p->filter_entry_timeout = 0;
START_PROFILER ("Clear liststore");
history_dialog_clear_view (dialog);
STOP_PROFILER ("Clear liststore");
START_PROFILER ("Setting filter");
history_dialog_setup_filter (dialog);
STOP_PROFILER ("Setting filter");
START_PROFILER ("Filling view");
history_dialog_fill_view (dialog);
STOP_PROFILER ("Filling view");
return FALSE;
}
/**
\if INCLUDE_IN_HTML_ONLY
\fn void STAT8_GLACE_AWB_ISR( void )
\brief Top level ISR
\return void
\callgraph
\callergraph
\ingroup InterruptHandler
\endif
*/
INTERRUPT void
STAT8_GLACE_AWB_ISR(void)
{
#ifdef PROFILER_USING_XTI
OstTraceInt0(TRACE_USER8, "start_xti_profiler_STAT8_GLACE_AWB_ISR");
#endif
#ifdef DEBUG_PROFILER
CpuCycleProfiler_ts *ptr_CPUProfilerData = NULL;
ptr_CPUProfilerData = &g_Profile_AWB_Statistics;
START_PROFILER();
#endif
OstTraceInt0(TRACE_DEBUG,"<INT> GLACE");
g_Interrupts_Count.u16_INT16_STAT8_Glace_AWB++;
Glace_ISR();
// Clear the interrupt output of the ITM
ITM_Clear_Interrupt_STAT8_GLACE_AWB();
#ifdef DEBUG_PROFILER
Profiler_Update(ptr_CPUProfilerData);
#endif
#ifdef PROFILER_USING_XTI
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_STAT8_GLACE_AWB_ISR : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
return;
}
/**
\if INCLUDE_IN_HTML_ONLY
\fn void STAT0_256_bins_histogram_AEC_ISR( void )
\brief Top level ISR
\return void
\callgraph
\callergraph
\ingroup InterruptHandler
\endif
*/
INTERRUPT void
STAT0_256_bins_histogram_AEC_ISR(void)
{
#ifdef DEBUG_PROFILER
CpuCycleProfiler_ts *ptr_CPUProfilerData = NULL;
#endif
#ifdef PROFILER_USING_XTI
OstTraceInt0(TRACE_USER8, "start_xti_profiler_STAT0_256_bins_histogram_AEC_ISR");
#endif
#ifdef DEBUG_PROFILER
ptr_CPUProfilerData = &g_Profile_AEC_Statistics;
START_PROFILER();
#endif
OstTraceInt0(TRACE_DEBUG,"<INT> HISTO");
Histogram_ISR();
g_Interrupts_Count.u16_INT08_STAT0_256_bins_histogram++;
// Clear the interrupt output of the ITM
ITM_Clear_Interrupt_STAT0_256_Bin_Histogram_AEC();
#ifdef DEBUG_PROFILER
Profiler_Update(ptr_CPUProfilerData);
#endif
#ifdef PROFILER_USING_XTI
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_STAT0_256_bins_histogram_AEC_ISR : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
return;
}
void ProcessVideoCompletePipe(uint8_t pipe_no)
{
#ifdef DEBUG_PROFILER
START_PROFILER();
#endif
if(0 == pipe_no)
{
VideoComplete_Pipe0();
g_Interrupts_Count.u16_INT06_VIDEOPIPE0++;
if(Is_ISP_CE0_IDP_GATE_ISP_CE0_IDP_GATE_ENABLE_mux2to1_enable_DISABLE())
{
Set_ISP_CE0_IDP_GATE_ISP_CE0_IDP_GATE_ENABLE(mux2to1_enable_ENABLE, mux2to1_soft_reset_B_0x0);
OstTraceInt0(TRACE_FLOW, "ENABLING CE0");
}
#if DEBUG_PROFILER
Profiler_Update(&g_Profile_VID0);
#endif
}
else if (1 == pipe_no)
{
VideoComplete_Pipe1();
g_Interrupts_Count.u16_INT07_VIDEOPIPE1++;
if(Is_ISP_CE1_IDP_GATE_ISP_CE1_IDP_GATE_ENABLE_mux2to1_enable_DISABLE())
{
Set_ISP_CE1_IDP_GATE_ISP_CE1_IDP_GATE_ENABLE(mux2to1_enable_ENABLE, mux2to1_soft_reset_B_0x0);
OstTraceInt0(TRACE_FLOW, "ENABLING CE1");
}
#if DEBUG_PROFILER
Profiler_Update(&g_Profile_VID1);
#endif
}
}
/**
\if INCLUDE_IN_HTML_ONLY
\fn void STAT7_ACC_Wg_Zones_ISR( void )
\brief This is the top level interrupt service routine for White balance Acc Wg Zones
\return void
\callgraph
\callergraph
\ingroup InterruptHandler
\endif
*/
INTERRUPT void
STAT7_ACC_Wg_Zones_ISR(void)
{
#if WEIGHTED_STATS_PROCESSOR_INCLUDE_WEIGHTED_STATS_PROCESSOR
#ifdef DEBUG_PROFILER
START_PROFILER();
#endif
g_Interrupts_Count.u16_INT15_STAT7_Acc_Wg_Zones_White_Balance++;
Weighted_Statistics_Processor_ExtractMeanStatistics();
gu8_WbStatsTriggered = Flag_e_TRUE;
// Clear the interrupt output of the ITM
ITM_Clear_Interrupt_STAT7_ACC_WG_ZONES();
#ifdef DEBUG_PROFILER
Profiler_Update(&g_Profile_AWB_Statistics);
#endif
return;
#endif // WEIGHTED_STATS_PROCESSOR_INCLUDE_WEIGHTED_STATS_PROCESSOR
}
/**
\if INCLUDE_IN_HTML_ONLY
\fn void STAT1_Acc_6x8_Exposure( void )
\brief This is the top level interrupt service routine for exposure.
\return void
\callgraph
\callergraph
\ingroup InterruptHandler
\endif
*/
INTERRUPT void
STAT1_Acc_6x8_Exposure(void)
{
#if EXPOSURE_STATS_PROCESSOR_6x8_ZONES
#ifdef DEBUG_PROFILER
START_PROFILER();
#endif
ExpStats_8x6_Statistics_ISR();
g_Interrupts_Count.u16_INT09_STAT1_6X8_Exposure++;
gu8_ExpStatsTriggered = Flag_e_TRUE;
// Clear the interrupt output of the ITM
ITM_Clear_Interrupt_STAT1_Acc_8x6zones();
#ifdef DEBUG_PROFILER
Profiler_Update(&g_Profile_AEC_Statistics);
#endif
return;
#endif // EXPOSURE_STATS_PROCESSOR_6x8_ZONES
}
/**
\if INCLUDE_IN_HTML_ONLY
\fn void Histogram_AEC_SCHEDULE_ISR( void )
\brief Top level Histogram ISR
\return void
\callgraph
\callergraph
\ingroup InterruptHandler
\endif
*/
INTERRUPT void
Histogram_AEC_SCHEDULE_ISR(void)
{
#ifdef PROFILER_USING_XTI
OstTraceInt0(TRACE_USER8, "start_xti_profiler_Histogram_Export_ISR");
CpuCycleProfiler_ts *ptr_CPUProfilerData = NULL;
CpuCycleProfiler_ts cpu_profiler_data = DEFAULT_VALUES_CPUCYCLEPROFILER;
ptr_CPUProfilerData = &cpu_profiler_data;
START_PROFILER();
#endif
g_Interrupts_Count.u16_INT20_STAT0_256_bins_histogram_Schedule++;
Histogram_ExportISR();
// Clear the interrupt output of the ITM
ITM_Clear_Interrupt_Histogram_Schedule();
#ifdef PROFILER_USING_XTI
Profiler_Update(ptr_CPUProfilerData);
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_Histogram_Export_ISR : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
return;
}
/**
\if INCLUDE_IN_HTML_ONLY
\fn void STAT8_GLACE_AWB_ISR( void )
\brief Top level Glace ISR
\return void
\callgraph
\callergraph
\ingroup InterruptHandler
\endif
*/
INTERRUPT void
STAT8_GLACE_SCHEDULE_ISR(void)
{
#ifdef PROFILER_USING_XTI
CpuCycleProfiler_ts *ptr_CPUProfilerData = NULL;
OstTraceInt0(TRACE_USER8, "start_xti_profiler_GLACE_EXPORT_ISR");
CpuCycleProfiler_ts cpu_profiler_data = DEFAULT_VALUES_CPUCYCLEPROFILER;
ptr_CPUProfilerData = &cpu_profiler_data;
START_PROFILER();
#endif
g_Interrupts_Count.u16_INT01_STAT8_Glace_Schedule++;
Glace_ExportISR();
// Clear the interrupt output of the ITM
ITM_Clear_Interrupt_STAT8_GLACE_AWB();
#ifdef PROFILER_USING_XTI
Profiler_Update(ptr_CPUProfilerData);
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_GLACE_EXPORT_ISR : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
return;
}
static gboolean
ephy_spinner_load_images (EphySpinner *spinner)
{
EphySpinnerDetails *details = spinner->details;
if (details->need_load)
{
START_PROFILER ("ephy_spinner_load_images")
details->images =
ephy_spinner_cache_get_images
(details->cache,
gtk_widget_get_screen (GTK_WIDGET (spinner)),
details->size);
STOP_PROFILER ("ephy_spinner_load_images")
details->current_image = 0; /* 'rest' icon */
details->need_load = FALSE;
}
return details->images != NULL;
}
static void
update_encoding_menu_cb (GtkAction *dummy, GaleonEncodingMenu *menu)
{
GaleonEncodingMenuPrivate *p = menu->priv;
GaleonEmbed *embed;
GtkAction *action;
GaleonEncodingPageInfo *page_info;
const GaleonEncodingInfo *info;
char name[128];
const char *encoding;
GList *recent = NULL, *related = NULL, *l;
/* get most recently used encodings */
recent = galeon_encodings_get_recent (p->encodings);
embed = galeon_window_get_active_embed (p->window);
page_info = galeon_embed_get_encoding_info (embed);
if (page_info == NULL)
{
build_menu (menu, NULL, NULL);
return;
}
LOG ("encoding information enc='%s', forced=%s", page_info->encoding,
(page_info->forced ? "Yes" : "No") );
START_PROFILER ("Building encoding menu");
encoding = page_info->encoding;
info = galeon_encodings_get_encoding (p->encodings, encoding);
g_return_if_fail (info != NULL);
/* set the encodings group's active member */
g_snprintf (name, sizeof (name), "Encoding%s", encoding);
action = gtk_action_group_get_action (p->action_group, name);
if (action == NULL)
{
action = add_action (info, menu);
}
/* FIXME: block the "activate" signal on the actions instead; needs to
* wait until g_signal_handlers_block_matched supports blocking
* by signal id alone.
*/
menu->priv->update_tag = TRUE;
/* set the encodings group's active member */
gtk_toggle_action_set_active (GTK_TOGGLE_ACTION (action), TRUE);
/* check if encoding was overridden */
action = gtk_action_group_get_action (p->action_group,
"ViewEncodingAutomatic");
gtk_toggle_action_set_active (GTK_TOGGLE_ACTION (action), !page_info->forced);
g_object_set (G_OBJECT (action), "sensitive", page_info->forced, NULL);
/* get encodings related to the current encoding */
related = galeon_encodings_get_encodings (p->encodings, info->group);
related = g_list_sort (related, (GCompareFunc) compare_encodings);
menu->priv->update_tag = FALSE;
/* add the current encoding to the list of things to display */
if (g_list_find (related, info) == NULL)
{
related = g_list_prepend (related, (GaleonEncodingInfo*)info);
}
/* make sure related and recent are disjoint so we don't display twice */
for (l = related; l != NULL; l = l->next)
{
recent = g_list_remove (recent, l->data);
}
recent = g_list_sort (recent, (GCompareFunc) compare_encodings);
build_menu (menu, recent, related);
STOP_PROFILER ("Building encoding menu");
/* cleanup */
g_list_free (related);
g_list_free (recent);
galeon_encoding_page_info_free (page_info);
}
/**
\if INCLUDE_IN_HTML_ONLY
\fn void Video_Pipe1_ISR( void )
\brief This is the top level interrupt service routine for video complete PIPE1.
\return void
\callgraph
\callergraph
\ingroup InterruptHandler
\endif
*/
INTERRUPT void
Video_Pipe1_ISR(void)
{
#ifdef PROFILER_USING_XTI
OstTraceInt0(TRACE_USER8, "start_xti_profiler_Video_Pipe1_ISR");
#endif
#ifdef DEBUG_PROFILER
CpuCycleProfiler_ts *ptr_CPUProfilerData = NULL;
ptr_CPUProfilerData = &g_Profile_VID1;
START_PROFILER();
#endif
/*
OstTraceInt1(TRACE_DEBUG, "VID1: gu8_DMCEInterruptRxed: %d", gu8_DMCEInterruptRxed);
OstTraceInt2(TRACE_DEBUG, "VID1: Active Pipe0: %d, Pipe1: %d", SystemConfig_IsPipe0Active(), SystemConfig_IsPipe1Active());
OstTraceInt2(TRACE_DEBUG, "VID1: Interrupt Pending Pipe0: %d, Pipe1: %d", g_PipeStatus[0].e_Flag_VideoCompleteInterruptPending, g_PipeStatus[1].e_Flag_VideoCompleteInterruptPending);
*/
//Here it is checking whether any request is there for zoom or gamma update on Pipe1. If yes then it is disabling the CE1.
if
(
(!ZoomTop_isFrameApplicationControl_ScalarParamApplied()) || (Gamma_isUpdateGammaRequestPending(1))
)
{
OstTraceInt0(TRACE_FLOW, "DISABLING CE1");
Set_ISP_CE1_IDP_GATE_ISP_CE1_IDP_GATE_ENABLE(mux2to1_enable_DISABLE, mux2to1_soft_reset_B_0x0);
}
if (Flag_e_TRUE == gu8_DMCEInterruptRxed)
{
//DMCE interrupt already came and other pipe interrupt is either not expected or already came. So do the required processing.
if(!SystemConfig_IsPipe0Active())
{
ProcessVideoCompletePipe(1);
gu8_DMCEInterruptRxed = Flag_e_FALSE;
}
else
{
if(g_PipeStatus[0].e_Flag_VideoCompleteInterruptPending != Flag_e_FALSE)
{
//we will program the both pipes in vid complete of other pipe.
}
else
{
ProcessVideoCompletePipe(0);
ProcessVideoCompletePipe(1);
gu8_DMCEInterruptRxed = Flag_e_FALSE;
}
}
}
g_PipeStatus[1].e_Flag_VideoCompleteInterruptPending = Flag_e_FALSE;
if( Flag_e_TRUE == g_SystemConfig_Status.e_Flag_FireDummyVidComplete1 )
{
g_SystemConfig_Status.e_Flag_FireDummyVidComplete1 = Flag_e_FALSE;
// ProcessVideoCompletePipe1();
}
// Clear the interrupt output of the ITM
ITM_ClearInterrupt_VIDEO_PIPE1();
#ifdef DEBUG_PROFILER
Profiler_Update(ptr_CPUProfilerData);
#endif
#ifdef PROFILER_USING_XTI
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_Video_Pipe1_ISR : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
return;
}
/**
\if INCLUDE_IN_HTML_ONLY
\fn void Smia_Rx_ISR( void )
\brief This is the top level interrupt service routine for the SMIA RX.
\return void
\callgraph
\callergraph
\ingroup InterruptHandler
\endif
*/
INTERRUPT void
Smia_Rx_ISR(void)
{
/// \par Implementation
/// The following operations are performed in sequence:
/// - Invoke the SMIA Rx routine
/// - Clear the SMIA Rx interrupt at ISP interrupt handler.
// Branch to SMIA Rx Routine
#ifdef DEBUG_PROFILER
CpuCycleProfiler_ts* ptr_CPUProfilerData = NULL;
#endif
g_Interrupts_Count.u16_INT05_SMIARX++;
if (Get_ITM_ITM_SMIARX_STATUS_SMIARX_0_STATUS())
{
#ifdef PROFILER_USING_XTI
OstTraceInt0(TRACE_USER8, "start_xti_profiler_SMIARX_0");
#endif
#ifdef DEBUG_PROFILER
ptr_CPUProfilerData = &g_Profile_LCO;
START_PROFILER();
#endif
g_Interrupts_Count.u16_INT05_SMIARX0++;
SMIA_LC0_ISR();
Set_ITM_ITM_SMIARX_STATUS_BCLR_SMIARX_0_STATUS_BCLR(1);
#ifdef DEBUG_PROFILER
Profiler_Update(ptr_CPUProfilerData);
#endif
#ifdef PROFILER_USING_XTI
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_SMIARX_0 : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
}
if (Get_ITM_ITM_SMIARX_STATUS_SMIARX_1_STATUS())
{
#ifdef PROFILER_USING_XTI
OstTraceInt0(TRACE_USER8, "start_xti_profiler_SMIARX_1");
#endif
#ifdef DEBUG_PROFILER
ptr_CPUProfilerData = &g_Profile_ISPUpdate;
START_PROFILER();
#endif
g_Interrupts_Count.u16_INT05_SMIARX1++;
SMIA_ISPUpdate_ISR();
Set_ITM_ITM_SMIARX_STATUS_BCLR_SMIARX_1_STATUS_BCLR(1);
#ifdef DEBUG_PROFILER
Profiler_Update(ptr_CPUProfilerData);
#endif
#ifdef PROFILER_USING_XTI
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_SMIARX_1 : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
}
if (Get_ITM_ITM_SMIARX_STATUS_SMIARX_2_STATUS())
{
#ifdef PROFILER_USING_XTI
OstTraceInt0(TRACE_USER8, "start_xti_profiler_SMIARX_2");
CpuCycleProfiler_ts cpu_profiler_data = DEFAULT_VALUES_CPUCYCLEPROFILER;
ptr_CPUProfilerData = &cpu_profiler_data;
START_PROFILER();
#endif
g_Interrupts_Count.u16_INT05_SMIARX2++;
// SMIA_STOP_RX_ISR();
Set_ITM_ITM_SMIARX_STATUS_BCLR_SMIARX_2_STATUS_BCLR(1);
#ifdef PROFILER_USING_XTI
Profiler_Update(ptr_CPUProfilerData);
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_SMIARX_2 : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
}
if (Get_ITM_ITM_SMIARX_STATUS_SMIARX_3_STATUS())
{
#ifdef PROFILER_USING_XTI
OstTraceInt0(TRACE_USER8, "start_xti_profiler_SMIARX_3");
CpuCycleProfiler_ts cpu_profiler_data = DEFAULT_VALUES_CPUCYCLEPROFILER;
ptr_CPUProfilerData = &cpu_profiler_data;
START_PROFILER();
#endif
g_Interrupts_Count.u16_INT05_SMIARX3++;
SMIA_RX_ISR_FRAME_END();
Set_ITM_ITM_SMIARX_STATUS_BCLR_SMIARX_3_STATUS_BCLR(1);
#ifdef PROFILER_USING_XTI
Profiler_Update(ptr_CPUProfilerData);
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_SMIARX_3 : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
}
if (Get_ITM_ITM_SMIARX_STATUS_SMIARX_4_STATUS())
{
#ifdef PROFILER_USING_XTI
OstTraceInt0(TRACE_USER8, "start_xti_profiler_SMIARX_4");
CpuCycleProfiler_ts cpu_profiler_data = DEFAULT_VALUES_CPUCYCLEPROFILER;
ptr_CPUProfilerData = &cpu_profiler_data;
START_PROFILER();
#endif
g_Interrupts_Count.u16_INT05_SMIARX4++;
Set_ITM_ITM_SMIARX_STATUS_BCLR_SMIARX_4_STATUS_BCLR(1);
#ifdef PROFILER_USING_XTI
Profiler_Update(ptr_CPUProfilerData);
OstTraceInt1(TRACE_USER8, "stop_xti_profiler_SMIARX_4 : %d ",ptr_CPUProfilerData->u32_CurrentCycles);
#endif
}
return;
}
static int
ephy_node_db_write_to_xml_valist (EphyNodeDb *db,
const xmlChar *filename,
const xmlChar *root,
const xmlChar *version,
const xmlChar *comment,
EphyNode *first_node,
va_list argptr)
{
xmlTextWriterPtr writer;
EphyNode *node;
int ret;
LOG ("Saving node db to %s", filename);
START_PROFILER ("Saving node db")
/* FIXME: do we want to turn compression on ? */
writer = xmlNewTextWriterFilename ((const char *)filename, 0);
if (writer == NULL)
{
return -1;
}
ret = xmlTextWriterSetIndent (writer, 1);
if (ret < 0) goto out;
ret = xmlTextWriterSetIndentString (writer, (const xmlChar *)" ");
if (ret < 0) goto out;
ret = xmlTextWriterStartDocument (writer, "1.0", NULL, NULL);
if (ret < 0) goto out;
ret = xmlTextWriterStartElement (writer, root);
if (ret < 0) goto out;
ret = xmlTextWriterWriteAttribute (writer, (const xmlChar *)"version", version);
if (ret < 0) goto out;
if (comment != NULL)
{
ret = xmlTextWriterWriteComment (writer, comment);
if (ret < 0) goto out;
}
node = first_node;
while (node != NULL)
{
GPtrArray *children;
EphyNodeFilterFunc filter;
gpointer user_data;
int i;
filter = va_arg (argptr, EphyNodeFilterFunc);
user_data = va_arg (argptr, gpointer);
children = ephy_node_get_children (node);
for (i = 0; i < children->len; i++)
{
EphyNode *kid;
kid = g_ptr_array_index (children, i);
if (!filter || filter (kid, user_data))
{
ret = ephy_node_write_to_xml (kid, writer);
if (ret < 0) break;
}
}
if (ret < 0) break;
node = va_arg (argptr, EphyNode *);
}
if (ret < 0) goto out;
ret = xmlTextWriterEndElement (writer); /* root */
if (ret < 0) goto out;
ret = xmlTextWriterEndDocument (writer);
if (ret < 0) goto out;
out:
xmlFreeTextWriter (writer);
STOP_PROFILER ("Saving node db")
return ret >= 0 ? 0 : -1;
}
static gboolean
load_iso_entries (int iso,
GFunc read_entry_func,
gpointer user_data)
{
xmlTextReaderPtr reader;
ParserState state = STATE_START;
xmlChar iso_entries[32], iso_entry[32];
char *filename;
int ret = -1;
LOG ("Loading ISO-%d codes", iso);
START_PROFILER ("Loading ISO codes");
filename = g_strdup_printf (ISO_CODES_PREFIX "/share/xml/iso-codes/iso_%d.xml", iso);
reader = xmlNewTextReaderFilename (filename);
if (reader == NULL) goto out;
xmlStrPrintf (iso_entries, sizeof (iso_entries),
(const xmlChar*)"iso_%d_entries", iso);
xmlStrPrintf (iso_entry, sizeof (iso_entry),
(const xmlChar*)"iso_%d_entry", iso);
ret = xmlTextReaderRead (reader);
while (ret == 1)
{
const xmlChar *tag;
xmlReaderTypes type;
tag = xmlTextReaderConstName (reader);
type = xmlTextReaderNodeType (reader);
if (state == STATE_ENTRIES &&
type == XML_READER_TYPE_ELEMENT &&
xmlStrEqual (tag, iso_entry))
{
read_entry_func (reader, user_data);
}
else if (state == STATE_START &&
type == XML_READER_TYPE_ELEMENT &&
xmlStrEqual (tag, iso_entries))
{
state = STATE_ENTRIES;
}
else if (state == STATE_ENTRIES &&
type == XML_READER_TYPE_END_ELEMENT &&
xmlStrEqual (tag, iso_entries))
{
state = STATE_STOP;
}
else if (type == XML_READER_TYPE_SIGNIFICANT_WHITESPACE ||
type == XML_READER_TYPE_WHITESPACE ||
type == XML_READER_TYPE_TEXT ||
type == XML_READER_TYPE_COMMENT)
{
/* eat it */
}
else
{
/* ignore it */
}
ret = xmlTextReaderRead (reader);
}
xmlFreeTextReader (reader);
out:
if (ret < 0 || state != STATE_STOP)
{
/* This is not critical, we will fallback to our own code */
LOG ("Failed to load ISO-%d codes from %s!\n",
iso, filename);
g_free (filename);
return FALSE;
}
g_free (filename);
STOP_PROFILER ("Loading ISO codes");
return TRUE;
}
