/*************************************************************************//**
*****************************************************************************/
void HAL_Init(void)
{
// Switch to 8MHz clock (disable prescaler)
SYSCTRL_OSC8M = (SYSCTRL_OSC8M & ~SYSCTRL_OSC8M_PRESC_MSK) | SYSCTRL_OSC8M_PRESC(0);
SYS_EnableInterrupts();
HAL_TimerInit();
halPhyInit();
}
/**
* \brief Initializes clock generators
*
* All GCLK generators are running when this function returns.
*/
void _sysctrl_init_sources(void)
{
void *hw = (void *)SYSCTRL;
uint16_t calib;
#if CONF_XOSC32K_CONFIG == 1
hri_sysctrl_write_XOSC32K_reg(hw,
( CONF_XOSC32K_WRTLOCK << SYSCTRL_XOSC32K_WRTLOCK_Pos ) |
SYSCTRL_XOSC32K_STARTUP(CONF_XOSC32K_STARTUP) |
( CONF_XOSC32K_RUNSTDBY << SYSCTRL_XOSC32K_RUNSTDBY_Pos ) |
( CONF_XOSC32K_AAMPEN << SYSCTRL_XOSC32K_AAMPEN_Pos ) |
( CONF_XOSC32K_EN1K << SYSCTRL_XOSC32K_EN1K_Pos ) |
( CONF_XOSC32K_EN32K << SYSCTRL_XOSC32K_EN32K_Pos ) |
( CONF_XOSC32K_XTALEN << SYSCTRL_XOSC32K_XTALEN_Pos ) |
( CONF_XOSC32K_ENABLE << SYSCTRL_XOSC32K_ENABLE_Pos ));
#endif
#if CONF_XOSC_CONFIG == 1
hri_sysctrl_write_XOSC_reg(hw, SYSCTRL_XOSC_STARTUP(
CONF_XOSC_STARTUP) |
( CONF_XOSC_AMPGC << SYSCTRL_XOSC_AMPGC_Pos ) |
SYSCTRL_XOSC_GAIN(CONF_XOSC_GAIN) |
( CONF_XOSC_RUNSTDBY << SYSCTRL_XOSC_RUNSTDBY_Pos ) |
( CONF_XOSC_XTALEN << SYSCTRL_XOSC_XTALEN_Pos ) |
( CONF_XOSC_ENABLE << SYSCTRL_XOSC_ENABLE_Pos ));
#endif
#if CONF_OSC8M_CONFIG == 1
calib = hri_sysctrl_read_OSC8M_CALIB_bf(hw);
hri_sysctrl_write_OSC8M_reg(hw,
SYSCTRL_OSC8M_FRANGE(hri_sysctrl_read_OSC8M_FRANGE_bf(hw)) |
# if CONF_OSC8M_OVERWRITE_CALIBRATION == 1
SYSCTRL_OSC8M_CALIB(CONF_OSC8M_CALIB) |
# else
SYSCTRL_OSC8M_CALIB(calib) |
# endif
SYSCTRL_OSC8M_PRESC(CONF_OSC8M_PRESC) |
( CONF_OSC8M_RUNSTDBY << SYSCTRL_OSC8M_RUNSTDBY_Pos ) |
( CONF_OSC8M_ENABLE << SYSCTRL_OSC8M_ENABLE_Pos ));
#endif
#if CONF_OSC32K_CONFIG == 1
calib = SYSCTRL->OSC32K.bit.CALIB;
hri_sysctrl_write_OSC32K_reg(hw,
# if CONF_OSC32K_OVERWRITE_CALIBRATION == 1
SYSCTRL_OSC32K_CALIB(CONF_OSC32K_CALIB) |
# else
SYSCTRL_OSC32K_CALIB(calib) |
# endif
( CONF_OSC32K_WRTLOCK << SYSCTRL_OSC32K_WRTLOCK_Pos ) |
SYSCTRL_OSC32K_STARTUP(CONF_OSC32K_STARTUP) |
( CONF_OSC32K_RUNSTDBY << SYSCTRL_OSC32K_RUNSTDBY_Pos ) |
( CONF_OSC32K_EN1K << SYSCTRL_OSC32K_EN1K_Pos ) |
( CONF_OSC32K_EN32K << SYSCTRL_OSC32K_EN32K_Pos ) |
( 1 << SYSCTRL_OSC32K_ENABLE_Pos ));
#else
/* Enable OSC32K anyway since GCLK configuration may need it to sync */
hri_sysctrl_set_OSC32K_ENABLE_bit(hw);
#endif
#if CONF_OSCULP32K_CONFIG == 1
hri_sysctrl_write_OSCULP32K_reg(hw,
# if OSC32K_OVERWRITE_CALIBRATION == 1
SYSCTRL_OSCULP32K_CALIB(OSCULP32K_CALIB) |
# else
SYSCTRL_OSCULP32K_CALIB(calib) |
# endif
( CONF_OSC32K_WRTLOCK << SYSCTRL_OSCULP32K_WRTLOCK_Pos ));
#endif
#if CONF_XOSC32K_CONFIG == 1
# if CONF_XOSC32K_ENABLE == 1
while (!hri_sysctrl_get_PCLKSR_XOSC32KRDY_bit(hw)) {;
}
# endif
# if CONF_XOSC32K_ONDEMAND == 1
hri_sysctrl_set_XOSC32K_ONDEMAND_bit(hw);
# endif
#endif
#if CONF_XOSC_CONFIG == 1
# if CONF_XOSC_ENABLE == 1
while (!hri_sysctrl_get_PCLKSR_XOSCRDY_bit(hw)) {;
}
# endif
# if CONF_XOSC_ONDEMAND == 1
hri_sysctrl_set_XOSC_ONDEMAND_bit(hw);
# endif
#endif
#if CONF_OSC32K_CONFIG == 1
# if CONF_OSC32K_ENABLE == 1
while (!hri_sysctrl_get_PCLKSR_OSC32KRDY_bit(hw)) {;
}
# endif
# if CONF_OSC32K_ONDEMAND == 1
hri_sysctrl_set_OSC32K_ONDEMAND_bit(hw);
# endif
#endif
#if CONF_OSC8M_CONFIG == 1
# if CONF_OSC8M_ENABLE == 1
while (!hri_sysctrl_get_PCLKSR_OSC8MRDY_bit(hw)) {;
}
# endif
# if CONF_OSC8M_ONDEMAND == 1
hri_sysctrl_set_OSC8M_ONDEMAND_bit(hw);
# endif
#endif
(void)calib, (void)hw;
}
