示例#1
0
static void
radv_make_buffer_descriptor(struct radv_device *device,
			    struct radv_buffer *buffer,
			    VkFormat vk_format,
			    unsigned offset,
			    unsigned range,
			    uint32_t *state)
{
	const struct vk_format_description *desc;
	unsigned stride;
	uint64_t gpu_address = device->ws->buffer_get_va(buffer->bo);
	uint64_t va = gpu_address + buffer->offset;
	unsigned num_format, data_format;
	int first_non_void;
	desc = vk_format_description(vk_format);
	first_non_void = vk_format_get_first_non_void_channel(vk_format);
	stride = desc->block.bits / 8;

	num_format = radv_translate_buffer_numformat(desc, first_non_void);
	data_format = radv_translate_buffer_dataformat(desc, first_non_void);

	va += offset;
	state[0] = va;
	state[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
		S_008F04_STRIDE(stride);
	state[2] = range;
	state[3] = S_008F0C_DST_SEL_X(radv_map_swizzle(desc->swizzle[0])) |
		   S_008F0C_DST_SEL_Y(radv_map_swizzle(desc->swizzle[1])) |
		   S_008F0C_DST_SEL_Z(radv_map_swizzle(desc->swizzle[2])) |
		   S_008F0C_DST_SEL_W(radv_map_swizzle(desc->swizzle[3])) |
		   S_008F0C_NUM_FORMAT(num_format) |
		   S_008F0C_DATA_FORMAT(data_format);
}
示例#2
0
static void write_buffer_descriptor(struct radv_device *device,
                                    struct radv_cmd_buffer *cmd_buffer,
                                    unsigned *dst,
                                    struct radeon_winsys_bo **buffer_list,
                                    const VkDescriptorBufferInfo *buffer_info)
{
	RADV_FROM_HANDLE(radv_buffer, buffer, buffer_info->buffer);
	uint64_t va = radv_buffer_get_va(buffer->bo);
	uint32_t range = buffer_info->range;

	if (buffer_info->range == VK_WHOLE_SIZE)
		range = buffer->size - buffer_info->offset;

	va += buffer_info->offset + buffer->offset;
	dst[0] = va;
	dst[1] = S_008F04_BASE_ADDRESS_HI(va >> 32);
	dst[2] = range;
	dst[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
		S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
		S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
		S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
		S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
		S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);

	if (cmd_buffer)
		radv_cs_add_buffer(device->ws, cmd_buffer->cs, buffer->bo, 7);
	else
		*buffer_list = buffer->bo;
}
示例#3
0
static void si_set_constant_buffer(struct pipe_context *ctx, uint shader, uint slot,
                                   struct pipe_constant_buffer *input)
{
    struct si_context *sctx = (struct si_context *)ctx;
    struct si_buffer_resources *buffers = &sctx->const_buffers[shader];

    if (shader >= SI_NUM_SHADERS)
        return;

    assert(slot < buffers->desc.num_elements);
    pipe_resource_reference(&buffers->buffers[slot], NULL);

    /* CIK cannot unbind a constant buffer (S_BUFFER_LOAD is buggy
     * with a NULL buffer). We need to use a dummy buffer instead. */
    if (sctx->b.chip_class == CIK &&
            (!input || (!input->buffer && !input->user_buffer)))
        input = &sctx->null_const_buf;

    if (input && (input->buffer || input->user_buffer)) {
        struct pipe_resource *buffer = NULL;
        uint64_t va;

        /* Upload the user buffer if needed. */
        if (input->user_buffer) {
            unsigned buffer_offset;

            si_upload_const_buffer(sctx,
                                   (struct r600_resource**)&buffer, input->user_buffer,
                                   input->buffer_size, &buffer_offset);
            if (!buffer) {
                /* Just unbind on failure. */
                si_set_constant_buffer(ctx, shader, slot, NULL);
                return;
            }
            va = r600_resource(buffer)->gpu_address + buffer_offset;
        } else {
            pipe_resource_reference(&buffer, input->buffer);
            va = r600_resource(buffer)->gpu_address + input->buffer_offset;
        }

        /* Set the descriptor. */
        uint32_t *desc = buffers->desc.list + slot*4;
        desc[0] = va;
        desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
                  S_008F04_STRIDE(0);
        desc[2] = input->buffer_size;
        desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
                  S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
                  S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
                  S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
                  S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
                  S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);

        buffers->buffers[slot] = buffer;
        r600_context_bo_reloc(&sctx->b, &sctx->b.rings.gfx,
                              (struct r600_resource*)buffer,
                              buffers->shader_usage, buffers->priority);
        buffers->desc.enabled_mask |= 1llu << slot;
    } else {