示例#1
0
void	Mapper112::Write( WORD addr, BYTE data )
{
	switch( addr ) {
		case	0x8000:
			reg[0] = data;
			SetBank_CPU();
			SetBank_PPU();
			break;
		case	0xA000:
			reg[1] = data;
			switch( reg[0] & 0x07 ) {
				case	0x00:
					prg0 = (data&(PROM_8K_SIZE-1));
					SetBank_CPU();
					break;
				case	0x01:
					prg1 = (data&(PROM_8K_SIZE-1));
					SetBank_CPU();
					break;
				case	0x02:
					chr01 = data & 0xFE;
					SetBank_PPU();
					break;
				case	0x03:
					chr23 = data & 0xFE;
					SetBank_PPU();
					break;
				case	0x04:
					chr4 = data;
					SetBank_PPU();
					break;
				case	0x05:
					chr5 = data;
					SetBank_PPU();
					break;
				case	0x06:
					chr6 = data;
					SetBank_PPU();
					break;
				case	0x07:
					chr7 = data;
					SetBank_PPU();
					break;
			}
			break;

		case	0xC000:
			reg[3] = data;
			SetBank_PPU();

		case	0xE000:
			reg[2] = data;
			if( !nes->rom->Is4SCREEN() ) {
				if( data & 0x01 ) SetVRAM_Mirror( VRAM_HMIRROR );
				else		  SetVRAM_Mirror( VRAM_VMIRROR );
			}
			SetBank_PPU();
			break;
	}
}
示例#2
0
//////////////////////////////////////////////////////////////////////////
// Mapper119  TQ-ROM                                                    //
//////////////////////////////////////////////////////////////////////////
void	Mapper119::Reset()
{
    patch = 0;

    for( INT i = 0; i < 8; i++ ) {
        reg[i] = 0x00;
    }

    prg0 = 0;
    prg1 = 1;
    SetBank_CPU();

    chr01 = 0;
    chr23 = 2;
    chr4  = 4;
    chr5  = 5;
    chr6  = 6;
    chr7  = 7;
    SetBank_PPU();

    we_sram  = 0;	// Disable
    irq_enable = 0;	// Disable
    irq_counter = 0;
    irq_latch = 0;
}
示例#3
0
//////////////////////////////////////////////////////////////////////////
// Mapper074  Nintendo MMC3                                             //
//////////////////////////////////////////////////////////////////////////
void	Mapper074::Reset()
{
	for( INT i = 0; i < 8; i++ ) {
		reg[i] = 0x00;
	}
	prg0 = 0;
	prg1 = 1;
	SetBank_CPU();

	chr01 = 0;
	chr23 = 2;
	chr4  = 4;
	chr5  = 5;
	chr6  = 6;
	chr7  = 7;
	SetBank_PPU();

	we_sram  = 0;	// Disable
	irq_enable = 0;	// Disable
	irq_counter = 0;
	irq_latch = 0;
	irq_request = 0;

	DWORD	crc = nes->rom->GetPROM_CRC();

	patch = 0;
	if( crc == 0x37ae04a8 ) {
		patch = 1;
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
}
示例#4
0
//////////////////////////////////////////////////////////////////////////
// Mapper118  IQS MMC3                                                  //
//////////////////////////////////////////////////////////////////////////
void	Mapper118::Reset()
{
INT	i;

	for( i = 0; i < 8; i++ ) {
		reg[i] = 0x00;
	}

	prg0 = 0;
	prg1 = 1;
	SetBank_CPU();

	if( VROM_1K_SIZE ) {
		chr01 = 0;
		chr23 = 2;
		chr4  = 4;
		chr5  = 5;
		chr6  = 6;
		chr7  = 7;

		SetBank_PPU();
	} else {
		chr01 = 0;
		chr23 = 0;
		chr4  = 0;
		chr5  = 0;
		chr6  = 0;
		chr7  = 0;
	}

	we_sram  = 0;	// Disable
	irq_enable = 0;	// Disable
	irq_counter = 0;
	irq_latch = 0;
}
示例#5
0
//////////////////////////////////////////////////////////////////////////
// Mapper047  NES-QJ                                                    //
//////////////////////////////////////////////////////////////////////////
void	Mapper047::Reset()
{
	patch = 0;

	if( nes->rom->GetPROM_CRC() == 0x7eef434c ) {
		patch = 1;
	}

	for( INT i = 0; i < 8; i++ ) {
		reg[i] = 0;
	}

	bank = 0;
	prg0 = 0;
	prg1 = 1;

	// set VROM banks
	if( VROM_1K_SIZE ) {
		chr01 = 0;
		chr23 = 2;
		chr4  = 4;
		chr5  = 5;
		chr6  = 6;
		chr7  = 7;
	} else {
		chr01 = chr23 = chr4 = chr5 = chr6 = chr7 = 0;
	}

	SetBank_CPU();
	SetBank_PPU();

	irq_enable = 0;
	irq_counter = 0;
	irq_latch = 0;
}
示例#6
0
void	Mapper187::WriteLow( WORD addr, BYTE data )
{
	last_write = data;
	if( addr == 0x5000 ) {
		ext_mode = data;
		if( data & 0x80 ) {
			if( data & 0x20 ) {
				prg[0] = ((data&0x1E)<<1)+0;
				prg[1] = ((data&0x1E)<<1)+1;
				prg[2] = ((data&0x1E)<<1)+2;
				prg[3] = ((data&0x1E)<<1)+3;
			} else {
				prg[2] = ((data&0x1F)<<1)+0;
				prg[3] = ((data&0x1F)<<1)+1;
			}
		} else {
			prg[0] = bank[6];
			prg[1] = bank[7];
			prg[2] = PROM_8K_SIZE-2;
			prg[3] = PROM_8K_SIZE-1;
		}
		SetBank_CPU();
	}
	else	if( addr > 0x5000 && addr <= 0x5FFF ) {
		XRAM[addr-0x4000] = data;
	} else {
		Mapper::WriteLow( addr, data );
	}
}
示例#7
0
//////////////////////////////////////////////////////////////////////////
// Mapper187  Street Fighter Zero 2 97                                  //
//////////////////////////////////////////////////////////////////////////
void	Mapper187::Reset()
{
INT	i;

	for( i = 0; i < 8; i++ ) {
		chr[i] = 0x00;
		bank[i] = 0x00;
	}

	prg[0] = PROM_8K_SIZE-4;
	prg[1] = PROM_8K_SIZE-3;
	prg[2] = PROM_8K_SIZE-2;
	prg[3] = PROM_8K_SIZE-1;
	SetBank_CPU();

	ext_mode = 0;
	chr_mode = 0;
	ext_enable = 0;

	irq_enable = 0;
	irq_counter = 0;
	irq_latch = 0;

	last_write = 0;

	nes->SetRenderMethod( NES::POST_ALL_RENDER );
}
示例#8
0
//////////////////////////////////////////////////////////////////////////
// Mapper254  Pokemon Pirate Cart                                       //
//////////////////////////////////////////////////////////////////////////
void	Mapper254::Reset()
{
	for( INT i = 0; i < 8; i++ ) {
		reg[i] = 0x00;
	}

	protectflag = 0;

	prg0 = 0;
	prg1 = 1;
	SetBank_CPU();

	chr01 = 0;
	chr23 = 2;
	chr4  = 4;
	chr5  = 5;
	chr6  = 6;
	chr7  = 7;
	SetBank_PPU();

	irq_enable = 0;	// Disable
	irq_counter = 0;
	irq_latch = 0;
	irq_request = 0;
}
示例#9
0
void	Mapper004::Reset()
{
	for( INT i = 0; i < 8; i++ ) {
		reg[i] = 0x00;
	}

	prg0 = 0;
	prg1 = 1;
	SetBank_CPU();

	chr01 = 0;
	chr23 = 2;
	chr4  = 4;
	chr5  = 5;
	chr6  = 6;
	chr7  = 7;
	SetBank_PPU();

	we_sram  = 0;	// Disable
	irq_enable = 0;	// Disable
	irq_counter = 0;
	irq_latch = 0xFF;
	irq_request = 0;
	irq_preset = 0;
	irq_preset_vbl = 0;

	// IRQタイプ設定
	nes->SetIrqType( NES::IRQ_CLOCK );
	irq_type = 0;

	KT_bank = 0;
}
示例#10
0
void	Mapper047::WriteLow( WORD addr, BYTE data )
{
	if( addr == 0x6000 ) {
		if( patch ) {
			bank = (data & 0x06) >> 1;
		} else {
			bank = (data & 0x01) << 1;
		}
		SetBank_CPU();
		SetBank_PPU();
	}
示例#11
0
//////////////////////////////////////////////////////////////////////////
// Mapper194  WaiXingTypeD Base ON Nintendo MMC3                        //
//////////////////////////////////////////////////////////////////////////
void	Mapper194::Reset()
{
	for( INT i = 0; i < 8; i++ ) {
		reg[i] = 0x00;
		chr[i] = i;
	}
	prg[0] = 0x00;
	prg[1] = 0x01;
	prg[2] = 0x3e;
	prg[3] = 0x3f;
	SetBank_CPU();
	SetBank_PPU();

	irq_enable=irq_counter=irq_latch=irq_request = 0;
}
示例#12
0
void	Mapper191::Reset()
{
	for( INT i = 0; i < 8; i++ ) {
		reg[i] = 0x00;
	}

	prg0 = 0;
//	prg1 = 1;
	SetBank_CPU();

	chr0 = 0;
	chr1 = 0;
	chr2 = 0;
	chr3 = 0;
	highbank = 0;
	SetBank_PPU();
}
示例#13
0
//////////////////////////////////////////////////////////////////////////
// Mapper198  Nintendo MMC3                                             //
//////////////////////////////////////////////////////////////////////////
void	Mapper198::Reset()
{
	for( INT i = 0; i < 8; i++ ) {
		reg[i] = 0x00;
	}

	prg0 = 0;
	prg1 = 1;
	SetBank_CPU();

	chr01 = 0;
	chr23 = 2;
	chr4  = 4;
	chr5  = 5;
	chr6  = 6;
	chr7  = 7;
	SetBank_PPU();
}
示例#14
0
void	Mapper114::Write( WORD addr, BYTE data )
{
	if( addr == 0xE003 ) {
		irq_counter = data;
	} else
	if( addr == 0xE002 ) {
		irq_occur = 0;
		nes->cpu->ClrIRQ( IRQ_MAPPER );
	} else {
		switch( addr & 0xE000 ) {
			case	0x8000:
				if( data & 0x01 ) SetVRAM_Mirror( VRAM_HMIRROR );
				else		  SetVRAM_Mirror( VRAM_VMIRROR );
				break;
			case	0xA000:
				reg_c = 1;
				reg_a = data;
				break;
			case	0xC000:
				if( !reg_c ) {
					break;
				}
				reg_b[reg_a&0x07] = data;
				switch( reg_a & 0x07 ) {
					case	0:
					case	1:
					case	2:
					case	3:
					case	6:
					case	7:
						SetBank_PPU();
						break;
					case	4:
					case	5:
						SetBank_CPU();
						break;
				}
				reg_c = 0;
				break;
		}
	}
}
示例#15
0
//////////////////////////////////////////////////////////////////////////
// Mapper165  Fire Emblem Chinese version                               //
//////////////////////////////////////////////////////////////////////////
void	Mapper165::Reset()
{
	for( INT i = 0; i < 8; i++ ) {
		reg[i] = 0x00;
	}
	prg0 = 0;
	prg1 = 1;
	SetBank_CPU();

	chr0 = 0;
	chr1 = 0;
	chr2 = 4;
	chr3 = 4;
	latch = 0xFD;
	SetBank_PPU();

	we_sram  = 0;	// Disable

	nes->ppu->SetChrLatchMode( TRUE );
}
示例#16
0
void	Mapper191::WriteLow( WORD addr, BYTE data )
{
	switch( addr ) {
		case	0x4100:
			reg[0]=data;
			break;
		case	0x4101:
			reg[1]=data;
			switch( reg[0] ) {
				case	0:
					chr0=data&7;
					SetBank_PPU();
					break;
				case	1:
					chr1=data&7;
					SetBank_PPU();
					break;
				case	2:
					chr2=data&7;
					SetBank_PPU();
					break;
				case	3:
					chr3=data&7;
					SetBank_PPU();
					break;
				case	4:
					highbank=data&7;
					SetBank_PPU();
					break;
				case	5:
					prg0=data&7;
					SetBank_CPU();
					break;
				case	7:
					if( data & 0x02 ) SetVRAM_Mirror( VRAM_HMIRROR );
					else		  SetVRAM_Mirror( VRAM_VMIRROR );
					break;
			}
			break;
	}
}
示例#17
0
void	Mapper090::Write( WORD addr, BYTE data )
{
	switch( addr & 0xF007 ) {
		case	0x8000:
		case	0x8001:
		case	0x8002:
		case	0x8003:
			prg_reg[addr&3] = data;
			SetBank_CPU();
			break;

		case	0x9000:
		case	0x9001:
		case	0x9002:
		case	0x9003:
		case	0x9004:
		case	0x9005:
		case	0x9006:
		case	0x9007:
			chl_reg[addr&7] = data;
			SetBank_PPU();
			break;

		case	0xA000:
		case	0xA001:
		case	0xA002:
		case	0xA003:
		case	0xA004:
		case	0xA005:
		case	0xA006:
		case	0xA007:
			chh_reg[addr&7] = data;
			SetBank_PPU();
			break;

		case	0xB000:
		case	0xB001:
		case	0xB002:
		case	0xB003:
			ntl_reg[addr&3] = data;
			SetBank_VRAM();
			break;

		case	0xB004:
		case	0xB005:
		case	0xB006:
		case	0xB007:
			nth_reg[addr&3] = data;
			SetBank_VRAM();
			break;

		case	0xC002:
			irq_enable = 0;
			irq_occur = 0;
			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
		case	0xC003:
			irq_enable = 0xFF;
			irq_preset = 0xFF;
			break;
		case	0xC004:
			break;
		case	0xC005:
			if( irq_offset & 0x80 ) {
				irq_latch = data ^ (irq_offset | 1);
			} else {
				irq_latch = data | (irq_offset&0x27);
			}
			irq_preset = 0xFF;
			break;
		case	0xC006:
			if( patch ) {
				irq_offset = data;
			}
			break;

		case	0xD000:
			prg_6000 = data & 0x80;
			prg_E000 = data & 0x04;
			prg_size = data & 0x03;
			chr_size = (data & 0x18)>>3;
			mir_mode = data & 0x20;
			SetBank_CPU();
			SetBank_PPU();
			SetBank_VRAM();
			break;

		case	0xD001:
			mir_type = data & 0x03;
			SetBank_VRAM();
			break;

		case	0xD003:
			break;
	}
}
示例#18
0
void	Mapper118::Write( WORD addr, BYTE data )
{
	switch( addr & 0xE001 ) {
		case	0x8000:
			reg[0] = data;
			SetBank_CPU();
			SetBank_PPU();
			break;
		case	0x8001:
			reg[1] = data;

			if( (reg[0] & 0x80) ) {
				if( (reg[0] & 0x07) == 2 ) {
					if( data & 0x80 ) SetVRAM_Mirror( VRAM_MIRROR4L );
					else		  SetVRAM_Mirror( VRAM_MIRROR4H );
				}
			} else {
				if( (reg[0] & 0x07) == 0 ) {
					if( data & 0x80 ) SetVRAM_Mirror( VRAM_MIRROR4L );
					else		  SetVRAM_Mirror( VRAM_MIRROR4H );
				}
			}

			switch( reg[0] & 0x07 ) {
				case	0x00:
					if( VROM_1K_SIZE ) {
						chr01 = data & 0xFE;
						SetBank_PPU();
					}
					break;
				case	0x01:
					if( VROM_1K_SIZE ) {
						chr23 = data & 0xFE;
						SetBank_PPU();
					}
					break;
				case	0x02:
					if( VROM_1K_SIZE ) {
						chr4 = data;
						SetBank_PPU();
					}
					break;
				case	0x03:
					if( VROM_1K_SIZE ) {
						chr5 = data;
						SetBank_PPU();
					}
					break;
				case	0x04:
					if( VROM_1K_SIZE ) {
						chr6 = data;
						SetBank_PPU();
					}
					break;
				case	0x05:
					if( VROM_1K_SIZE ) {
						chr7 = data;
						SetBank_PPU();
					}
					break;
				case	0x06:
					prg0 = data;
					SetBank_CPU();
					break;
				case	0x07:
					prg1 = data;
					SetBank_CPU();
					break;
			}
			break;

		case	0xC000:
			reg[4] = data;
			irq_counter = data;
			break;
		case	0xC001:
			reg[5] = data;
			irq_latch = data;
			break;
		case	0xE000:
			reg[6] = data;
			irq_enable = 0;
			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
		case	0xE001:
			reg[7] = data;
			irq_enable = 1;
			break;
	}
}
示例#19
0
void	Mapper187::Write( WORD addr, BYTE data )
{
	last_write = data;
	switch( addr ) {
		case	0x8003:
			ext_enable = 0xFF;
//			if( (data&0x80) != (chr_mode&0x80) ) {
//				for( INT i = 0; i < 4; i++ ) {
//					INT temp = chr[i];
//					chr[i] = chr[i+4];
//					chr[i+4] = temp;
//				}
//				SetBank_PPU();
//			}
			chr_mode = data;
			if( (data&0xF0) == 0 ) {
				prg[2] = PROM_8K_SIZE-2;
				SetBank_CPU();
			}
			break;

		case	0x8000:
			ext_enable = 0;
//			if( (data&0x80) != (chr_mode&0x80) ) {
//				for( INT i = 0; i < 4; i++ ) {
//					INT temp = chr[i];
//					chr[i] = chr[i+4];
//					chr[i+4] = temp;
//				}
//				SetBank_PPU();
//			}
			chr_mode = data;
			break;

		case	0x8001:
			if( !ext_enable ) {
				switch( chr_mode & 7 ) {
					case	0:
						data &= 0xFE;
						chr[4] = (INT)data+0x100;
						chr[5] = (INT)data+0x100+1;
//						chr[0+((chr_mode&0x80)?4:0)] = data;
//						chr[1+((chr_mode&0x80)?4:0)] = data+1;
						SetBank_PPU();
						break;
					case	1:
						data &= 0xFE;
						chr[6] = (INT)data+0x100;
						chr[7] = (INT)data+0x100+1;
//						chr[2+((chr_mode&0x80)?4:0)] = data;
//						chr[3+((chr_mode&0x80)?4:0)] = data+1;
						SetBank_PPU();
						break;
					case	2:
						chr[0] = data;
//						chr[0+((chr_mode&0x80)?0:4)] = data;
						SetBank_PPU();
						break;
					case	3:
						chr[1] = data;
//						chr[1+((chr_mode&0x80)?0:4)] = data;
						SetBank_PPU();
						break;
					case	4:
						chr[2] = data;
//						chr[2+((chr_mode&0x80)?0:4)] = data;
						SetBank_PPU();
						break;
					case	5:
						chr[3] = data;
//						chr[3+((chr_mode&0x80)?0:4)] = data;
						SetBank_PPU();
						break;
					case	6:
						if( (ext_mode&0xA0)!=0xA0 ) {
							prg[0] = data;
							SetBank_CPU();
						}
						break;
					case	7:
						if( (ext_mode&0xA0)!=0xA0 ) {
							prg[1] = data;
							SetBank_CPU();
						}
						break;
					default:
						break;
				}
			} else {
				switch( chr_mode ) {
					case	0x2A:
						prg[1] = 0x0F;
						break;
					case	0x28:
						prg[2] = 0x17;
						break;
					case	0x26:
						break;
					default:
						break;
				}
				SetBank_CPU();
			}
			bank[chr_mode&7] = data;
			break;

		case	0xA000:
			if( data & 0x01 ) {
				SetVRAM_Mirror( VRAM_HMIRROR );
			} else {
				SetVRAM_Mirror( VRAM_VMIRROR );
			}
			break;
		case	0xA001:
			break;

		case	0xC000:
			irq_counter = data;
			irq_occur = 0;
			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
		case	0xC001:
			irq_latch = data;
			irq_occur = 0;
			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
		case	0xE000:
		case	0xE002:
			irq_enable = 0;
			irq_occur = 0;
			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
		case	0xE001:
		case	0xE003:
			irq_enable = 1;
			irq_occur = 0;
			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
	}
}
示例#20
0
void	Mapper165::Write( WORD addr, BYTE data )
{

	switch( addr & 0xE001 ) {
		case	0x8000:
			reg[0] = data;
			SetBank_CPU();
			SetBank_PPU();
			break;
		case	0x8001:
			reg[1] = data;

			switch( reg[0] & 0x07 ) {
				case	0x00:
					chr0 = data & 0xFC;
					if( latch == 0xFD )
						SetBank_PPU();
					break;
				case	0x01:
					chr1 = data & 0xFC;
					if( latch == 0xFE )
						SetBank_PPU();
					break;

				case	0x02:
					chr2 = data & 0xFC;
					if( latch == 0xFD )
						SetBank_PPU();
					break;
				case	0x04:
					chr3 = data & 0xFC;
					if( latch == 0xFE )
						SetBank_PPU();
					break;

				case	0x06:
					prg0 = data;
					SetBank_CPU();
					break;
				case	0x07:
					prg1 = data;
					SetBank_CPU();
					break;
			}
			break;
		case	0xA000:
			reg[2] = data;
			if( data & 0x01 ) 
			{
				SetVRAM_Mirror( VRAM_HMIRROR );
			}else{
				SetVRAM_Mirror( VRAM_VMIRROR );
			}
			break;
		case	0xA001:
			reg[3] = data;
			break;
		default:
			break;
	}	

}
示例#21
0
void	Mapper114::WriteLow( WORD addr, BYTE data )
{
	reg_m = data;
	SetBank_CPU();
}
示例#22
0
void	Mapper194::Write( WORD addr, BYTE data )
{
	switch( addr & 0xE001 ) {
		case	0x8000:
			reg[0] = data;
			SetBank_CPU();
			SetBank_PPU();
			break;
		case	0x8001:
			reg[1] = data;

			switch( reg[0] & 0x0f ) {
				case	0x00:	chr[0] = (data & 0xFE) | 0,chr[1] = (data & 0xFE) | 1 ;
				case	0x01:	chr[2] = (data & 0xFE) | 0,chr[3] = (data & 0xFE) | 1 ;
				case	0x02:   
				case	0x03:
				case	0x04:
				case	0x05:	chr[(reg[0] & 0x07)+2] = data;	SetBank_PPU();		break;
				case	0x06:
				case	0x07:
				case	0x08:
				case	0x09:	prg[(reg[0] & 0x0f)-6] = data;	SetBank_CPU();		break;
			}
			break;
		case	0xA000:
			reg[2] = data;
			//if( !nes->rom->Is4SCREEN() ) 
			{
				if(data==0) SetVRAM_Mirror(VRAM_VMIRROR);
				else if(data==1) SetVRAM_Mirror(VRAM_HMIRROR);
				else if(data==2) SetVRAM_Mirror(VRAM_MIRROR4L);
				else SetVRAM_Mirror(VRAM_MIRROR4H);
			}
			break;
		case	0xA001:
			reg[3] = data;
			break;
		case	0xC000:
			reg[4] = data;
			irq_counter = data;
			irq_request = 0;
			break;
		case	0xC001:
			reg[5] = data;
			irq_latch = data;
			irq_request = 0;
			break;
		case	0xE000:
			reg[6] = data;
			irq_enable = 0;
			irq_request = 0;
			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
		case	0xE001:
			reg[7] = data;
			irq_enable = 1;
			irq_request = 0;
			break;
	}	
	
}
示例#23
0
void	Mapper074::Write( WORD addr, BYTE data )
{
//DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes->GetScanline(), nes->cpu->GetTotalCycles() );

	switch( addr & 0xE001 ) {
		case	0x8000:
			reg[0] = data;
			SetBank_CPU();
			SetBank_PPU();
			break;
		case	0x8001:
			reg[1] = data;

			switch( reg[0] & 0x07 ) {
				case	0x00:
					chr01 = data & 0xFE;
					SetBank_PPU();
					break;
				case	0x01:
					chr23 = data & 0xFE;
					SetBank_PPU();
					break;
				case	0x02:
					chr4 = data;
					SetBank_PPU();
					break;
				case	0x03:
					chr5 = data;
					SetBank_PPU();
					break;
				case	0x04:
					chr6 = data;
					SetBank_PPU();
					break;
				case	0x05:
					chr7 = data;
					SetBank_PPU();
					break;
				case	0x06:
					prg0 = data;
					SetBank_CPU();
					break;
				case	0x07:
					prg1 = data;
					SetBank_CPU();
					break;
			}
			break;
		case	0xA000:
			reg[2] = data;
			if( !nes->rom->Is4SCREEN() ) {
				if( data & 0x01 ) SetVRAM_Mirror( VRAM_HMIRROR );
				else		  SetVRAM_Mirror( VRAM_VMIRROR );
			}
			break;
		case	0xA001:
			reg[3] = data;
			break;
		case	0xC000:
			reg[4] = data;
			irq_counter = data;
			irq_request = 0;
			break;
		case	0xC001:
			reg[5] = data;
			irq_latch = data;
			irq_request = 0;
			break;
		case	0xE000:
			reg[6] = data;
			irq_enable = 0;
			irq_request = 0;
			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
		case	0xE001:
			reg[7] = data;
			irq_enable = 1;
			irq_request = 0;
			break;
	}	
	
}
示例#24
0
void	Mapper004::Write( WORD addr, BYTE data )
{
//DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes->GetScanline(), nes->cpu->GetTotalCycles() );

	switch( addr & 0xE001 ) {
		case	0x8000:
			reg[0] = data;
			SetBank_CPU();
			SetBank_PPU();
			break;
		case	0x8001:
			reg[1] = data;

			switch( reg[0] & 0x07 ) {
				case	0x00:
					chr01 = data & 0xFE;
					SetBank_PPU();
					break;
				case	0x01:
					chr23 = data & 0xFE;
					SetBank_PPU();
					break;
				case	0x02:
					chr4 = data;
					SetBank_PPU();
					break;
				case	0x03:
					chr5 = data;
					SetBank_PPU();
					break;
				case	0x04:
					chr6 = data;
					SetBank_PPU();
					break;
				case	0x05:
					chr7 = data;
					SetBank_PPU();
					break;
				case	0x06:
					prg0 = data;
					SetBank_CPU();
					break;
				case	0x07:
					prg1 = data;
					SetBank_CPU();
					break;
			}
			break;
		case	0xA000:
			reg[2] = data;
			if( !nes->rom->Is4SCREEN() ) {
				if( data & 0x01 ) SetVRAM_Mirror( VRAM_HMIRROR );
				else		  SetVRAM_Mirror( VRAM_VMIRROR );
			}
			break;
		case	0xA001:
			reg[3] = data;
//DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes->GetScanline(), nes->cpu->GetTotalCycles() );
			break;
		case	0xC000:
//DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes->GetScanline(), nes->cpu->GetTotalCycles() );
			reg[4] = data;
			if( irq_type == MMC3_IRQ_KLAX || irq_type == MMC3_IRQ_ROCKMAN3 ) {
				irq_counter = data;
			} else {
				irq_latch = data;
			}
			if( irq_type == MMC3_IRQ_DBZ2 ) {
				irq_latch = 0x07;
			}
			break;
		case	0xC001:
			reg[5] = data;
			if( irq_type == MMC3_IRQ_KLAX || irq_type == MMC3_IRQ_ROCKMAN3 ) {
				irq_latch = data;
			} else {
				if( (nes->GetScanline() < 240) || (irq_type == MMC3_IRQ_SHOUGIMEIKAN) ) {
					irq_counter |= 0x80;
					irq_preset = 0xFF;
				} else {
					irq_counter |= 0x80;
					irq_preset_vbl = 0xFF;
					irq_preset = 0;
				}
			}
			break;
		case	0xE000:
			reg[6] = data;
			irq_enable = 0;
			irq_request = 0;

			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
		case	0xE001:
			reg[7] = data;
			irq_enable = 1;
			irq_request = 0;

//			nes->cpu->ClrIRQ( IRQ_MAPPER );
			break;
	}
}
示例#25
0
void	Mapper004::Reset()
{
	for( INT i = 0; i < 8; i++ ) {
		reg[i] = 0x00;
	}

	prg0 = 0;
	prg1 = 1;
	SetBank_CPU();

	chr01 = 0;
	chr23 = 2;
	chr4  = 4;
	chr5  = 5;
	chr6  = 6;
	chr7  = 7;
	SetBank_PPU();

	we_sram  = 0;	// Disable
	irq_enable = 0;	// Disable
	irq_counter = 0;
	irq_latch = 0xFF;
	irq_request = 0;
	irq_preset = 0;
	irq_preset_vbl = 0;

	// IRQタイプ設定
	nes->SetIrqType( NES::IRQ_CLOCK );
	irq_type = 0;

	DWORD	crc = nes->rom->GetPROM_CRC();

	if( crc == 0x5c707ac4 ) {	// Mother(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0xcb106f49 ) {	// F-1 Sensation(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0x1170392a ) {	// Karakuri Kengou Den - Musashi Road - Karakuri Nin Hashiru!(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0x14a01c70 ) {	// Gun-Dec(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0xeffeea40 ) {	// For Klax(J)
		irq_type = MMC3_IRQ_KLAX;
		nes->SetIrqType( NES::IRQ_HSYNC );
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0xc17ae2dc ) {	// God Slayer - Haruka Tenkuu no Sonata(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0x126ea4a0 ) {	// Summer Carnival '92 - Recca(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0x1f2f4861 ) {	// J League Fighting Soccer - The King of Ace Strikers(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0x5a6860f1 ) {	// Shougi Meikan '92(J)
		irq_type = MMC3_IRQ_SHOUGIMEIKAN;
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0xae280e20 ) {	// Shougi Meikan '93(J)
		irq_type = MMC3_IRQ_SHOUGIMEIKAN;
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0xe19a2473 ) {	// Sugoro Quest - Dice no Senshi Tachi(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0x702d9b33 ) {	// Star Wars - The Empire Strikes Back(Victor)(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0xa9a0d729 ) {	// Dai Kaijuu - Deburas(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0xc5fea9f2 ) {	// Dai 2 Ji - Super Robot Taisen(J)
		irq_type = MMC3_IRQ_DAI2JISUPER;
	}
	if( crc == 0xd852c2f7 ) {	// Time Zone(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0xecfd3c69 ) {	// Taito Chase H.Q.(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0x7a748058 ) {	// Tom & Jerry (and Tuffy)(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0xaafe699c ) {	// Ninja Ryukenden 3 - Yomi no Hakobune(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0x6cc62c06 ) {	// Hoshi no Kirby - Yume no Izumi no Monogatari(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0x877dba77 ) {	// My Life My Love - Boku no Yume - Watashi no Negai(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0x6f96ed15 ) {	// Max Warrior - Wakusei Kaigenrei(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0x8685f366 ) {	// Matendouji(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0x8635fed1 ) {	// Mickey Mouse 3 - Yume Fuusen(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0x26ff3ea2 ) {	// Yume Penguin Monogatari(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0x7671bc51 ) {	// Red Ariimaa 2(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0xade11141 ) {	// Wanpaku Kokkun no Gourmet World(J)
		nes->SetIrqType( NES::IRQ_HSYNC );
	}
	if( crc == 0x7c7ab58e ) {	// Walkuere no Bouken - Toki no Kagi Densetsu(J)
		nes->SetRenderMethod( NES::POST_RENDER );
	}
	if( crc == 0x26ff3ea2 ) {	// Yume Penguin Monogatari(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}
	if( crc == 0x126ea4a0 ) {	// Summer Carnival '92 Recca(J)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}

	if( crc == 0x1d2e5018		// Rockman 3(J)
	 || crc == 0x6b999aaf ) {	// Megaman 3(U)
		irq_type = MMC3_IRQ_ROCKMAN3;
	}

	if( crc == 0xd88d48d7 ) {	// Kick Master(U)
		irq_type = MMC3_IRQ_ROCKMAN3;
	}

	if( crc == 0xA67EA466 ) {	// Alien 3(U)
		nes->SetRenderMethod( NES::TILE_RENDER );
	}

	if( crc == 0xe763891b ) {	// DBZ2
		irq_type = MMC3_IRQ_DBZ2;
	}

	// VS-Unisystem
	vs_patch = 0;
	vs_index = 0;

	if( crc == 0xeb2dba63		// VS TKO Boxing
	 || crc == 0x98cfe016 ) {	// VS TKO Boxing (Alt)
		vs_patch = 1;
	}
	if( crc == 0x135adf7c ) {	// VS Atari RBI Baseball
		vs_patch = 2;
	}
	if( crc == 0xf9d3b0a3		// VS Super Xevious
	 || crc == 0x9924980a		// VS Super Xevious (b1)
	 || crc == 0x66bb838f ) {	// VS Super Xevious (b2)
		vs_patch = 3;
	}
}
示例#26
0
void	Mapper119::Write( WORD addr, BYTE data )
{
    switch( addr & 0xE001 ) {
    case	0x8000:
        reg[0] = data;
        SetBank_CPU();
        SetBank_PPU();
        break;
    case	0x8001:
        reg[1] = data;

        switch( reg[0] & 0x07 ) {
        case	0x00:
            if( VROM_1K_SIZE ) {
                chr01 = data & 0xFE;
                SetBank_PPU();
            }
            break;
        case	0x01:
            if( VROM_1K_SIZE ) {
                chr23 = data & 0xFE;
                SetBank_PPU();
            }
            break;
        case	0x02:
            if( VROM_1K_SIZE ) {
                chr4 = data;
                SetBank_PPU();
            }
            break;
        case	0x03:
            if( VROM_1K_SIZE ) {
                chr5 = data;
                SetBank_PPU();
            }
            break;
        case	0x04:
            if( VROM_1K_SIZE ) {
                chr6 = data;
                SetBank_PPU();
            }
            break;
        case	0x05:
            if( VROM_1K_SIZE ) {
                chr7 = data;
                SetBank_PPU();
            }
            break;
        case	0x06:
            prg0 = data;
            SetBank_CPU();
            break;
        case	0x07:
            prg1 = data;
            SetBank_CPU();
            break;
        }
        break;
    case	0xA000:
        reg[2] = data;
        if( !nes->rom->Is4SCREEN() ) {
            if( data & 0x01 ) SetVRAM_Mirror( VRAM_HMIRROR );
            else		  SetVRAM_Mirror( VRAM_VMIRROR );
        }
        break;
    case	0xA001:
        reg[3] = data;
        break;
    case	0xC000:
        reg[4] = data;
        irq_counter = data;
        break;
    case	0xC001:
        reg[5] = data;
        irq_latch = data;
        break;
    case	0xE000:
        reg[6] = data;
        irq_enable = 0;
        irq_counter = irq_latch;
        nes->cpu->ClrIRQ( IRQ_MAPPER );
        break;
    case	0xE001:
        reg[7] = data;
        irq_enable = 1;
        break;
    }
}