示例#1
0
//////////////////////////////////////////////////////////////////////////
// Mapper013  CPROM                                                     //
//////////////////////////////////////////////////////////////////////////
void	Mapper013::Reset()
{
	SetPROM_32K_Bank( 0, 1, 2, 3 );
	SetCRAM_4K_Bank( 0, 0 );
	SetCRAM_4K_Bank( 4, 0 );
}
示例#2
0
void	Mapper001::Write( WORD addr, BYTE data )
{
//	DEBUGOUT( "MMC1 %04X=%02X\n", addr&0xFFFF,data&0xFF );

	if( wram_patch == 1 && addr == 0xBFFF ) {
		wram_count++;
		wram_bank += data&0x01;
		if( wram_count == 5 ) {
			if( wram_bank ) {
				SetPROM_Bank( 3, &WRAM[0x2000], BANKTYPE_RAM );
			} else {
				SetPROM_Bank( 3, &WRAM[0x0000], BANKTYPE_RAM );
			}
			wram_bank = wram_count = 0;
		}
	}

	if( patch != 1 ) {
		if((addr & 0x6000) != (last_addr & 0x6000)) {
			shift = regbuf = 0;
		}
		last_addr = addr;
	}

	if( data & 0x80 ) {
		shift = regbuf = 0;
//		reg[0] = 0x0C;		// D3=1,D2=1
		reg[0] |= 0x0C;		// D3=1,D2=1 残りはリセットされない
		return;
	}

	if( data&0x01 ) regbuf |= 1<<shift;
	if( ++shift < 5 )
		return;
	addr = (addr&0x7FFF)>>13;
	reg[addr] = regbuf;

//	DEBUGOUT( "MMC1 %d=%02X\n", addr&0xFFFF,regbuf&0xFF );

	regbuf = 0;
	shift = 0;

	if( patch != 1 ) {
	// For Normal Cartridge
		switch( addr ) {
			case	0:
				if( reg[0] & 0x02 ) {
					if( reg[0] & 0x01 ) SetVRAM_Mirror( VRAM_HMIRROR );
					else		    SetVRAM_Mirror( VRAM_VMIRROR );
				} else {
					if( reg[0] & 0x01 ) SetVRAM_Mirror( VRAM_MIRROR4H );
					else		    SetVRAM_Mirror( VRAM_MIRROR4L );
				}
				break;
			case	1:
				// Register #1
				if( VROM_1K_SIZE ) {
					if( reg[0] & 0x10 ) {
						// CHR 4K bank lower($0000-$0FFF)
						SetVROM_4K_Bank( 0, reg[1] );
						// CHR 4K bank higher($1000-$1FFF)
						SetVROM_4K_Bank( 4, reg[2] );
					} else {
						// CHR 8K bank($0000-$1FFF)
						SetVROM_8K_Bank( reg[1]>>1 );
					}
				} else {
					// For Romancia
					if( reg[0] & 0x10 ) {
						SetCRAM_4K_Bank( 0, reg[1] );
					}
				}
				break;
			case	2:
				// Register #2
				if( VROM_1K_SIZE ) {
					if( reg[0] & 0x10 ) {
						// CHR 4K bank lower($0000-$0FFF)
						SetVROM_4K_Bank( 0, reg[1] );
						// CHR 4K bank higher($1000-$1FFF)
						SetVROM_4K_Bank( 4, reg[2] );
					} else {
						// CHR 8K bank($0000-$1FFF)
						SetVROM_8K_Bank( reg[1]>>1 );
					}
				} else {
					// For Romancia
					if( reg[0] & 0x10 ) {
						SetCRAM_4K_Bank( 4, reg[2] );
					}
				}
				break;
			case	3:
				if( !(reg[0] & 0x08) ) {
				// PRG 32K bank ($8000-$FFFF)
					SetPROM_32K_Bank( reg[3]>>1 );
				} else {